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authorMatthew Nicholls <[email protected]>2018-01-29 16:26:18 +0000
committerDave Airlie <[email protected]>2018-01-31 13:37:18 +1000
commitef272b161e05e8216f2d1f4df5023f3aed0ae4fa (patch)
tree7e4267a88bc19c40e8d5e0d1e7bc126ec7d99c11 /src/mesa/main/eval.c
parent1ea9efd2f8892cc238b12ec3f329e8322a9e5d2f (diff)
radv: remove predication on cache flushes
This can lead to a situation where cache flushes could get conditionally disabled while still clearing the flush_bits, and thus flushes due to application pipeline barriers may never get executed. Fixes: a6c2001ace (radv: add support for cmd predication.) Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/mesa/main/eval.c')
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