diff options
| author | Anuj Phogat <[email protected]> | 2018-02-15 15:35:42 -0800 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2018-02-16 11:10:32 -0800 |
| commit | 7b283544dc76efe5216120b178574ff561605e23 (patch) | |
| tree | 74a7011df7a096b102fad7d12e52d610c2e08659 /src/mesa/main/context.h | |
| parent | 136f583a24b14b6e05555b5dec9c0eb073c99fab (diff) | |
anv/icl: Add render target flush after uploading binding table
The PIPE_CONTROL command description says:
"Whenever a Binding Table Index (BTI) used by a Render Taget Message
points to a different RENDER_SURFACE_STATE, SW must issue a Render
Target Cache Flush by enabling this bit. When render target flush
is set due to new association of BTI, PS Scoreboard Stall bit must
be set in this packet."
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/main/context.h')
0 files changed, 0 insertions, 0 deletions