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authorJason Ekstrand <[email protected]>2017-02-06 19:48:46 -0800
committerJason Ekstrand <[email protected]>2017-02-12 17:56:32 -0800
commitc59d1ea51bd0809761094e54c66bf3a200d964ff (patch)
tree1c0180103cb8ad599d43535d26b42cd1bdc4f62d /src/mesa/drivers
parentc4f8f395b291a88eb74b07b90a4028ef4f026f58 (diff)
i965/sampler_state: Set the "Base Mip Level" field on Sandy Bridge
Fixes two GL ES 3.0 CTS tests on Sandy Bridge: ES3-CTS.functional.texture.mipmap.cube.base_level.linear_linear ES3-CTS.functional.texture.mipmap.cube.base_level.linear_nearest Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "17.0 13.0" <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_sampler_state.c20
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h1
2 files changed, 20 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index 1cf10a8e385..b99a89893f6 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -88,6 +88,7 @@ brw_emit_sampler_state(struct brw_context *brw,
unsigned wrap_s,
unsigned wrap_t,
unsigned wrap_r,
+ unsigned base_level,
unsigned min_lod,
unsigned max_lod,
int lod_bias,
@@ -132,6 +133,21 @@ brw_emit_sampler_state(struct brw_context *brw,
ss[0] |= SET_FIELD(lod_bias & 0x7ff, GEN4_SAMPLER_LOD_BIAS) |
SET_FIELD(shadow_function, GEN4_SAMPLER_SHADOW_FUNCTION);
+ /* This field has existed since the original i965, but is declared MBZ
+ * until Sandy Bridge. According to the PRM:
+ *
+ * "This was added to match OpenGL semantics"
+ *
+ * In particular, OpenGL allowed you to offset by 0.5 in certain cases
+ * to get slightly better filtering. On Ivy Bridge and above, it
+ * appears that this is added to RENDER_SURFACE_STATE::SurfaceMinLOD so
+ * the right value is 0.0 or 0.5 (if you want the wacky behavior). On
+ * Sandy Bridge, however, this sum does not seem to occur and you have
+ * to set it to the actual base level of the texture.
+ */
+ if (brw->gen == 6)
+ ss[0] |= SET_FIELD(base_level, BRW_SAMPLER_BASE_MIPLEVEL);
+
if (brw->gen == 6 && min_filter != mag_filter)
ss[0] |= GEN6_SAMPLER_MIN_MAG_NOT_EQUAL;
@@ -503,6 +519,8 @@ brw_update_sampler_state(struct brw_context *brw,
const int lod_bits = brw->gen >= 7 ? 8 : 6;
const float hw_max_lod = brw->gen >= 7 ? 14 : 13;
+ const unsigned base_level =
+ U_FIXED(CLAMP(texObj->MinLevel + texObj->BaseLevel, 0, hw_max_lod), 1);
const unsigned min_lod =
U_FIXED(CLAMP(sampler->MinLod, 0, hw_max_lod), lod_bits);
const unsigned max_lod =
@@ -532,7 +550,7 @@ brw_update_sampler_state(struct brw_context *brw,
max_anisotropy,
address_rounding,
wrap_s, wrap_t, wrap_r,
- min_lod, max_lod, lod_bias,
+ base_level, min_lod, max_lod, lod_bias,
shadow_function,
non_normalized_coords,
border_color_offset);
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 36307c7ef90..4b7e3c2966f 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -335,6 +335,7 @@ void brw_emit_sampler_state(struct brw_context *brw,
unsigned wrap_s,
unsigned wrap_t,
unsigned wrap_r,
+ unsigned base_level,
unsigned min_lod,
unsigned max_lod,
int lod_bias,