diff options
author | Corbin Simpson <[email protected]> | 2008-06-14 08:56:03 -0700 |
---|---|---|
committer | Corbin Simpson <[email protected]> | 2008-06-14 08:56:03 -0700 |
commit | b97e48ffe3561288b5ebbebf7d439d4714fbb6a1 (patch) | |
tree | cd56329cc0c2f0dafc919747c70743b9738640a8 /src/mesa/drivers | |
parent | 69004fb758629d5c2d201241fc3d2907dd9afde3 (diff) |
r5xx: More FP rewriting; fix texrect FP insts.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/r300/r500_fragprog.c | 77 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r500_fragprog_emit.c | 35 |
2 files changed, 23 insertions, 89 deletions
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c index 197036008ad..7cf32acd4e2 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog.c @@ -39,8 +39,6 @@ static void reset_srcreg(struct prog_src_register* reg) * - extract operand swizzles * - introduce a temporary register when write masks are needed * - * \todo If/when r5xx uses the radeon_program architecture, this can probably - * be reused. */ static GLboolean transform_TEX( struct radeon_program_transform_context* context, @@ -58,6 +56,7 @@ static GLboolean transform_TEX( inst.Opcode != OPCODE_KIL) return GL_FALSE; + /* ARB_shadow & EXT_shadow_funcs */ if (inst.Opcode != OPCODE_KIL && compiler->fp->mesa_program.Base.ShadowSamplers & (1 << inst.TexSrcUnit)) { GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func; @@ -84,78 +83,6 @@ static GLboolean transform_TEX( inst.DstReg.WriteMask = WRITEMASK_XYZW; } - - /* Hardware uses [0..1]x[0..1] range for rectangle textures - * instead of [0..Width]x[0..Height]. - * Add a scaling instruction. - */ - if (inst.Opcode != OPCODE_KIL && inst.TexSrcTarget == TEXTURE_RECT_INDEX) { - gl_state_index tokens[STATE_LENGTH] = { - STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0, - 0 - }; - - int tempreg = radeonCompilerAllocateTemporary(context->compiler); - int factor_index; - - tokens[2] = inst.TexSrcUnit; - factor_index = - _mesa_add_state_reference( - compiler->fp->mesa_program.Base.Parameters, tokens); - - tgt = radeonClauseInsertInstructions(context->compiler, context->dest, - context->dest->NumInstructions, 1); - - tgt->Opcode = OPCODE_MAD; - tgt->DstReg.File = PROGRAM_TEMPORARY; - tgt->DstReg.Index = tempreg; - tgt->SrcReg[0] = inst.SrcReg[0]; - tgt->SrcReg[1].File = PROGRAM_STATE_VAR; - tgt->SrcReg[1].Index = factor_index; - tgt->SrcReg[2].File = PROGRAM_BUILTIN; - tgt->SrcReg[2].Swizzle = SWIZZLE_0000; - - reset_srcreg(&inst.SrcReg[0]); - inst.SrcReg[0].File = PROGRAM_TEMPORARY; - inst.SrcReg[0].Index = tempreg; - } - - /* Texture operations do not support swizzles etc. in hardware, - * so emit an additional arithmetic operation if necessary. - */ - if (inst.SrcReg[0].Swizzle != SWIZZLE_NOOP || - inst.SrcReg[0].Abs || inst.SrcReg[0].NegateBase || inst.SrcReg[0].NegateAbs) { - int tempreg = radeonCompilerAllocateTemporary(context->compiler); - - tgt = radeonClauseInsertInstructions(context->compiler, context->dest, - context->dest->NumInstructions, 1); - - tgt->Opcode = OPCODE_MAD; - tgt->DstReg.File = PROGRAM_TEMPORARY; - tgt->DstReg.Index = tempreg; - tgt->SrcReg[0] = inst.SrcReg[0]; - tgt->SrcReg[1].File = PROGRAM_BUILTIN; - tgt->SrcReg[1].Swizzle = SWIZZLE_1111; - tgt->SrcReg[2].File = PROGRAM_BUILTIN; - tgt->SrcReg[2].Swizzle = SWIZZLE_0000; - - reset_srcreg(&inst.SrcReg[0]); - inst.SrcReg[0].File = PROGRAM_TEMPORARY; - inst.SrcReg[0].Index = tempreg; - } - - if (inst.Opcode != OPCODE_KIL) { - if (inst.DstReg.File != PROGRAM_TEMPORARY || - inst.DstReg.WriteMask != WRITEMASK_XYZW) { - int tempreg = radeonCompilerAllocateTemporary(context->compiler); - - inst.DstReg.File = PROGRAM_TEMPORARY; - inst.DstReg.Index = tempreg; - inst.DstReg.WriteMask = WRITEMASK_XYZW; - destredirect = GL_TRUE; - } - } - tgt = radeonClauseInsertInstructions(context->compiler, context->dest, context->dest->NumInstructions, 1); _mesa_copy_instructions(tgt, &inst, 1); @@ -390,7 +317,7 @@ void r500TranslateFragmentShader(r300ContextPtr r300, radeonCompilerInit(&compiler.compiler, r300->radeon.glCtx, &fp->mesa_program.Base); - insert_WPOS_trailer(&compiler); + /* insert_WPOS_trailer(&compiler); */ struct radeon_program_transformation transformations[1] = { { &transform_TEX, &compiler } diff --git a/src/mesa/drivers/dri/r300/r500_fragprog_emit.c b/src/mesa/drivers/dri/r300/r500_fragprog_emit.c index 24182f18cad..3b515515ef1 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog_emit.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog_emit.c @@ -315,7 +315,7 @@ static GLuint make_src(struct r500_pfs_compile_state *cs, struct prog_src_regist break; case PROGRAM_ENV_PARAM: reg = emit_const4fv(cs, - cs->compiler->fp->ctx->FragmentProgram.Parameters[src.Index]); + cs->compiler->compiler.Ctx->FragmentProgram.Parameters[src.Index]); break; case PROGRAM_STATE_VAR: case PROGRAM_NAMED_PARAM: @@ -1286,14 +1286,17 @@ static GLboolean parse_program(struct r500_pfs_compile_state *cs) PROG_CODE; int clauseidx, counter = 0; - for (clauseidx = 0; clauseidx < cs->compiler->compiler.NumClauses; ++clauseidx) { + for (clauseidx = 0; clauseidx < cs->compiler->compiler.NumClauses; clauseidx++) { struct radeon_clause* clause = &cs->compiler->compiler.Clauses[clauseidx]; + struct prog_instruction* fpi; + int ip; - for (ip = 0; ip < clause->NumInstructions; ++ip) { - counter = do_inst(cs, clause->Instructions + ip, counter); + for (ip = 0; ip < clause->NumInstructions; ip++) { + fpi = clause->Instructions + ip; + counter = do_inst(cs, fpi, counter); - if (cs->compiler->fp->error) + if (cs->compiler->fp->error == GL_TRUE) return GL_FALSE; } } @@ -1397,20 +1400,24 @@ static void init_program(struct r500_pfs_compile_state *cs) cs->inputs[i].reg = 0; } - if (!mp->Base.Instructions) { - ERROR("No instructions found in program, going to go die now.\n"); - return; - } + int clauseidx; + + for (clauseidx = 0; clauseidx < cs->compiler->compiler.NumClauses; ++clauseidx) { + struct radeon_clause* clause = &cs->compiler->compiler.Clauses[clauseidx]; + int ip; - for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) { - for (i = 0; i < 3; i++) { - if (fpi->SrcReg[i].File == PROGRAM_TEMPORARY) { - if (fpi->SrcReg[i].Index >= temps_used) - temps_used = fpi->SrcReg[i].Index + 1; + for (ip = 0; ip < clause->NumInstructions; ip++) { + fpi = clause->Instructions + ip; + for (i = 0; i < 3; i++) { + if (fpi->SrcReg[i].File == PROGRAM_TEMPORARY) { + if (fpi->SrcReg[i].Index >= temps_used) + temps_used = fpi->SrcReg[i].Index + 1; + } } } } + cs->temp_in_use = temps_used + 1; code->max_temp_idx = code->temp_reg_offset + cs->temp_in_use; |