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authorAnuj Phogat <[email protected]>2017-04-27 10:22:40 -0700
committerAnuj Phogat <[email protected]>2017-06-01 12:14:13 -0700
commitadb449694a3345966248d1a6274a56691c2f62b1 (patch)
tree9cb2feb00f4067cd8d9a80dc82480442a584f567 /src/mesa/drivers
parent7a4964ec5c1a0dd065436ff7d25aecb45d306979 (diff)
i965: Rename brw_format variable names to isl_format
This patch makes non functional changes. Renaming is just to make the code more readable. V2: update the types to "enum isl_format" Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c6
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c5
3 files changed, 9 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 3e3fe2d0eda..9878cae9d4b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -205,9 +205,10 @@ intel_texture_view_requires_resolve(struct brw_context *brw,
!intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
return false;
- const uint32_t brw_format = brw_isl_format_for_mesa_format(intel_tex->_Format);
+ const enum isl_format isl_format =
+ brw_isl_format_for_mesa_format(intel_tex->_Format);
- if (isl_format_supports_ccs_e(&brw->screen->devinfo, brw_format))
+ if (isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format))
return false;
perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index e019adcf2df..15863cb1637 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -686,7 +686,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
uint32_t size = tObj->BufferSize;
struct brw_bo *bo = NULL;
mesa_format format = tObj->_BufferObjectFormat;
- uint32_t brw_format = brw_isl_format_for_mesa_format(format);
+ const enum isl_format isl_format = brw_isl_format_for_mesa_format(format);
int texel_size = _mesa_get_format_bytes(format);
if (intel_obj) {
@@ -712,14 +712,14 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
*/
size = MIN2(size, ctx->Const.MaxTextureBufferSize * (unsigned) texel_size);
- if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
+ if (isl_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
_mesa_problem(NULL, "bad format %s for texture buffer\n",
_mesa_get_format_name(format));
}
brw_emit_buffer_surface_state(brw, surf_offset, bo,
tObj->BufferOffset,
- brw_format,
+ isl_format,
size,
texel_size,
false /* rw */);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6acf48e8501..b73c0d0ad1d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -209,8 +209,9 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
if (brw->gen >= 9) {
mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
- const uint32_t brw_format = brw_isl_format_for_mesa_format(linear_format);
- return isl_format_supports_ccs_e(&brw->screen->devinfo, brw_format);
+ const enum isl_format isl_format =
+ brw_isl_format_for_mesa_format(linear_format);
+ return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
} else
return true;
}