diff options
author | Matt Turner <[email protected]> | 2017-05-31 21:14:15 -0700 |
---|---|---|
committer | Matt Turner <[email protected]> | 2017-06-06 11:47:47 -0700 |
commit | a16355d67d92c0233c2b1762d517238d562dcc04 (patch) | |
tree | a956c16d464a7cbaf00b52fe183174932541fb99 /src/mesa/drivers | |
parent | ce17d4c5f5489e88554a8ef59f8cc6e453953336 (diff) |
i965: Make unsynchronized maps unsynchronized on non-LLC
On Broxton, the performance of Unigine Valley 1.0 is improved by
13.3067% +/- 0.144322% (n=40) at 1280x720/QUALITY_LOW, and by
1.68478% +/- 0.484226% (n=3) at 1920x1080/QUALITY_LOW.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_bufmgr.c | 14 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_buffer_objects.c | 11 |
2 files changed, 3 insertions, 22 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c index 4ab72cd3e51..15610dba5b9 100644 --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c @@ -772,19 +772,7 @@ brw_bo_map_gtt(struct brw_context *brw, struct brw_bo *bo, unsigned flags) void * brw_bo_map_unsynchronized(struct brw_context *brw, struct brw_bo *bo) { - struct brw_bufmgr *bufmgr = bo->bufmgr; - - /* If the CPU cache isn't coherent with the GTT, then use a - * regular synchronized mapping. The problem is that we don't - * track where the buffer was last used on the CPU side in - * terms of brw_bo_map_cpu vs brw_bo_map_gtt, so - * we would potentially corrupt the buffer even when the user - * does reasonable things. - */ - if (!bufmgr->has_llc) - return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE); - else - return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC); + return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC); } static bool diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index 5813989ce48..fcf04ebfdd6 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c @@ -400,15 +400,8 @@ brw_map_buffer_range(struct gl_context *ctx, return obj->Mappings[index].Pointer; } - void *map; - if (access & GL_MAP_UNSYNCHRONIZED_BIT) { - if (!brw->has_llc && brw->perf_debug && - brw_bo_busy(intel_obj->buffer)) { - perf_debug("MapBufferRange with GL_MAP_UNSYNCHRONIZED_BIT stalling (it's actually synchronized on non-LLC platforms)\n"); - } - map = brw_bo_map_unsynchronized(brw, intel_obj->buffer); - } else { - map = brw_bo_map(brw, intel_obj->buffer, access); + void *map = brw_bo_map(brw, intel_obj->buffer, access); + if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) { mark_buffer_inactive(intel_obj); } |