i965: Do int64 lowering in NIR

Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>

2 files changed, 4 insertions, 5 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 8611d485216..e124f92cba4 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -118,11 +118,6 @@ process_glsl_ir(struct brw_context *brw,
    }
 
    lower_instructions(shader->ir, instructions_to_lower);
-   lower_64bit_integer_instructions(shader->ir,
-                                    MUL64 |
-                                    DIV64 |
-                                    MOD64 |
-                                    SIGN64);
 
    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
     * if-statements need to be flattened.
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 3cf2c980b68..f86308521e9 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -579,6 +579,10 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
 
    nir_lower_indirect_derefs(nir, indirect_mask);
 
+   nir_lower_int64(nir, nir_lower_imul64 |
+                        nir_lower_isign64 |
+                        nir_lower_divmod64);
+
    /* Get rid of split copies */
    nir = nir_optimize(nir, compiler, is_scalar);