diff options
| author | Francisco Jerez <[email protected]> | 2016-05-23 14:07:23 -0700 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2016-05-23 14:07:23 -0700 |
| commit | 015035027beb38fb9a3b06f8cd94aadc96a8f728 (patch) | |
| tree | c4b97f8f6c9cb2537a37cbae418eef995f7c16c5 /src/mesa/drivers | |
| parent | 7eb496688762ea614408c4c75e4b5c7242d2677c (diff) | |
i965/fs: Mark UBO uniform pull constant loads as force_writemask_all.
This lets the rest of the backend know that the uniform pull constant
load opcodes don't respect channel enables -- Without this the
register allocator has no way to know that the return payload of a
pull constant load is not per-channel and spills of the destination
will be broken under non-uniform control flow.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 2a486513691..0a847f8637f 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -2176,10 +2176,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) break; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: + assert(inst->force_writemask_all); generate_uniform_pull_constant_load(inst, dst, src[0], src[1]); break; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7: + assert(inst->force_writemask_all); generate_uniform_pull_constant_load_gen7(inst, dst, src[0], src[1]); break; diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index b7df28663d5..cc30838d2ab 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -3611,7 +3611,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr const unsigned count = MIN2(instr->num_components - c, (16 - base % 16) / type_size); - bld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, + bld.exec_all() + .emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, packed_consts, surf_index, brw_imm_ud(base & ~15)); const fs_reg consts = |