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authorAndre Maasikas <[email protected]>2009-10-15 11:24:49 -0400
committerAlex Deucher <[email protected]>2009-10-15 11:24:49 -0400
commit22a0029a68cf6a17e5d799c7d8eb8a699ccdeabb (patch)
tree864e1aeb2670412b8c6a95a4a29b2001dca784a2 /src/mesa/drivers
parenta3fec141017a39916d07000a3aa00eef3c9ac8a7 (diff)
r600: fix tfp1 bo size
Setting the wrong bo size resulting in an incomplete read cache flush when reading the texture. This fixes the compiz text corruption. [agd5f: take hw pitch alignment into account]
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/r600/r600_texstate.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c
index bcb8d7c73d7..61ff7e8158e 100644
--- a/src/mesa/drivers/dri/r600/r600_texstate.c
+++ b/src/mesa/drivers/dri/r600/r600_texstate.c
@@ -721,7 +721,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
struct gl_texture_object *tObj =
_mesa_lookup_texture(rmesa->radeon.glCtx, texname);
radeonTexObjPtr t = radeon_tex_obj(tObj);
- uint32_t pitch_val, size;
+ int firstlevel = t->mt ? t->mt->firstLevel : 0;
+ const struct gl_texture_image *firstImage;
+ uint32_t pitch_val, size, row_align;
if (!tObj)
return;
@@ -731,7 +733,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
if (!offset)
return;
- size = pitch;//h * w * (depth / 8);
+ firstImage = t->base.Image[0][firstlevel];
+ row_align = rmesa->radeon.texture_row_align - 1;
+ size = ((firstImage->Width * (depth / 8) + row_align) & ~row_align) * firstImage->Height;
if (t->bo) {
radeon_bo_unref(t->bo);
t->bo = NULL;