summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
diff options
context:
space:
mode:
authorIago Toral Quiroga <[email protected]>2015-12-18 10:17:59 +0100
committerSamuel Iglesias Gonsálvez <[email protected]>2015-12-22 12:38:48 +0100
commit1a95b87dad341e73e355b244a275d9b4d60537af (patch)
treea11d3240d3a963fa4aa1f68dfd8f0e419bb15a18 /src/mesa/drivers
parent57f7c85dcf8ca8b47b71076fb70d9242aec00588 (diff)
mesa: Add a _mesa_active_fragment_shader_has_side_effects helper
Some drivers can disable the FS unit if there is nothing in the shader code that writes to an output (i.e. color, depth, etc). Right now, mesa has a function to check for atomic buffers and the i965 driver also checks for images. Refactor this logic into a generic function that we can use for any source of side effects in a fragment shader. Suggested by Jason. v2: - Use '_Shader', as suggested by Tapani, to fix the following CTS test: ES31-CTS.shader_atomic_counters.advanced-usage-many-draw-calls2 Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c6
-rw-r--r--src/mesa/drivers/dri/i965/gen8_ps_state.c3
2 files changed, 2 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 06d5e65786b..a6d1028dca1 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -77,13 +77,9 @@ upload_wm_state(struct brw_context *brw)
dw1 |= GEN7_WM_KILL_ENABLE;
}
- if (_mesa_active_fragment_shader_has_atomic_ops(&brw->ctx)) {
- dw1 |= GEN7_WM_DISPATCH_ENABLE;
- }
-
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
- prog_data->base.nr_image_params ||
+ _mesa_active_fragment_shader_has_side_effects(&brw->ctx) ||
dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index 945f7106e3d..3cc8c68e132 100644
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -90,8 +90,7 @@ gen8_upload_ps_extra(struct brw_context *brw,
*
* BRW_NEW_FS_PROG_DATA | BRW_NEW_FRAGMENT_PROGRAM | _NEW_BUFFERS | _NEW_COLOR
*/
- if ((_mesa_active_fragment_shader_has_atomic_ops(&brw->ctx) ||
- prog_data->base.nr_image_params) &&
+ if (_mesa_active_fragment_shader_has_side_effects(&brw->ctx) &&
!brw_color_buffer_write_enabled(brw))
dw1 |= GEN8_PSX_SHADER_HAS_UAV;