diff options
| author | Kenneth Graunke <[email protected]> | 2011-10-20 02:00:43 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2012-03-30 14:39:23 -0700 |
| commit | a23dcc18e71e905da117d14b5d56c4e49c66ab79 (patch) | |
| tree | 31679404d836b3f81945096f69b1efa32f171f9f /src/mesa/drivers | |
| parent | fc8edbe016348a22e4631fb1e1c7f7b87301c5ec (diff) | |
i965: Fill in Sample Mask in Haswell's 3DSTATE_PS.
We only need one sample, since we don't support multisampling yet.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_state.c | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index e7326c6ca3f..2d47ef85520 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1395,6 +1395,8 @@ enum brw_wm_barycentric_interp_mode { /* DW4 */ # define IVB_PS_MAX_THREADS_SHIFT 24 # define HSW_PS_MAX_THREADS_SHIFT 23 +# define HSW_PS_SAMPLE_MASK_SHIFT 12 +# define HSW_PS_SAMPLE_MASK_MASK INTEL_MASK(19, 12) # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index 773598f2c48..024c855ab12 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c @@ -155,6 +155,9 @@ upload_ps_state(struct brw_context *brw) if (intel->ctx.Shader.CurrentFragmentProgram == NULL) dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT; + if (intel->is_haswell) + dw4 |= SET_FIELD(1, HSW_PS_SAMPLE_MASK); /* 1 sample for now */ + dw4 |= (brw->max_wm_threads - 1) << max_threads_shift; /* CACHE_NEW_WM_PROG */ |