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authorDanylo Piliaiev <[email protected]>2019-11-08 17:47:57 +0200
committerDanylo Piliaiev <[email protected]>2019-11-12 13:59:24 +0200
commit3349b4b056cfe17cddfe2bc887fef48e8edab170 (patch)
tree1c775e420737374c86645a49c5cb4e0d4f787728 /src/mesa/drivers
parentaf684753f3437aaf708f8256b0517ed39b893a61 (diff)
i965/program_cache: Lift restriction on shader key size
This will allow usage of packed structs which may have size not divisible by 4. Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_program_cache.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
index 88bb19792b0..e4b321bcc4c 100644
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -37,7 +37,7 @@
* data) in return. Objects in the cache may not have relocations
* (pointers to other BOs) in them.
*
- * The inner workings are a simple hash table based on a CRC of the
+ * The inner workings are a simple hash table based on a FNV-1a of the
* key data.
*
* Replacement is not implemented. Instead, when the cache gets too
@@ -96,17 +96,9 @@ brw_stage_cache_id(gl_shader_stage stage)
static GLuint
hash_key(struct brw_cache_item *item)
{
- GLuint *ikey = (GLuint *)item->key;
- GLuint hash = item->cache_id, i;
-
- assert(item->key_size % 4 == 0);
-
- /* I'm sure this can be improved on:
- */
- for (i = 0; i < item->key_size/4; i++) {
- hash ^= ikey[i];
- hash = (hash << 5) | (hash >> 27);
- }
+ uint32_t hash = _mesa_fnv32_1a_offset_bias;
+ hash = _mesa_fnv32_1a_accumulate(hash, item->cache_id);
+ hash = _mesa_fnv32_1a_accumulate_block(hash, item->key, item->key_size);
return hash;
}