i965/vec4: don't propagate single-precision uniforms into 4-wide instructions

Otherwise we end up producing code that violates the register region
restriction that says that when execsize == width and hstride != 0
the vstride can't be 0.

Reviewed-by: Matt Turner <[email protected]>

1 files changed, 11 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index fba71ae3dc2..9b76f58fc67 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -331,6 +331,17 @@ try_copy_propagate(const struct gen_device_info *devinfo,
    if (devinfo->gen < 8 && inst->size_written > REG_SIZE && is_uniform(value))
       return false;
 
+   /* There is a regioning restriction such that if execsize == width
+    * and hstride != 0 then the vstride can't be 0. When we split instrutions
+    * that take a single-precision source (like F->DF conversions) we end up
+    * with a 4-wide source on an instruction with an execution size of 4.
+    * If we then copy-propagate the source from a uniform we also end up with a
+    * vstride of 0 and we violate the restriction.
+    */
+   if (inst->exec_size == 4 && value.file == UNIFORM &&
+       type_sz(value.type) == 4)
+      return false;
+
    /* If the type of the copy value is different from the type of the
     * instruction then the swizzles and writemasks involved don't have the same
     * meaning and simply replacing the source would produce different semantics.