diff options
| author | Chia-I Wu <[email protected]> | 2011-10-23 18:29:17 +0800 |
|---|---|---|
| committer | Chia-I Wu <[email protected]> | 2011-11-03 15:09:44 +0800 |
| commit | 1ab1b15e9d0da1c5215a20770735b5477f5313df (patch) | |
| tree | 0965de0f946151245341d434924f3bafa844284f /src/mesa/drivers | |
| parent | 833d707db13afd2c4940be65a0e18d4e98cb8ec3 (diff) | |
mesa, i965: prepare for more than 8 texture targets
3-bit fields are used store texture target in several places. That will fail
when TEXTURE_EXTERNAL_INDEX, which happends to be the 9th texture target, is
added. Make them 4-bit fields.
Reviewed-by: Brian Paul <[email protected]>
Acked-by: Jakob Bornecrantz <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 76cf4533b56..056934a274b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -156,7 +156,7 @@ struct brw_wm_instruction { GLuint saturate:1; GLuint writemask:4; GLuint tex_unit:4; /* texture unit for TEX, TXD, TXP instructions */ - GLuint tex_idx:3; /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */ + GLuint tex_idx:4; /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */ GLuint tex_shadow:1; /* do shadow comparison? */ GLuint eot:1; /* End of thread indicator for FB_WRITE*/ GLuint target:10; /* target binding table index for FB_WRITE*/ |