Make sure texture base addresses are used correctly.

They are relative to the card's address space, not relative to fbLocation,
which will be important once we program MC_FB/AGP_LOCATION in the way
they are programmed on older Radeon chips.

2 files changed, 2 insertions, 2 deletions

diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index ab6660897ca..7b575bd4d00 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -174,7 +174,7 @@ struct r300_tex_obj {
 	GLuint pitch; /* one of the unknown registers.. unknown 1 ?*/
 	GLuint size;	/* npot only */
 	GLuint format;
-	GLuint offset;	/* Image location in texmem.
+	GLuint offset;	/* Image location in the card's address space.
 				   All cube faces follow. */
 	GLuint unknown4;
 	GLuint unknown5;
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 0e2652a3703..d8feb195427 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1077,7 +1077,7 @@ void r300_setup_textures(GLcontext *ctx)
 			r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
 			r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
 			//fprintf(stderr, "t->format=%08x\n", t->format);
-			r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
+			r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=t->offset;
 			r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
 			r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
 		}