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authorEric Anholt <[email protected]>2009-08-04 14:13:27 -0700
committerEric Anholt <[email protected]>2009-08-04 18:06:34 -0700
commit7007f8b352763af89805f287153cb7972bff0523 (patch)
treeb929f3401a3e5474002eb7a4122970c449b46d05 /src/mesa/drivers
parent011244853b538a1a5adf602c8ed2de5c0f047548 (diff)
i965: Emit conditional code updates as required for GLSL VS if statements.
Previously, we'd be branching based on whatever condition code happened to be laying around.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index f0eb6eb2b61..bd584d2189e 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -1558,6 +1558,19 @@ void brw_vs_emit(struct brw_vs_compile *c )
"unknown");
}
+ /* Set the predication update on the last instruction of the native
+ * instruction sequence.
+ *
+ * This would be problematic if it was set on a math instruction,
+ * but that shouldn't be the case with the current GLSL compiler.
+ */
+ if (inst->CondUpdate) {
+ struct brw_instruction *hw_insn = &p->store[p->nr_insn - 1];
+
+ assert(hw_insn->header.destreg__conditionalmod == 0);
+ hw_insn->header.destreg__conditionalmod = BRW_CONDITIONAL_NZ;
+ }
+
if ((inst->DstReg.File == PROGRAM_OUTPUT)
&& (inst->DstReg.Index != VERT_RESULT_HPOS)
&& c->output_regs[inst->DstReg.Index].used_in_src) {