diff options
author | Kenneth Graunke <[email protected]> | 2013-09-25 17:01:55 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2013-10-13 00:10:43 -0700 |
commit | d76f6c7ae4d738193af2b3a06c4e6321e5e4daac (patch) | |
tree | dd0b3c58b7ff088410dd7663ec20040224c4a0dc /src/mesa/drivers | |
parent | afe05e71931f53843999ea967946fae1b219a374 (diff) |
i965: Move hardware limits to brw_device_info.
Since each kind of device has its own brw_device_info structure, we can
simply store the URB and thread limits there. This eliminates all the
large if-ladders, and simplifies the context initialization code quite a
bit.
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 94 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_device_info.c | 90 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_device_info.h | 16 |
3 files changed, 117 insertions, 83 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 7319114f054..41df547ce82 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -444,91 +444,19 @@ brwCreateContext(gl_api api, brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965; } - /* WM maximum threads is number of EUs times number of threads per EU. */ - assert(brw->gen <= 7); - - if (brw->is_haswell) { - if (brw->gt == 1) { - brw->max_wm_threads = 102; - brw->max_vs_threads = 70; - brw->max_gs_threads = 70; - brw->urb.size = 128; - brw->urb.min_vs_entries = 32; - brw->urb.max_vs_entries = 640; - brw->urb.max_gs_entries = 256; - } else if (brw->gt == 2) { - brw->max_wm_threads = 204; - brw->max_vs_threads = 280; - brw->max_gs_threads = 256; - brw->urb.size = 256; - brw->urb.min_vs_entries = 64; - brw->urb.max_vs_entries = 1664; - brw->urb.max_gs_entries = 640; - } else if (brw->gt == 3) { - brw->max_wm_threads = 408; - brw->max_vs_threads = 280; - brw->max_gs_threads = 256; - brw->urb.size = 512; - brw->urb.min_vs_entries = 64; - brw->urb.max_vs_entries = 1664; - brw->urb.max_gs_entries = 640; - } - } else if (brw->gen == 7) { - if (brw->gt == 1) { - brw->max_wm_threads = 48; - brw->max_vs_threads = 36; - brw->max_gs_threads = 36; - brw->urb.size = 128; - brw->urb.min_vs_entries = 32; - brw->urb.max_vs_entries = 512; - brw->urb.max_gs_entries = 192; - } else if (brw->gt == 2) { - brw->max_wm_threads = 172; - brw->max_vs_threads = 128; - brw->max_gs_threads = 128; - brw->urb.size = 256; - brw->urb.min_vs_entries = 32; - brw->urb.max_vs_entries = 704; - brw->urb.max_gs_entries = 320; - } else { - assert(!"Unknown gen7 device."); - } - } else if (brw->gen == 6) { - if (brw->gt == 2) { - brw->max_wm_threads = 80; - brw->max_vs_threads = 60; - brw->max_gs_threads = 60; - brw->urb.size = 64; /* volume 5c.5 section 5.1 */ - brw->urb.min_vs_entries = 24; - brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */ - brw->urb.max_gs_entries = 256; - } else { - brw->max_wm_threads = 40; - brw->max_vs_threads = 24; - brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */ - brw->urb.size = 32; /* volume 5c.5 section 5.1 */ - brw->urb.min_vs_entries = 24; - brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */ - brw->urb.max_gs_entries = 256; - } + brw->max_vs_threads = devinfo->max_vs_threads; + brw->max_gs_threads = devinfo->max_gs_threads; + brw->max_wm_threads = devinfo->max_wm_threads; + brw->urb.size = devinfo->urb.size; + brw->urb.min_vs_entries = devinfo->urb.min_vs_entries; + brw->urb.max_vs_entries = devinfo->urb.max_vs_entries; + brw->urb.max_gs_entries = devinfo->urb.max_gs_entries; + + if (brw->gen == 6) brw->urb.gen6_gs_previously_active = false; - } else if (brw->gen == 5) { - brw->urb.size = 1024; - brw->max_vs_threads = 72; - brw->max_gs_threads = 32; - brw->max_wm_threads = 12 * 6; - } else if (brw->is_g4x) { - brw->urb.size = 384; - brw->max_vs_threads = 32; - brw->max_gs_threads = 2; - brw->max_wm_threads = 10 * 5; - } else if (brw->gen < 6) { - brw->urb.size = 256; - brw->max_vs_threads = 16; - brw->max_gs_threads = 2; - brw->max_wm_threads = 8 * 4; + + if (brw->gen == 4 && !brw->is_g4x) brw->has_negative_rhw_bug = true; - } if (brw->gen <= 7) { brw->needs_unlit_centroid_workaround = true; diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c index 3345d9cbe26..7dad8ba85e7 100644 --- a/src/mesa/drivers/dri/i965/brw_device_info.c +++ b/src/mesa/drivers/dri/i965/brw_device_info.c @@ -27,15 +27,33 @@ static const struct brw_device_info brw_device_info_i965 = { .gen = 4, + .max_vs_threads = 16, + .max_gs_threads = 2, + .max_wm_threads = 8 * 4, + .urb = { + .size = 256, + }, }; static const struct brw_device_info brw_device_info_g4x = { .gen = 4, .is_g4x = true, + .max_vs_threads = 32, + .max_gs_threads = 2, + .max_wm_threads = 10 * 5, + .urb = { + .size = 384, + }, }; static const struct brw_device_info brw_device_info_ilk = { .gen = 5, + .max_vs_threads = 72, + .max_gs_threads = 32, + .max_wm_threads = 12 * 6, + .urb = { + .size = 1024, + }, }; static const struct brw_device_info brw_device_info_snb_gt1 = { @@ -43,6 +61,15 @@ static const struct brw_device_info brw_device_info_snb_gt1 = { .gt = 2, .has_hiz_and_separate_stencil = true, .has_llc = true, + .max_vs_threads = 24, + .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */ + .max_wm_threads = 40, + .urb = { + .size = 32, + .min_vs_entries = 24, + .max_vs_entries = 256, + .max_gs_entries = 256, + }, }; static const struct brw_device_info brw_device_info_snb_gt2 = { @@ -50,6 +77,15 @@ static const struct brw_device_info brw_device_info_snb_gt2 = { .gt = 2, .has_hiz_and_separate_stencil = true, .has_llc = true, + .max_vs_threads = 60, + .max_gs_threads = 60, + .max_wm_threads = 80, + .urb = { + .size = 64, + .min_vs_entries = 24, + .max_vs_entries = 256, + .max_gs_entries = 256, + }, }; #define GEN7_FEATURES \ @@ -60,27 +96,81 @@ static const struct brw_device_info brw_device_info_snb_gt2 = { static const struct brw_device_info brw_device_info_ivb_gt1 = { GEN7_FEATURES, .is_ivybridge = true, .gt = 1, + .max_vs_threads = 36, + .max_gs_threads = 36, + .max_wm_threads = 48, + .urb = { + .size = 128, + .min_vs_entries = 32, + .max_vs_entries = 512, + .max_gs_entries = 192, + }, }; static const struct brw_device_info brw_device_info_ivb_gt2 = { GEN7_FEATURES, .is_ivybridge = true, .gt = 2, + .max_vs_threads = 128, + .max_gs_threads = 128, + .max_wm_threads = 172, + .urb = { + .size = 256, + .min_vs_entries = 32, + .max_vs_entries = 704, + .max_gs_entries = 320, + }, }; static const struct brw_device_info brw_device_info_byt = { GEN7_FEATURES, .is_baytrail = true, .gt = 1, .has_llc = false, + .max_vs_threads = 36, + .max_gs_threads = 36, + .max_wm_threads = 48, + .urb = { + .size = 128, + .min_vs_entries = 32, + .max_vs_entries = 512, + .max_gs_entries = 192, + }, }; static const struct brw_device_info brw_device_info_hsw_gt1 = { GEN7_FEATURES, .is_haswell = true, .gt = 1, + .max_vs_threads = 70, + .max_gs_threads = 70, + .max_wm_threads = 102, + .urb = { + .size = 128, + .min_vs_entries = 32, + .max_vs_entries = 640, + .max_gs_entries = 256, + }, }; static const struct brw_device_info brw_device_info_hsw_gt2 = { GEN7_FEATURES, .is_haswell = true, .gt = 2, + .max_vs_threads = 280, + .max_gs_threads = 256, + .max_wm_threads = 204, + .urb = { + .size = 256, + .min_vs_entries = 64, + .max_vs_entries = 1664, + .max_gs_entries = 640, + }, }; static const struct brw_device_info brw_device_info_hsw_gt3 = { GEN7_FEATURES, .is_haswell = true, .gt = 3, + .max_vs_threads = 280, + .max_gs_threads = 256, + .max_wm_threads = 408, + .urb = { + .size = 512, + .min_vs_entries = 64, + .max_vs_entries = 1664, + .max_gs_entries = 640, + }, }; const struct brw_device_info * diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h index 9c2fecba8a3..0f4c282e336 100644 --- a/src/mesa/drivers/dri/i965/brw_device_info.h +++ b/src/mesa/drivers/dri/i965/brw_device_info.h @@ -39,6 +39,22 @@ struct brw_device_info bool must_use_separate_stencil; bool has_llc; + + /** + * GPU Limits: + * @{ + */ + unsigned max_vs_threads; + unsigned max_gs_threads; + unsigned max_wm_threads; + + struct { + unsigned size; + unsigned min_vs_entries; + unsigned max_vs_entries; + unsigned max_gs_entries; + } urb; + /** @} */ }; const struct brw_device_info *brw_get_device_info(int devid); |