summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
diff options
context:
space:
mode:
authorBen Skeggs <[email protected]>2007-01-23 16:25:25 +1100
committerBen Skeggs <[email protected]>2007-01-23 16:25:25 +1100
commit60c28739aa4afe543e0293c15a7aaf84ec2183ea (patch)
treef64482590056087a57be1480cee86d7710d06314 /src/mesa/drivers
parentcf33bcf0b246f75094673beaa989034fa27c4b9f (diff)
nouveau: DPH and CMP for NV40 which doesn't do it natively.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_shader_0.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c b/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c
index 3e542ea9c05..28c6ad803b1 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c
@@ -594,6 +594,30 @@ pass0_emulate_instruction(nouveauShader *nvs,
ARITH(NVS_OP_MAX, dest, mask, sat,
src[0], nvsNegate(src[0]), nvr_unused);
break;
+ case OPCODE_CMP:
+ /*XXX: this will clobber CC0... */
+ ARITH (NVS_OP_MOV, dest, mask, sat,
+ src[2], nvr_unused, nvr_unused);
+ pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
+ ARITHu(NVS_OP_MOV, temp, SMASK_ALL, 0,
+ src[0], nvr_unused, nvr_unused);
+ nvsinst->cond_update = 1;
+ nvsinst->cond_reg = 0;
+ ARITH (NVS_OP_MOV, dest, mask, sat,
+ src[1], nvr_unused, nvr_unused);
+ nvsinst->cond = COND_LT;
+ nvsinst->cond_reg = 0;
+ nvsinst->cond_test = 1;
+ break;
+ case OPCODE_DPH:
+ pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
+ ARITHu(NVS_OP_DP3, temp, SMASK_X, 0,
+ src[0], src[1], nvr_unused);
+ ARITH (NVS_OP_ADD, dest, mask, sat,
+ nvsSwizzle(temp, X, X, X, X),
+ nvsSwizzle(src[1], W, W, W, W),
+ nvr_unused);
+ break;
case OPCODE_KIL:
/* This is only in ARB shaders, so we don't have to worry
* about clobbering a CC reg as they aren't supported anyway.