diff options
author | Kenneth Graunke <[email protected]> | 2012-01-26 05:38:28 -0800 |
---|---|---|
committer | Ian Romanick <[email protected]> | 2012-01-27 18:02:43 -0800 |
commit | 4aa158d09aab294845d33027dc1ef42056dec90a (patch) | |
tree | aabb598fc07ab1120eedfa90c36b70728b13129d /src/mesa/drivers | |
parent | 38b76cf8319168c3628cc18c6231e9a081a2481b (diff) |
i965/vs: Use the sampler for VS pull constant loading on Ivybridge.
Substantially increases performance in GLBenchmark PRO:
- 320x240 => 3.28x
- 1920x1080 => 1.47x
- 2560x1440 => 1.27x
The LD message ignores the sampler unit index and SAMPLER_STATE pointer,
instead relying on hard-wired default state. Thus, there's no need to
worry about running out of sampler units or providing SAMPLER_STATE;
this small patch should be all that's required.
NOTE: This is a candidate for release branches.
(It requires the preceding commit to compile.)
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
(cherry picked from commit 259b65e2e7938de4aab323033cfe2b33369ddb07)
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index dbe4dd093dd..917c927a125 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -647,6 +647,23 @@ vec4_visitor::generate_pull_constant_load(vec4_instruction *inst, struct brw_reg dst, struct brw_reg index) { + if (intel->gen == 7) { + gen6_resolve_implied_move(p, &index, inst->base_mrf); + brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND); + brw_set_dest(p, insn, dst); + brw_set_src0(p, insn, index); + brw_set_sampler_message(p, insn, + SURF_INDEX_VERT_CONST_BUFFER, + 0, /* LD message ignores sampler unit */ + GEN5_SAMPLER_MESSAGE_SAMPLE_LD, + 1, /* rlen */ + 1, /* mlen */ + false, /* no header */ + BRW_SAMPLER_SIMD_MODE_SIMD4X2, + 0); + return; + } + struct brw_reg header = brw_vec8_grf(0, 0); gen6_resolve_implied_move(p, &header, inst->base_mrf); |