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authorNanley Chery <[email protected]>2018-07-23 10:09:20 -0700
committerNanley Chery <[email protected]>2018-08-22 13:53:02 -0700
commitb041fc06491f4a017458df4a58d4ac519bb3bc94 (patch)
tree85b8f85e47ca62221a65c1aefc783ffbda72cd97 /src/mesa/drivers
parent030b6efcfdeff5cc079d5b6d8e682e180570ce71 (diff)
i965/miptree: Fix can_blit_slice()
Check the destination's row pitch against the BLT engine's row pitch limitation as well. Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3 ("i965/miptree: Use the correct BLT pitch") v2: Fix the Fixes tag (Dylan). Check the destination row pitch (Chris). Reported-by: Dylan Baker <[email protected]> Cc: <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b477c97e51d..983f145afc9 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -3545,10 +3545,9 @@ can_blit_slice(struct intel_mipmap_tree *mt,
const struct intel_miptree_map *map)
{
/* See intel_miptree_blit() for details on the 32k pitch limit. */
- if (intel_miptree_blt_pitch(mt) >= 32768)
- return false;
-
- return true;
+ const unsigned src_blt_pitch = intel_miptree_blt_pitch(mt);
+ const unsigned dst_blt_pitch = ALIGN(map->w * mt->cpp, 64);
+ return src_blt_pitch < 32768 && dst_blt_pitch < 32768;
}
static bool