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authorPaul Berry <[email protected]>2012-05-09 06:57:06 -0700
committerPaul Berry <[email protected]>2012-05-25 08:45:11 -0700
commit1c73c705fadf164d61003415e3380f2d06f2e7b3 (patch)
tree2491e6b08311ba2a919b9b844fec7c0cc41e362b /src/mesa/drivers
parentf2cdfa4c8522b6b0f5d1b0a6c42ed39e0d47c876 (diff)
i965/blorp: Implement proper texel fetch messages for Gen7.
On Gen6, texel fetch is always accomplished using the SAMPLE_LD message, which accepts arguments (u, v, r, lod, si). On Gen7, there are two* texel fetch messages: SAMPLE_LD for non-MSAA surfaces, taking arguments (u, lod, v), and SAMPLE_LD2DSS for MSAA surfaces, taking arguments (si, u, v). *Technically, there are other texel fetch messages, but they are used for "compressed" MSAA surfaces, which we don't yet support. This patch adds the proper message types and argument orderings for Gen7. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp32
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h1
2 files changed, 31 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 31e4556f374..47452b8d64d 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -944,15 +944,43 @@ brw_blorp_blit_program::sample()
void
brw_blorp_blit_program::texel_fetch()
{
- static const sampler_message_arg args[5] = {
+ static const sampler_message_arg gen6_args[5] = {
SAMPLER_MESSAGE_ARG_U_INT,
SAMPLER_MESSAGE_ARG_V_INT,
SAMPLER_MESSAGE_ARG_ZERO_INT, /* R */
SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
SAMPLER_MESSAGE_ARG_SI_INT
};
+ static const sampler_message_arg gen7_ld_args[3] = {
+ SAMPLER_MESSAGE_ARG_U_INT,
+ SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
+ SAMPLER_MESSAGE_ARG_V_INT
+ };
+ static const sampler_message_arg gen7_ld2dss_args[3] = {
+ SAMPLER_MESSAGE_ARG_SI_INT,
+ SAMPLER_MESSAGE_ARG_U_INT,
+ SAMPLER_MESSAGE_ARG_V_INT
+ };
- texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE_LD, args, s_is_zero ? 2 : 5);
+ switch (brw->intel.gen) {
+ case 6:
+ texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE_LD, gen6_args,
+ s_is_zero ? 2 : 5);
+ break;
+ case 7:
+ if (key->tex_samples > 0) {
+ texture_lookup(GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS,
+ gen7_ld2dss_args, ARRAY_SIZE(gen7_ld2dss_args));
+ } else {
+ assert(s_is_zero);
+ texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE_LD, gen7_ld_args,
+ ARRAY_SIZE(gen7_ld_args));
+ }
+ break;
+ default:
+ assert(!"Should not get here.");
+ break;
+ };
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 0482058875e..467a418eaa2 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -832,6 +832,7 @@ enum brw_message_target {
#define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6
#define GEN5_SAMPLER_MESSAGE_SAMPLE_LD 7
#define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10
+#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS 31
/* for GEN5 only */
#define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0