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authorJeff Smith <[email protected]>2008-06-13 09:50:43 -0500
committerBrian Paul <[email protected]>2010-03-12 08:55:05 -0700
commitfab1f07d6ad01463897ae792f4b33738afb07369 (patch)
treea2905eb93364a4479c97cdf2bae36c49586f427b /src/mesa/drivers
parent39c2d3ecd9432262bb157da3bb6103f84a4375e5 (diff)
Grammar and spelling fixes
Signed-off-by: Jeff Smith <[email protected]> Signed-off-by: Brian Paul <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/common/dri_util.c2
-rw-r--r--src/mesa/drivers/dri/r128/r128_tex.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_reg.h2
-rw-r--r--src/mesa/drivers/dri/r300/r300_reg.h4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c2
-rw-r--r--src/mesa/drivers/x11/xmesa.h2
-rw-r--r--src/mesa/drivers/x11/xmesaP.h2
7 files changed, 8 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c
index 890ae513397..75c98825b79 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -698,7 +698,7 @@ setupLoaderExtensions(__DRIscreen *psp,
* \param drm_version Version of the kernel DRM.
* \param frame_buffer Data describing the location and layout of the
* framebuffer.
- * \param pSAREA Pointer the the SAREA.
+ * \param pSAREA Pointer to the SAREA.
* \param fd Device handle for the DRM.
* \param extensions ??
* \param driver_modes Returns modes suppoted by the driver
diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c
index 24fbf8f5194..4ec4be9a47b 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.c
+++ b/src/mesa/drivers/dri/r128/r128_tex.c
@@ -468,7 +468,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target,
* certain point. It is better than completely ignoring the LOD
* bias. Unfortunately there isn't much range in the bias, the
* spec mentions strides that vary between 0.5 and 2.0 but these
- * numbers don't seem to relate the the GL LOD bias value at all.
+ * numbers don't seem to relate to the GL LOD bias value at all.
*/
if ( param[0] >= 1.0 ) {
bias = -128;
diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h
index 59115212cee..b3a4940a7ad 100644
--- a/src/mesa/drivers/dri/r200/r200_reg.h
+++ b/src/mesa/drivers/dri/r200/r200_reg.h
@@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0
# define R200_PVS_CNTL_1_POS_END_SHIFT 10
# define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
#define R200_VAP_PVS_CNTL_2 0x22d4
# define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
# define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index d18ebab8ff2..ac93563ed9e 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -482,7 +482,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_PVS_FIRST_INST_SHIFT 0
# define R300_PVS_XYZW_VALID_INST_SHIFT 10
# define R300_PVS_LAST_INST_SHIFT 20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
#define R300_VAP_PVS_CONST_CNTL 0x22D4
# define R300_PVS_CONST_BASE_OFFSET_SHIFT 0
# define R300_PVS_MAX_CONST_ADDR_SHIFT 16
@@ -1760,7 +1760,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* The destination register index is in FPI1 (color) and FPI3 (alpha)
* together with enable bits.
* There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
+ * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
* /DSTA_OUTPUT). You can write to both at once, or not write at all (the
* same index must be used for both).
*
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 0ce97e86972..583751d64df 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -1900,7 +1900,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
So: if we need the q coord in the end (solely determined by the texture
target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
Additionally, if we don't have texgen but 4 tex coords submitted, we swap
- column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
+ column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord
will get submitted in the "wrong", i.e. 3rd, slot.
If an app submits 3 coords for 2d targets, we assume it is saving on vertex
size and using the texture matrix to swap the r and q coords around (ut2k3
diff --git a/src/mesa/drivers/x11/xmesa.h b/src/mesa/drivers/x11/xmesa.h
index 98139af8336..f63626a9702 100644
--- a/src/mesa/drivers/x11/xmesa.h
+++ b/src/mesa/drivers/x11/xmesa.h
@@ -287,7 +287,7 @@ extern void XMesaCopySubBuffer( XMesaBuffer b,
/*
- * Return a pointer to the the Pixmap or XImage being used as the back
+ * Return a pointer to the Pixmap or XImage being used as the back
* color buffer of an XMesaBuffer. This function is a way to get "under
* the hood" of X/Mesa so one can manipulate the back buffer directly.
* Input: b - the XMesaBuffer
diff --git a/src/mesa/drivers/x11/xmesaP.h b/src/mesa/drivers/x11/xmesaP.h
index 3ffd7661e35..e0a6908228d 100644
--- a/src/mesa/drivers/x11/xmesaP.h
+++ b/src/mesa/drivers/x11/xmesaP.h
@@ -431,7 +431,7 @@ extern const int xmesa_kernel8[DITH_DY * DITH_DX];
* If pixelformat==PF_HPCR:
*
* HP Color Recovery dithering ([email protected] 30/08/95)
- * HP has on it's 8-bit 700-series computers, a feature called
+ * HP has on its 8-bit 700-series computers, a feature called
* 'Color Recovery'. This allows near 24-bit output (so they say).
* It is enabled by selecting the 8-bit TrueColor visual AND
* corresponding colormap (see tkInitWindow) AND doing some special