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authorEric Anholt <[email protected]>2012-05-21 14:58:17 -0700
committerEric Anholt <[email protected]>2012-05-23 10:18:27 -0700
commit39a91be20d0592af4f93458364d027b7ade6b2ba (patch)
tree005f40ac0f1006547e590c2322f338922ff08aa5 /src/mesa/drivers
parent54308f78a2f8675bfd854761f9cd8a6b71e119d0 (diff)
i965/gen7: Add CC viewport setup to blorp code.
When doing fast clears, a fulsim warning said that the batch was being emitted without the viewport set up. While the fast clear pass I was looking at doesn't use the clear value, the later resolves which also didn't set up the vieport would trigger the same. It's not obvious from the error message whether it meant "fast clear value gets clamped to something you haven't defined" or "fast clear value doesn't get clamped, and I saw it was out of the current (uninitialized) range, and you probably wanted it clamped to that (uninitialized) range". Be paranoid and assume the first case. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_blorp.cpp21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 7ef0d36359f..4cad96639b8 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -110,6 +110,26 @@ gen7_blorp_emit_cc_state_pointer(struct brw_context *brw,
ADVANCE_BATCH();
}
+static void
+gen7_blorp_emit_cc_viewport(struct brw_context *brw,
+ const brw_blorp_params *params)
+{
+ struct intel_context *intel = &brw->intel;
+ struct brw_cc_viewport *ccv;
+ uint32_t cc_vp_offset;
+
+ ccv = (struct brw_cc_viewport *)brw_state_batch(brw, AUB_TRACE_CC_VP_STATE,
+ sizeof(*ccv), 32,
+ &cc_vp_offset);
+ ccv->min_depth = 0.0;
+ ccv->max_depth = 1.0;
+
+ BEGIN_BATCH(2);
+ OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS_CC << 16 | (2 - 2));
+ OUT_BATCH(cc_vp_offset);
+ ADVANCE_BATCH();
+}
+
/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS
*
@@ -765,6 +785,7 @@ gen7_blorp_exec(struct intel_context *intel,
gen7_blorp_emit_constant_ps(brw, params, wm_push_const_offset);
}
gen7_blorp_emit_ps_config(brw, params, prog_offset, prog_data);
+ gen7_blorp_emit_cc_viewport(brw, params);
if (params->depth.mt)
gen7_blorp_emit_depth_stencil_config(brw, params);