diff options
author | Francisco Jerez <[email protected]> | 2016-07-01 13:54:05 -0700 |
---|---|---|
committer | Francisco Jerez <[email protected]> | 2016-08-25 18:36:08 -0700 |
commit | ecc4800383fb67cd274154469d933c6050782208 (patch) | |
tree | f86765b0cc7c06f68b1a6faa77d34a9332a3afd1 /src/mesa/drivers | |
parent | 786108e7b27e4728353d69ff60aa046987859d8e (diff) |
i965: Implement glBlendBarrier.
This is a no-op if the platform supports coherent framebuffer fetch,
-- If it doesn't we just need to flush the render cache and invalidate
the texture cache in order for previous rendering to be visible to
framebuffer fetch.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 0e55c7ba18e..9d32dd3c3ff 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -310,6 +310,25 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers) brw_emit_pipe_control_flush(brw, bits); } +static void +brw_blend_barrier(struct gl_context *ctx) +{ + struct brw_context *brw = brw_context(ctx); + + if (!ctx->Extensions.MESA_shader_framebuffer_fetch) { + if (brw->gen >= 6) { + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); + } else { + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH); + } + } +} + void brw_add_texrect_params(struct gl_program *prog) { @@ -379,6 +398,7 @@ void brwInitFragProgFuncs( struct dd_function_table *functions ) functions->LinkShader = brw_link_shader; functions->MemoryBarrier = brw_memory_barrier; + functions->BlendBarrier = brw_blend_barrier; } struct shader_times { |