Merge remote branch 'origin/master' into lp-binning

Conflicts:
	Makefile
	src/gallium/auxiliary/util/u_surface.c
	src/gallium/drivers/llvmpipe/lp_flush.c
	src/gallium/drivers/llvmpipe/lp_setup.c
	src/gallium/drivers/llvmpipe/lp_state_derived.c
	src/gallium/drivers/llvmpipe/lp_state_fs.c
	src/gallium/drivers/llvmpipe/lp_state_surface.c
	src/gallium/drivers/llvmpipe/lp_tex_cache.c
	src/gallium/drivers/llvmpipe/lp_texture.c
	src/gallium/drivers/llvmpipe/lp_tile_cache.c
	src/mesa/state_tracker/st_cb_condrender.c

221 files changed, 2183 insertions, 5438 deletions

diff --git a/src/mesa/drivers/dri/common/spantmp2.h b/src/mesa/drivers/dri/common/spantmp2.h
index 447f3d15b95..c1522269022 100644
--- a/src/mesa/drivers/dri/common/spantmp2.h
+++ b/src/mesa/drivers/dri/common/spantmp2.h
@@ -400,7 +400,7 @@
 #  define READ_RGBA( rgba, _x, _y )				        \
      do {								\
         GLuint p = GET_VALUE(_x, _y);					\
-        *((uint32_t *) rgba) = (t << 8) | 0xff;				\
+        *((uint32_t *) rgba) = (p << 8) | 0xff;				\
      } while (0)
 # else
 #  define READ_RGBA( rgba, _x, _y )				        \
diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
index b272eb74eaf..81d026a697c 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -34,7 +34,6 @@
 #include "main/mtypes.h"
 #include "main/cpuinfo.h"
 #include "main/extensions.h"
-#include "glapi/dispatch.h"
 #include "utils.h"
 
 
diff --git a/src/mesa/drivers/dri/fb/Makefile b/src/mesa/drivers/dri/fb/Makefile
index cf9b3a85563..848e2041e27 100644
--- a/src/mesa/drivers/dri/fb/Makefile
+++ b/src/mesa/drivers/dri/fb/Makefile
@@ -5,9 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = fb_dri.so
 
-ifeq ($(USING_EGL), 1)
-EGL_SOURCES = server/radeon_egl.c
-endif
 
 DRIVER_SOURCES = \
 	fb_dri.c \
diff --git a/src/mesa/drivers/dri/fb/fb_egl.c b/src/mesa/drivers/dri/fb/fb_egl.c
deleted file mode 100644
index 02e44bb8eed..00000000000
--- a/src/mesa/drivers/dri/fb/fb_egl.c
+++ /dev/null
@@ -1,881 +0,0 @@
-/*
- * Test egl driver for fb_dri.so
- */
-#include <assert.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dirent.h> 
-#include <errno.h>
-#include <fcntl.h>
-#include <sys/ioctl.h>
-#include <sys/mman.h>
-#include <linux/fb.h>
-
-#include "utils.h"
-#include "buffers.h"
-#include "main/extensions.h"
-#include "main/framebuffer.h"
-#include "main/renderbuffer.h"
-#include "vbo/vbo.h"
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/tnl.h"
-#include "tnl/tcontext.h"
-#include "tnl/t_pipeline.h"
-#include "drivers/common/driverfuncs.h"
-#include "drirenderbuffer.h"
-
-#include "eglconfig.h"
-#include "eglmain/context.h"
-#include "egldisplay.h"
-#include "egldriver.h"
-#include "eglglobals.h"
-#include "eglmode.h"
-#include "eglscreen.h"
-#include "eglsurface.h"
-
-extern void
-fbSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis);
-
-/**
- * fb driver-specific driver class derived from _EGLDriver
- */
-typedef struct fb_driver
-{
-   _EGLDriver Base;  /* base class/object */
-   GLuint fbStuff;
-} fbDriver;
-
-/**
- * fb display-specific driver class derived from _EGLDisplay
- */
-typedef struct fb_display
-{
-   _EGLDisplay Base;  /* base class/object */
-   void *pFB;
-} fbDisplay;
-
-/**
- * fb driver-specific screen class derived from _EGLScreen
- */
-typedef struct fb_screen
-{
-   _EGLScreen Base;
-   char fb[NAME_MAX];
-} fbScreen;
-
-
-/**
- * fb driver-specific surface class derived from _EGLSurface
- */
-typedef struct fb_surface
-{
-   _EGLSurface Base;  /* base class/object */
-   struct gl_framebuffer *mesa_framebuffer;
-} fbSurface;
-
-
-/**
- * fb driver-specific context class derived from _EGLContext
- */
-typedef struct fb_context
-{
-   _EGLContext Base;  /* base class/object */
-   GLcontext *glCtx;
-   struct {
-      __DRIcontext *context;	
-      __DRIscreen *screen;	
-      __DRIdrawable *drawable; /* drawable bound to this ctx */
-   } dri;
-} fbContext, *fbContextPtr;
-
-#define FB_CONTEXT(ctx)		((fbContextPtr)(ctx->DriverCtx))
-
-
-static EGLBoolean
-fbFillInConfigs(_EGLDisplay *disp, unsigned pixel_bits, unsigned depth_bits,
-               unsigned stencil_bits, GLboolean have_back_buffer) {
-   _EGLConfig *configs;
-   _EGLConfig *c;
-   unsigned int i, num_configs;
-   unsigned int depth_buffer_factor;
-   unsigned int back_buffer_factor;
-   GLenum fb_format;
-   GLenum fb_type;
-
-   /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
-   * enough to add support.  Basically, if a context is created with an
-   * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
-   * will never be used.
-   */
-   static const GLenum back_buffer_modes[] = {
-            GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
-         };
-
-   uint8_t depth_bits_array[2];
-   uint8_t stencil_bits_array[2];
-
-   depth_bits_array[0] = 0;
-   depth_bits_array[1] = depth_bits;
-
-   /* Just like with the accumulation buffer, always provide some modes
-   * with a stencil buffer.  It will be a sw fallback, but some apps won't
-   * care about that.
-   */
-   stencil_bits_array[0] = 0;
-   stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
-
-   depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
-   back_buffer_factor = (have_back_buffer) ? 2 : 1;
-
-   num_configs = depth_buffer_factor * back_buffer_factor * 2;
-
-   if (pixel_bits == 16) {
-      fb_format = GL_RGB;
-      fb_type = GL_UNSIGNED_SHORT_5_6_5;
-   } else {
-      fb_format = GL_RGBA;
-      fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
-   }
-
-   configs = calloc(sizeof(*configs), num_configs);
-   c = configs;
-   if (!_eglFillInConfigs(c, fb_format, fb_type,
-                          depth_bits_array, stencil_bits_array, depth_buffer_factor,
-                          back_buffer_modes, back_buffer_factor,
-                          GLX_TRUE_COLOR)) {
-      fprintf(stderr, "[%s:%u] Error creating FBConfig!\n",
-               __func__, __LINE__);
-      return EGL_FALSE;
-   }
-
-   /* Mark the visual as slow if there are "fake" stencil bits.
-   */
-   for (i = 0, c = configs; i < num_configs; i++, c++) {
-      int stencil = GET_CONFIG_ATTRIB(c, EGL_STENCIL_SIZE);
-      if ((stencil != 0)  && (stencil != stencil_bits)) {
-         SET_CONFIG_ATTRIB(c, EGL_CONFIG_CAVEAT, EGL_SLOW_CONFIG);
-      }
-   }
-
-   for (i = 0, c = configs; i < num_configs; i++, c++)
-      _eglAddConfig(disp, c);
-      
-   free(configs);
-   
-   return EGL_TRUE;
-}
-
-static EGLBoolean
-fbSetupFramebuffer(fbDisplay *disp, char *fbdev) 
-{
-   int fd;
-   char dev[20];
-   struct fb_var_screeninfo varInfo;
-   struct fb_fix_screeninfo fixedInfo;
-   
-   snprintf(dev, sizeof(dev), "/dev/%s", fbdev);
-
-   /* open the framebuffer device */
-   fd = open(dev, O_RDWR);
-   if (fd < 0) {
-      fprintf(stderr, "Error opening %s: %s\n", fbdev, strerror(errno));
-      return EGL_FALSE;
-   }
-
-   /* get the original variable screen info */
-   if (ioctl(fd, FBIOGET_VSCREENINFO, &varInfo)) {
-      fprintf(stderr, "error: ioctl(FBIOGET_VSCREENINFO) failed: %s\n",
-               strerror(errno));
-      return EGL_FALSE;
-   }
-
-   /* Turn off hw accels (otherwise mmap of mmio region will be
-    * refused)
-    */
-   if (varInfo.accel_flags) {
-      varInfo.accel_flags = 0;
-      if (ioctl(fd, FBIOPUT_VSCREENINFO, &varInfo)) {
-         fprintf(stderr, "error: ioctl(FBIOPUT_VSCREENINFO) failed: %s\n",
-                  strerror(errno));
-         return EGL_FALSE;
-      }
-   }
-
-   /* Get the fixed screen info */
-   if (ioctl(fd, FBIOGET_FSCREENINFO, &fixedInfo)) {
-      fprintf(stderr, "error: ioctl(FBIOGET_FSCREENINFO) failed: %s\n",
-               strerror(errno));
-      return EGL_FALSE;
-   }
-   
-   if (fixedInfo.visual == FB_VISUAL_DIRECTCOLOR) {
-      struct fb_cmap cmap;
-      unsigned short red[256], green[256], blue[256];
-      int rcols = 1 << varInfo.red.length;
-      int gcols = 1 << varInfo.green.length;
-      int bcols = 1 << varInfo.blue.length;
-      int i;
-
-      cmap.start = 0;      
-      cmap.len = gcols;
-      cmap.red   = red;
-      cmap.green = green;
-      cmap.blue  = blue;
-      cmap.transp = NULL;
-
-      for (i = 0; i < rcols ; i++) 
-         red[i] = (65536/(rcols-1)) * i;
-
-      for (i = 0; i < gcols ; i++) 
-         green[i] = (65536/(gcols-1)) * i;
-
-      for (i = 0; i < bcols ; i++) 
-         blue[i] = (65536/(bcols-1)) * i;
-      
-      if (ioctl(fd, FBIOPUTCMAP, (void *) &cmap) < 0) {
-         fprintf(stderr, "ioctl(FBIOPUTCMAP) failed [%d]\n", i);
-         exit(1);
-      }
-   }
-
-   /* mmap the framebuffer into our address space */
-   if (!disp->pFB)
-      disp->pFB = (caddr_t)mmap(0,  /* start */
-                      fixedInfo.smem_len,  /* bytes */
-                      PROT_READ | PROT_WRITE,  /* prot */
-                      MAP_SHARED,  /* flags */
-                      fd,  /* fd */
-                      0); /* offset */ 
-   if (disp->pFB == (caddr_t)-1) {
-      fprintf(stderr, "error: unable to mmap framebuffer: %s\n",
-               strerror(errno));
-      return EGL_FALSE;
-   }
-   
-   return EGL_TRUE;
-}
-   
-const char *sysfs = "/sys/class/graphics";
-
-static EGLBoolean
-fbInitialize(_EGLDriver *drv, EGLDisplay dpy, EGLint *major, EGLint *minor)
-{
-   _EGLDisplay *disp = _eglLookupDisplay(dpy);
-   fbDisplay *display;
-   fbScreen *s;
-   _EGLScreen *scrn;
-   char c;
-   unsigned int x, y, r;
-   DIR *dir;
-   FILE *file;
-   struct dirent *dirent;
-   char path[NAME_MAX];
-   
-   /* Switch display structure to one with our private fields */
-   display = calloc(1, sizeof(*display));
-   display->Base = *disp;
-   _eglHashInsert(_eglGlobal.Displays, disp->Handle, display);
-   free(disp);
-   
-   *major = 1;
-   *minor = 0;
-   
-   dir = opendir(sysfs);
-   if (!dir) {
-      printf("EGL - %s framebuffer device not found.", sysfs);
-      return EGL_FALSE;
-   }
-   
-   while ((dirent = readdir(dir))) {  /* assignment! */
-      
-      if (dirent->d_name[0] != 'f')
-         continue;
-      if (dirent->d_name[1] != 'b')
-         continue;
-   
-      if (fbSetupFramebuffer(display, dirent->d_name) == EGL_FALSE)
-         continue;
-         
-      /* Create a screen */
-      s = (fbScreen *) calloc(1, sizeof(fbScreen));
-      if (!s)
-         return EGL_FALSE;
-
-      strncpy(s->fb, dirent->d_name, NAME_MAX);
-      scrn = &s->Base;
-      _eglInitScreen(scrn);
-      _eglAddScreen(&display->Base, scrn);
-      
-      snprintf(path, sizeof(path), "%s/%s/modes", sysfs, s->fb);
-      file = fopen(path, "r");
-      while (fgets(path, sizeof(path), file)) {
-         sscanf(path, "%c:%ux%u-%u", &c, &x, &y, &r);
-         _eglAddMode(scrn, x, y, r * 1000, path);
-      }
-      fclose(file);
-
-      fbFillInConfigs(&display->Base, 32, 24, 8, 1);
-      
-   }
-   closedir(dir);
-
-   drv->Initialized = EGL_TRUE;
-   return EGL_TRUE;
-}
-
-
-static fbDisplay *
-Lookup_fbDisplay(EGLDisplay dpy)
-{
-   _EGLDisplay *d = _eglLookupDisplay(dpy);
-   return (fbDisplay *) d;
-}
-
-
-static fbScreen *
-Lookup_fbScreen(EGLDisplay dpy, EGLScreenMESA screen)
-{
-   _EGLScreen *s = _eglLookupScreen(dpy, screen);
-   return (fbScreen *) s;
-}
-
-
-static fbContext *
-Lookup_fbContext(EGLContext ctx)
-{
-   _EGLContext *c = _eglLookupContext(ctx);
-   return (fbContext *) c;
-}
-
-
-static fbSurface *
-Lookup_fbSurface(EGLSurface surf)
-{
-   _EGLSurface *s = _eglLookupSurface(surf);
-   return (fbSurface *) s;
-}
-
-
-static EGLBoolean
-fbTerminate(_EGLDriver *drv, EGLDisplay dpy)
-{
-   fbDisplay *display = Lookup_fbDisplay(dpy);
-   _eglCleanupDisplay(&display->Base);
-   free(display);
-   free(drv);
-   return EGL_TRUE;
-}
-
-
-static const GLubyte *
-get_string(GLcontext *ctx, GLenum pname)
-{
-   (void) ctx;
-   switch (pname) {
-      case GL_RENDERER:
-         return (const GLubyte *) "Mesa dumb framebuffer";
-      default:
-         return NULL;
-   }
-}
-
-
-static void
-update_state( GLcontext *ctx, GLuint new_state )
-{
-   /* not much to do here - pass it on */
-   _swrast_InvalidateState( ctx, new_state );
-   _swsetup_InvalidateState( ctx, new_state );
-   _vbo_InvalidateState( ctx, new_state );
-   _tnl_InvalidateState( ctx, new_state );
-}
-
-
-/**
- * Called by ctx->Driver.GetBufferSize from in core Mesa to query the
- * current framebuffer size.
- */
-static void
-get_buffer_size( GLframebuffer *buffer, GLuint *width, GLuint *height )
-{
-   *width  = buffer->Width;
-   *height = buffer->Height;
-}
-
-
-static void
-updateFramebufferSize(GLcontext *ctx)
-{
-   fbContextPtr fbmesa = FB_CONTEXT(ctx);
-   struct gl_framebuffer *fb = ctx->WinSysDrawBuffer;
-   if (fbmesa->dri.drawable->w != fb->Width ||
-       fbmesa->dri.drawable->h != fb->Height) {
-      driUpdateFramebufferSize(ctx, fbmesa->dri.drawable);
-   }
-}
-
-static void
-viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-   /* XXX this should be called after we acquire the DRI lock, not here */
-   updateFramebufferSize(ctx);
-}
-
-
-static void
-init_core_functions( struct dd_function_table *functions )
-{
-   functions->GetString = get_string;
-   functions->UpdateState = update_state;
-   functions->GetBufferSize = get_buffer_size;
-   functions->Viewport = viewport;
-
-   functions->Clear = _swrast_Clear;  /* could accelerate with blits */
-}
-
-
-static EGLContext
-fbCreateContext(_EGLDriver *drv, EGLDisplay dpy, EGLConfig config, EGLContext share_list, const EGLint *attrib_list)
-{
-   GLcontext *ctx;
-   _EGLConfig *conf;
-   fbContext *c;
-   _EGLDisplay *disp = _eglLookupDisplay(dpy);
-   struct dd_function_table functions;
-   GLvisual vis;
-   int i;
-
-   conf = _eglLookupConfig(drv, dpy, config);
-   if (!conf) {
-      _eglError(EGL_BAD_CONFIG, "eglCreateContext");
-      return EGL_NO_CONTEXT;
-   }
-
-   for (i = 0; attrib_list && attrib_list[i] != EGL_NONE; i++) {
-      switch (attrib_list[i]) {
-         /* no attribs defined for now */
-      default:
-         _eglError(EGL_BAD_ATTRIBUTE, "eglCreateContext");
-         return EGL_NO_CONTEXT;
-      }
-   }
-
-   c = (fbContext *) calloc(1, sizeof(fbContext));
-   if (!c)
-      return EGL_NO_CONTEXT;
-
-   _eglInitContext(&c->Base);
-   c->Base.Display = disp;
-   c->Base.Config = conf;
-   c->Base.DrawSurface = EGL_NO_SURFACE;
-   c->Base.ReadSurface = EGL_NO_SURFACE;
-
-   /* link to display */
-   _eglLinkContext(&c->Base, disp);
-   assert(c->Base.Handle);
-
-   /* Init default driver functions then plug in our FBdev-specific functions
-    */
-   _mesa_init_driver_functions(&functions);
-   init_core_functions(&functions);
-
-   _eglConfigToContextModesRec(conf, &vis);
-
-   ctx = c->glCtx = _mesa_create_context(&vis, NULL, &functions, (void *)c);
-   if (!c->glCtx) {
-      _mesa_free(c);
-      return GL_FALSE;
-   }
-
-   /* Create module contexts */
-   _swrast_CreateContext( ctx );
-   _vbo_CreateContext( ctx );
-   _tnl_CreateContext( ctx );
-   _swsetup_CreateContext( ctx );
-   _swsetup_Wakeup( ctx );
-
-
-   /* use default TCL pipeline */
-   {
-      TNLcontext *tnl = TNL_CONTEXT(ctx);
-      tnl->Driver.RunPipeline = _tnl_run_pipeline;
-   }
-
-   _mesa_enable_sw_extensions(ctx);
-
-   return c->Base.Handle;
-}
-
-
-static EGLSurface
-fbCreateWindowSurface(_EGLDriver *drv, EGLDisplay dpy, EGLConfig config, NativeWindowType window, const EGLint *attrib_list)
-{
-   int i;
-   for (i = 0; attrib_list && attrib_list[i] != EGL_NONE; i++) {
-      switch (attrib_list[i]) {
-         /* no attribs at this time */
-      default:
-         _eglError(EGL_BAD_ATTRIBUTE, "eglCreateWindowSurface");
-         return EGL_NO_SURFACE;
-      }
-   }
-   printf("eglCreateWindowSurface()\n");
-   /* XXX unfinished */
-
-   return EGL_NO_SURFACE;
-}
-
-
-static EGLSurface
-fbCreatePixmapSurface(_EGLDriver *drv, EGLDisplay dpy, EGLConfig config, NativePixmapType pixmap, const EGLint *attrib_list)
-{
-   _EGLConfig *conf;
-   EGLint i;
-
-   conf = _eglLookupConfig(drv, dpy, config);
-   if (!conf) {
-      _eglError(EGL_BAD_CONFIG, "eglCreatePixmapSurface");
-      return EGL_NO_SURFACE;
-   }
-
-   for (i = 0; attrib_list && attrib_list[i] != EGL_NONE; i++) {
-      switch (attrib_list[i]) {
-         /* no attribs at this time */
-      default:
-         _eglError(EGL_BAD_ATTRIBUTE, "eglCreatePixmapSurface");
-         return EGL_NO_SURFACE;
-      }
-   }
-
-   if (conf->Attrib[EGL_SURFACE_TYPE - FIRST_ATTRIB] == 0) {
-      _eglError(EGL_BAD_MATCH, "eglCreatePixmapSurface");
-      return EGL_NO_SURFACE;
-   }
-
-   printf("eglCreatePixmapSurface()\n");
-   return EGL_NO_SURFACE;
-}
-
-
-static EGLSurface
-fbCreatePbufferSurface(_EGLDriver *drv, EGLDisplay dpy, EGLConfig config, const EGLint *attrib_list)
-{
-   fbSurface *surf;
-
-   surf = (fbSurface *) calloc(1, sizeof(fbSurface));
-   if (!surf) {
-      return EGL_NO_SURFACE;
-   }
-
-   if (_eglInitPbufferSurface(&surf->Base, drv, dpy, config, attrib_list) == EGL_NO_SURFACE) {
-      free(surf);
-      return EGL_NO_SURFACE;
-   }
-
-   /* create software-based pbuffer */
-   {
-      GLcontext *ctx = NULL; /* this _should_ be OK */
-      GLvisual vis;
-      _EGLConfig *conf = _eglLookupConfig(drv, dpy, config);
-      assert(conf); /* bad config should be caught earlier */
-      _eglConfigToContextModesRec(conf, &vis);
-
-      surf->mesa_framebuffer = _mesa_create_framebuffer(&vis);
-      _mesa_add_soft_renderbuffers(surf->mesa_framebuffer,
-                                   GL_TRUE, /* color bufs */
-                                   vis.haveDepthBuffer,
-                                   vis.haveStencilBuffer,
-                                   vis.haveAccumBuffer,
-                                   GL_FALSE, /* alpha */
-                                   GL_FALSE /* aux */ );
-
-      /* set pbuffer/framebuffer size */
-      _mesa_resize_framebuffer(ctx, surf->mesa_framebuffer,
-                               surf->Base.Width, surf->Base.Height);
-   }
-
-   return surf->Base.Handle;
-}
-
-
-static EGLBoolean
-fbDestroySurface(_EGLDriver *drv, EGLDisplay dpy, EGLSurface surface)
-{
-   fbSurface *fs = Lookup_fbSurface(surface);
-   _eglUnlinkSurface(&fs->Base);
-   if (!_eglIsSurfaceBound(&fs->Base))
-      free(fs);
-   return EGL_TRUE;
-}
-
-
-static EGLBoolean
-fbDestroyContext(_EGLDriver *drv, EGLDisplay dpy, EGLContext context)
-{
-   fbContext *fc = Lookup_fbContext(context);
-   _eglUnlinkContext(&fc->Base);
-   if (!_eglIsContextBound(&fc->Base))
-      free(fc);
-   return EGL_TRUE;
-}
-
-
-static EGLBoolean
-fbMakeCurrent(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw, EGLSurface read, EGLContext context)
-{
-   fbSurface *readSurf = Lookup_fbSurface(read);
-   fbSurface *drawSurf = Lookup_fbSurface(draw);
-   fbContext *ctx = Lookup_fbContext(context);
-   EGLBoolean b;
-
-   b = _eglMakeCurrent(drv, dpy, draw, read, context);
-   if (!b)
-      return EGL_FALSE;
-
-   if (ctx) {
-      _mesa_make_current( ctx->glCtx, 
-                           drawSurf->mesa_framebuffer,
-                           readSurf->mesa_framebuffer);
-   } else
-      _mesa_make_current( NULL, NULL, NULL );
-
-   return EGL_TRUE;
-}
-
-
-/**
- * Create a drawing surface which can be directly displayed on a screen.
- */
-static EGLSurface
-fbCreateScreenSurfaceMESA(_EGLDriver *drv, EGLDisplay dpy, EGLConfig cfg,
-                          const EGLint *attrib_list)
-{
-   _EGLConfig *config = _eglLookupConfig(drv, dpy, cfg);
-   fbDisplay *display = Lookup_fbDisplay(dpy);
-   fbSurface *surface;
-   EGLSurface surf;
-   GLvisual vis;
-   GLcontext *ctx = NULL; /* this should be OK */
-   int origin, bytesPerPixel;
-   int width, height, stride;
-   
-   surface = (fbSurface *) malloc(sizeof(*surface));
-   if (!surface) {
-      return EGL_NO_SURFACE;
-   }
-
-   /* init base class, error check, etc. */
-   surf = _eglInitScreenSurface(&surface->Base, drv, dpy, cfg, attrib_list);
-   if (surf == EGL_NO_SURFACE) {
-      free(surface);
-      return EGL_NO_SURFACE;
-   }
-
-   /* convert EGLConfig to GLvisual */
-   _eglConfigToContextModesRec(config, &vis);
-
-   /* create Mesa framebuffer */
-   surface->mesa_framebuffer = _mesa_create_framebuffer(&vis);
-   if (!surface->mesa_framebuffer) {
-      free(surface);
-      _eglUnlinkSurface(&surface->Base);
-      return EGL_NO_SURFACE;
-   }
-
-   width = surface->Base.Width;
-   height = surface->Base.Height;
-   bytesPerPixel = vis.rgbBits / 8;
-   stride = width * bytesPerPixel;
-   origin = 0;
-
-   /* front color renderbuffer */
-   {
-      driRenderbuffer *drb = driNewRenderbuffer(MESA_FORMAT_ARGB8888, display->pFB,
-                                                bytesPerPixel,
-                                                origin, stride, NULL);
-      fbSetSpanFunctions(drb, &vis);
-      _mesa_add_renderbuffer(surface->mesa_framebuffer,
-                             BUFFER_FRONT_LEFT, &drb->Base);
-   }
-
-   /* back color renderbuffer */
-   if (vis.doubleBufferMode) {
-      GLubyte *backBuf = _mesa_malloc(stride * height);
-      driRenderbuffer *drb = driNewRenderbuffer(MESA_FORMAT_ARGB8888, backBuf,
-                                                bytesPerPixel,
-                                                origin, stride, NULL);
-      fbSetSpanFunctions(drb, &vis);
-      _mesa_add_renderbuffer(surface->mesa_framebuffer,
-                             BUFFER_BACK_LEFT, &drb->Base);
-   }
-
-   /* other renderbuffers- software based */
-   _mesa_add_soft_renderbuffers(surface->mesa_framebuffer,
-                                GL_FALSE, /* color */
-                                vis.haveDepthBuffer,
-                                vis.haveStencilBuffer,
-                                vis.haveAccumBuffer,
-                                GL_FALSE, /* alpha */
-                                GL_FALSE /* aux */);
-   
-   _mesa_resize_framebuffer(ctx, surface->mesa_framebuffer, width, height);
-
-   return surf;
-}
-
-
-/**
- * Show the given surface on the named screen.
- * If surface is EGL_NO_SURFACE, disable the screen's output.
- */
-static EGLBoolean
-fbShowSurfaceMESA(_EGLDriver *drv, EGLDisplay dpy, EGLScreenMESA screen,
-                    EGLSurface surface, EGLModeMESA m)
-{
-   fbDisplay *display = Lookup_fbDisplay(dpy);
-   fbScreen *scrn = Lookup_fbScreen(dpy, screen);
-   fbSurface *surf = Lookup_fbSurface(surface);
-   FILE *file;
-   char buffer[NAME_MAX];
-   _EGLMode *mode = _eglLookupMode(dpy, m);
-   int bits;
-   
-   if (!_eglShowSurfaceMESA(drv, dpy, screen, surface, m))
-      return EGL_FALSE;
-      
-   snprintf(buffer, sizeof(buffer), "%s/%s/blank", sysfs, scrn->fb);
-   
-   file = fopen(buffer, "r+");
-   if (!file) {
-err:
-      printf("chown all fb sysfs attrib to allow write - %s\n", buffer);
-      return EGL_FALSE;
-   }
-   snprintf(buffer, sizeof(buffer), "%d", (m == EGL_NO_MODE_MESA ? VESA_POWERDOWN : VESA_VSYNC_SUSPEND));
-   fputs(buffer, file);
-   fclose(file);
-   
-   if (m == EGL_NO_MODE_MESA)
-      return EGL_TRUE;
-   
-   snprintf(buffer, sizeof(buffer), "%s/%s/mode", sysfs, scrn->fb);
-   
-   file = fopen(buffer, "r+");
-   if (!file)
-      goto err;
-   fputs(mode->Name, file);
-   fclose(file);
-   
-   snprintf(buffer, sizeof(buffer), "%s/%s/bits_per_pixel", sysfs, scrn->fb);
-   
-   file = fopen(buffer, "r+");
-   if (!file)
-      goto err;
-   bits = GET_CONFIG_ATTRIB(surf->Base.Config, EGL_BUFFER_SIZE);
-   snprintf(buffer, sizeof(buffer), "%d", bits);
-   fputs(buffer, file);
-   fclose(file);
-
-   fbSetupFramebuffer(display, scrn->fb);
-   
-   snprintf(buffer, sizeof(buffer), "%s/%s/blank", sysfs, scrn->fb);
-   
-   file = fopen(buffer, "r+");
-   if (!file)
-      goto err;
-      
-   snprintf(buffer, sizeof(buffer), "%d", VESA_NO_BLANKING);
-   fputs(buffer, file);
-   fclose(file);
-   
-   return EGL_TRUE;
-}
-
-
-/* If the backbuffer is on a videocard, this is extraordinarily slow!
- */
-static EGLBoolean
-fbSwapBuffers(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw)
-{
-   fbContext *context = (fbContext *)_eglGetCurrentContext();
-   fbSurface *fs =  Lookup_fbSurface(draw);
-   struct gl_renderbuffer * front_renderbuffer = fs->mesa_framebuffer->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
-   void *frontBuffer = front_renderbuffer->Data;
-   int currentPitch = ((driRenderbuffer *)front_renderbuffer)->pitch;
-   void *backBuffer = fs->mesa_framebuffer->Attachment[BUFFER_BACK_LEFT].Renderbuffer->Data;
-
-   if (!_eglSwapBuffers(drv, dpy, draw))
-      return EGL_FALSE;
-
-   if (context) {
-      GLcontext *ctx = context->glCtx;
-      
-      if (ctx->Visual.doubleBufferMode) {
-	 int i;
-	 int offset = 0;
-         char *tmp = _mesa_malloc(currentPitch);
-
-         _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
-
-         ASSERT(frontBuffer);
-         ASSERT(backBuffer);
-
-	 for (i = 0; i < fs->Base.Height; i++) {
-            _mesa_memcpy(tmp, (char *) backBuffer + offset,
-                         currentPitch);
-            _mesa_memcpy((char *) frontBuffer + offset, tmp,
-                          currentPitch);
-            offset += currentPitch;
-	 }
-	    
-	 _mesa_free(tmp);
-      }
-   }
-   else {
-      /* XXX this shouldn't be an error but we can't handle it for now */
-      _mesa_problem(NULL, "fbSwapBuffers: drawable has no context!\n");
-      return EGL_FALSE;
-   }
-   return EGL_TRUE;
-}
-
-
-/**
- * The bootstrap function.  Return a new fbDriver object and
- * plug in API functions.
- */
-_EGLDriver *
-_eglMain(_EGLDisplay *dpy)
-{
-   fbDriver *fb;
-
-   fb = (fbDriver *) calloc(1, sizeof(fbDriver));
-   if (!fb) {
-      return NULL;
-   }
-
-   /* First fill in the dispatch table with defaults */
-   _eglInitDriverFallbacks(&fb->Base);
-   
-   /* then plug in our fb-specific functions */
-   fb->Base.Initialize = fbInitialize;
-   fb->Base.Terminate = fbTerminate;
-   fb->Base.CreateContext = fbCreateContext;
-   fb->Base.MakeCurrent = fbMakeCurrent;
-   fb->Base.CreateWindowSurface = fbCreateWindowSurface;
-   fb->Base.CreatePixmapSurface = fbCreatePixmapSurface;
-   fb->Base.CreatePbufferSurface = fbCreatePbufferSurface;
-   fb->Base.DestroySurface = fbDestroySurface;
-   fb->Base.DestroyContext = fbDestroyContext;
-   fb->Base.CreateScreenSurfaceMESA = fbCreateScreenSurfaceMESA;
-   fb->Base.ShowSurfaceMESA = fbShowSurfaceMESA;
-   fb->Base.SwapBuffers = fbSwapBuffers;
-   
-   /* enable supported extensions */
-   fb->Base.MESA_screen_surface = EGL_TRUE;
-   fb->Base.MESA_copy_context = EGL_TRUE;
-
-   return &fb->Base;
-}
diff --git a/src/mesa/drivers/dri/ffb/ffb_bitmap.c b/src/mesa/drivers/dri/ffb/ffb_bitmap.c
index 611afddfaf5..b71a552c9dc 100644
--- a/src/mesa/drivers/dri/ffb/ffb_bitmap.c
+++ b/src/mesa/drivers/dri/ffb/ffb_bitmap.c
@@ -30,7 +30,6 @@
 #include "ffb_lock.h"
 #include "ffb_bitmap.h"
 #include "swrast/swrast.h"
-#include "main/image.h"
 #include "main/macros.h"
 
 /* Compute ceiling of integer quotient of A divided by B: */
diff --git a/src/mesa/drivers/dri/ffb/ffb_clear.c b/src/mesa/drivers/dri/ffb/ffb_clear.c
index dfe60f36f2b..aa3fa0a86c5 100644
--- a/src/mesa/drivers/dri/ffb/ffb_clear.c
+++ b/src/mesa/drivers/dri/ffb/ffb_clear.c
@@ -26,15 +26,12 @@
  */
 
 #include "main/mtypes.h"
-#include "main/extensions.h"
 
 #include "main/mm.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
-#include "ffb_depth.h"
 #include "ffb_context.h"
 #include "ffb_vb.h"
-#include "ffb_tris.h"
 #include "ffb_clear.h"
 #include "ffb_lock.h"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_dd.c b/src/mesa/drivers/dri/ffb/ffb_dd.c
index cf83b91f0d4..91b6d3153af 100644
--- a/src/mesa/drivers/dri/ffb/ffb_dd.c
+++ b/src/mesa/drivers/dri/ffb/ffb_dd.c
@@ -27,13 +27,9 @@
 
 #include "main/mtypes.h"
 #include "main/mm.h"
-#include "main/extensions.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
-#include "ffb_depth.h"
 #include "ffb_context.h"
-#include "ffb_vb.h"
-#include "ffb_tris.h"
 #include "ffb_clear.h"
 #include "ffb_lock.h"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_depth.c b/src/mesa/drivers/dri/ffb/ffb_depth.c
index 5d509ff6963..d19385b776b 100644
--- a/src/mesa/drivers/dri/ffb/ffb_depth.c
+++ b/src/mesa/drivers/dri/ffb/ffb_depth.c
@@ -26,7 +26,6 @@
  */
 
 #include "main/mtypes.h"
-#include "swrast/swrast.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_context.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_lines.c b/src/mesa/drivers/dri/ffb/ffb_lines.c
index 19dff509354..6dca4edd29b 100644
--- a/src/mesa/drivers/dri/ffb/ffb_lines.c
+++ b/src/mesa/drivers/dri/ffb/ffb_lines.c
@@ -27,15 +27,11 @@
 
 #include "main/mtypes.h"
 #include "main/mm.h"
-#include "main/extensions.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
-#include "ffb_depth.h"
 #include "ffb_context.h"
 #include "ffb_vb.h"
 #include "ffb_lines.h"
-#include "ffb_tris.h"
-#include "ffb_lock.h"
 
 #undef FFB_LINE_TRACE
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_points.c b/src/mesa/drivers/dri/ffb/ffb_points.c
index 9c37a47aeb9..5bf4f8f0707 100644
--- a/src/mesa/drivers/dri/ffb/ffb_points.c
+++ b/src/mesa/drivers/dri/ffb/ffb_points.c
@@ -30,8 +30,6 @@
 #include "ffb_context.h"
 #include "ffb_vb.h"
 #include "ffb_points.h"
-#include "ffb_tris.h"
-#include "ffb_lock.h"
 
 
 #undef FFB_POINT_TRACE
diff --git a/src/mesa/drivers/dri/ffb/ffb_span.c b/src/mesa/drivers/dri/ffb/ffb_span.c
index 8ec33a11bc6..61901cccadd 100644
--- a/src/mesa/drivers/dri/ffb/ffb_span.c
+++ b/src/mesa/drivers/dri/ffb/ffb_span.c
@@ -31,8 +31,6 @@
 #include "ffb_context.h"
 #include "ffb_lock.h"
 
-#include "swrast/swrast.h"
-
 #define DBG 0
 
 #define HW_LOCK()						\
diff --git a/src/mesa/drivers/dri/ffb/ffb_state.c b/src/mesa/drivers/dri/ffb/ffb_state.c
index 6f8a46d1fc7..c09d2fef838 100644
--- a/src/mesa/drivers/dri/ffb/ffb_state.c
+++ b/src/mesa/drivers/dri/ffb/ffb_state.c
@@ -27,8 +27,6 @@
 
 #include "main/mtypes.h"
 #include "main/colormac.h"
-#include "main/mm.h"
-#include "main/extensions.h"
 #include "main/enums.h"
 
 #include "vbo/vbo.h"
@@ -39,12 +37,9 @@
 
 #include "ffb_dd.h"
 #include "ffb_span.h"
-#include "ffb_depth.h"
 #include "ffb_context.h"
-#include "ffb_vb.h"
 #include "ffb_tris.h"
 #include "ffb_state.h"
-#include "ffb_lock.h"
 
 #undef STATE_TRACE
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_stencil.c b/src/mesa/drivers/dri/ffb/ffb_stencil.c
index ce8ef43c91e..10cdfbc616e 100644
--- a/src/mesa/drivers/dri/ffb/ffb_stencil.c
+++ b/src/mesa/drivers/dri/ffb/ffb_stencil.c
@@ -32,8 +32,6 @@
 #include "ffb_stencil.h"
 #include "ffb_lock.h"
 
-#include "swrast/swrast.h"
-
 #undef STENCIL_TRACE
 
 static void FFBWriteStencilSpan( GLcontext *ctx,
diff --git a/src/mesa/drivers/dri/ffb/ffb_vb.c b/src/mesa/drivers/dri/ffb/ffb_vb.c
index f9c6fd1f310..ca8ffb27219 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vb.c
+++ b/src/mesa/drivers/dri/ffb/ffb_vb.c
@@ -30,8 +30,6 @@
 #include "ffb_vb.h"
 #include "main/imports.h"
 #include "tnl/t_context.h"
-#include "swrast_setup/swrast_setup.h"
-#include "math/m_translate.h"
 
 #undef VB_DEBUG
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_xmesa.c b/src/mesa/drivers/dri/ffb/ffb_xmesa.c
index 88285f454e9..6a846514795 100644
--- a/src/mesa/drivers/dri/ffb/ffb_xmesa.c
+++ b/src/mesa/drivers/dri/ffb/ffb_xmesa.c
@@ -28,7 +28,6 @@
 #include "ffb_xmesa.h"
 #include "main/context.h"
 #include "main/framebuffer.h"
-#include "main/matrix.h"
 #include "main/renderbuffer.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
@@ -52,7 +51,6 @@
 #include "ffb_lines.h"
 #include "ffb_points.h"
 #include "ffb_state.h"
-#include "ffb_tex.h"
 #include "ffb_lock.h"
 #include "ffb_vtxfmt.h"
 #include "ffb_bitmap.h"
diff --git a/src/mesa/drivers/dri/i810/i810context.c b/src/mesa/drivers/dri/i810/i810context.c
index bd9cfe5c0f7..34e34606b4b 100644
--- a/src/mesa/drivers/dri/i810/i810context.c
+++ b/src/mesa/drivers/dri/i810/i810context.c
@@ -34,10 +34,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "main/glheader.h"
 #include "main/context.h"
-#include "main/matrix.h"
 #include "main/simple_list.h"
-#include "main/extensions.h"
-#include "main/framebuffer.h"
 #include "main/imports.h"
 #include "main/points.h"
 
diff --git a/src/mesa/drivers/dri/i810/i810render.c b/src/mesa/drivers/dri/i810/i810render.c
index 1d98e006885..b543d4f012c 100644
--- a/src/mesa/drivers/dri/i810/i810render.c
+++ b/src/mesa/drivers/dri/i810/i810render.c
@@ -44,7 +44,6 @@
 
 #include "i810context.h"
 #include "i810tris.h"
-#include "i810state.h"
 #include "i810vb.h"
 #include "i810ioctl.h"
 
diff --git a/src/mesa/drivers/dri/i810/i810screen.c b/src/mesa/drivers/dri/i810/i810screen.c
index 2a30782afd4..476c8013580 100644
--- a/src/mesa/drivers/dri/i810/i810screen.c
+++ b/src/mesa/drivers/dri/i810/i810screen.c
@@ -36,8 +36,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/imports.h"
 #include "main/context.h"
 #include "main/framebuffer.h"
-#include "main/fbobject.h"
-#include "main/matrix.h"
 #include "main/renderbuffer.h"
 #include "main/simple_list.h"
 #include "utils.h"
@@ -48,8 +46,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "i810state.h"
 #include "i810tex.h"
 #include "i810span.h"
-#include "i810tris.h"
-#include "i810ioctl.h"
 
 #include "GL/internal/dri_interface.h"
 
diff --git a/src/mesa/drivers/dri/i810/i810state.c b/src/mesa/drivers/dri/i810/i810state.c
index 642245c61c8..0c68e120b02 100644
--- a/src/mesa/drivers/dri/i810/i810state.c
+++ b/src/mesa/drivers/dri/i810/i810state.c
@@ -20,8 +20,6 @@
 #include "i810context.h"
 #include "i810state.h"
 #include "i810tex.h"
-#include "i810vb.h"
-#include "i810tris.h"
 #include "i810ioctl.h"
 
 
diff --git a/src/mesa/drivers/dri/i810/i810tex.c b/src/mesa/drivers/dri/i810/i810tex.c
index e764644a6c1..2ccb9562e90 100644
--- a/src/mesa/drivers/dri/i810/i810tex.c
+++ b/src/mesa/drivers/dri/i810/i810tex.c
@@ -33,7 +33,6 @@
 #include "main/colormac.h"
 #include "main/texobj.h"
 #include "main/mm.h"
-#include "swrast/swrast.h"
 
 #include "texmem.h"
 
@@ -42,7 +41,6 @@
 
 #include "i810context.h"
 #include "i810tex.h"
-#include "i810state.h"
 #include "i810ioctl.h"
 
 
diff --git a/src/mesa/drivers/dri/i810/i810texmem.c b/src/mesa/drivers/dri/i810/i810texmem.c
index d93afbf9ef6..bb426a41122 100644
--- a/src/mesa/drivers/dri/i810/i810texmem.c
+++ b/src/mesa/drivers/dri/i810/i810texmem.c
@@ -35,7 +35,6 @@
 #include "i810_dri.h"
 #include "i810context.h"
 #include "i810tex.h"
-#include "i810state.h"
 #include "i810ioctl.h"
 
 
diff --git a/src/mesa/drivers/dri/i810/i810vb.c b/src/mesa/drivers/dri/i810/i810vb.c
index 30890dc9b70..09a772258c5 100644
--- a/src/mesa/drivers/dri/i810/i810vb.c
+++ b/src/mesa/drivers/dri/i810/i810vb.c
@@ -38,7 +38,6 @@
 #include "i810context.h"
 #include "i810vb.h"
 #include "i810ioctl.h"
-#include "i810tris.h"
 #include "i810state.h"
 
 
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index cf32476f408..dc15ae425c9 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -8,7 +8,6 @@ MINIGLX_SOURCES = server/intel_dri.c
 
 DRIVER_SOURCES = \
 	i830_context.c \
-	i830_metaops.c \
 	i830_state.c \
 	i830_texblend.c \
 	i830_texstate.c \
@@ -40,7 +39,6 @@ DRIVER_SOURCES = \
 	i915_debug.c \
 	i915_debug_fp.c \
 	i915_fragprog.c \
-	i915_metaops.c \
 	i915_program.c \
 	i915_state.c \
 	i915_vtbl.c \
diff --git a/src/mesa/drivers/dri/i915/i830_context.c b/src/mesa/drivers/dri/i915/i830_context.c
index 4cb63059884..ebe8b15ca73 100644
--- a/src/mesa/drivers/dri/i915/i830_context.c
+++ b/src/mesa/drivers/dri/i915/i830_context.c
@@ -28,14 +28,11 @@
 #include "i830_context.h"
 #include "main/imports.h"
 #include "texmem.h"
-#include "intel_tex.h"
 #include "tnl/tnl.h"
 #include "tnl/t_vertex.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
-#include "utils.h"
 #include "intel_span.h"
-#include "intel_pixel.h"
 #include "intel_tris.h"
 
 /***************************************
@@ -108,7 +105,6 @@ i830CreateContext(const __GLcontextModes * mesaVis,
    intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf;
 
    i830InitState(i830);
-   i830InitMetaFuncs(i830);
 
    _tnl_allow_vertex_fog(ctx, 1);
    _tnl_allow_pixel_fog(ctx, 0);
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h
index 592ae539761..b755d48678b 100644
--- a/src/mesa/drivers/dri/i915/i830_context.h
+++ b/src/mesa/drivers/dri/i915/i830_context.h
@@ -144,7 +144,7 @@ struct i830_context
    GLuint lodbias_tm0s3[MAX_TEXTURE_UNITS];
      DECLARE_RENDERINPUTS(last_index_bitset);
 
-   struct i830_hw_state meta, initial, state, *current;
+   struct i830_hw_state state;
 };
 
 
@@ -206,10 +206,6 @@ extern void i830EmitState(struct i830_context *i830);
 extern void i830InitState(struct i830_context *i830);
 extern void i830_update_provoking_vertex(GLcontext *ctx);
 
-/* i830_metaops.c
- */
-extern void i830InitMetaFuncs(struct i830_context *i830);
-
 /*======================================================================
  * Inline conversion functions.  These are better-typed than the
  * macros used previously:
diff --git a/src/mesa/drivers/dri/i915/i830_metaops.c b/src/mesa/drivers/dri/i915/i830_metaops.c
deleted file mode 100644
index 2cce661c868..00000000000
--- a/src/mesa/drivers/dri/i915/i830_metaops.c
+++ /dev/null
@@ -1,456 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "main/glheader.h"
-#include "main/enums.h"
-#include "main/mtypes.h"
-#include "main/macros.h"
-#include "utils.h"
-
-#include "intel_screen.h"
-#include "intel_batchbuffer.h"
-#include "intel_regions.h"
-
-#include "i830_context.h"
-#include "i830_reg.h"
-
-/* A large amount of state doesn't need to be uploaded.
- */
-#define ACTIVE (I830_UPLOAD_INVARIENT |         \
-		I830_UPLOAD_CTX |		\
-		I830_UPLOAD_BUFFERS |		\
-		I830_UPLOAD_STIPPLE |		\
-		I830_UPLOAD_TEXBLEND(0) |	\
-		I830_UPLOAD_TEX(0))
-
-
-#define SET_STATE( i830, STATE )		\
-do {						\
-   i830->current->emitted &= ~ACTIVE;			\
-   i830->current = &i830->STATE;		\
-   i830->current->emitted &= ~ACTIVE;			\
-} while (0)
-
-
-static void
-set_no_stencil_write(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
-    */
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_STENCIL_WRITE;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;
-
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-static void
-set_no_depth_write(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
-    */
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
-
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-/* Set depth unit to replace.
- */
-static void
-set_depth_replace(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
-    * ctx->Driver.DepthMask( ctx, GL_TRUE )
-    */
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
-
-   /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
-    */
-   i830->meta.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
-   i830->meta.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
-                                          DEPTH_TEST_FUNC
-                                          (COMPAREFUNC_ALWAYS));
-
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-
-/* Set stencil unit to replace always with the reference value.
- */
-static void
-set_stencil_replace(struct intel_context *intel,
-                    GLuint s_mask, GLuint s_clear)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
-    */
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
-
-   /* ctx->Driver.StencilMask( ctx, s_mask )
-    */
-   i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
-   i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-                                          STENCIL_WRITE_MASK((s_mask &
-                                                              0xff)));
-
-   /* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
-    */
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
-      (ENABLE_STENCIL_PARMS |
-       STENCIL_FAIL_OP(STENCILOP_REPLACE) |
-       STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_REPLACE) |
-       STENCIL_PASS_DEPTH_PASS_OP(STENCILOP_REPLACE));
-
-   /* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_clear, ~0 )
-    */
-   i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
-   i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-                                          STENCIL_TEST_MASK(0xff));
-
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
-                                               ENABLE_STENCIL_TEST_FUNC_MASK);
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
-      (ENABLE_STENCIL_REF_VALUE |
-       ENABLE_STENCIL_TEST_FUNC |
-       STENCIL_REF_VALUE((s_clear & 0xff)) |
-       STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS));
-
-
-
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-
-static void
-set_color_mask(struct intel_context *intel, GLboolean state)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   const GLuint mask = ((1 << WRITEMASK_RED_SHIFT) |
-                        (1 << WRITEMASK_GREEN_SHIFT) |
-                        (1 << WRITEMASK_BLUE_SHIFT) |
-                        (1 << WRITEMASK_ALPHA_SHIFT));
-
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~mask;
-
-   if (state) {
-      i830->meta.Ctx[I830_CTXREG_ENABLES_2] |=
-         (i830->state.Ctx[I830_CTXREG_ENABLES_2] & mask);
-   }
-
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-/* Installs a one-stage passthrough texture blend pipeline.  Is there
- * more that can be done to turn off texturing?
- */
-static void
-set_no_texture(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   static const struct gl_tex_env_combine_state comb = {
-      GL_NONE, GL_NONE,
-      {GL_TEXTURE, 0, 0,}, {GL_TEXTURE, 0, 0,},
-      {GL_SRC_COLOR, 0, 0}, {GL_SRC_ALPHA, 0, 0},
-      0, 0, 0, 0
-   };
-
-   i830->meta.TexBlendWordsUsed[0] =
-      i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
-                           i830->meta.TexBlend[0], NULL);
-
-   i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
-   i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
-}
-
-/* Set up a single element blend stage for 'replace' texturing with no
- * funny ops.
- */
-static void
-set_texture_blend_replace(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   static const struct gl_tex_env_combine_state comb = {
-      GL_REPLACE, GL_REPLACE,
-      {GL_TEXTURE, GL_TEXTURE, GL_TEXTURE,}, {GL_TEXTURE, GL_TEXTURE,
-                                              GL_TEXTURE,},
-      {GL_SRC_COLOR, GL_SRC_COLOR, GL_SRC_COLOR}, {GL_SRC_ALPHA, GL_SRC_ALPHA,
-                                                   GL_SRC_ALPHA},
-      0, 0, 1, 1
-   };
-
-   i830->meta.TexBlendWordsUsed[0] =
-      i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
-                           i830->meta.TexBlend[0], NULL);
-
-   i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
-   i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
-
-/*    fprintf(stderr, "%s: TexBlendWordsUsed[0]: %d\n",  */
-/* 	   __FUNCTION__, i830->meta.TexBlendWordsUsed[0]); */
-}
-
-
-
-/* Set up an arbitary piece of memory as a rectangular texture
- * (including the front or back buffer).
- */
-static GLboolean
-set_tex_rect_source(struct intel_context *intel,
-                    dri_bo *buffer,
-                    GLuint offset,
-                    GLuint pitch, GLuint height, GLenum format, GLenum type)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   GLuint *setup = i830->meta.Tex[0];
-   GLint numLevels = 1;
-   GLuint textureFormat;
-   GLuint cpp;
-
-   /* A full implementation of this would do the upload through
-    * glTexImage2d, and get all the conversion operations at that
-    * point.  We are restricted, but still at least have access to the
-    * fragment program swizzle.
-    */
-   switch (format) {
-   case GL_BGRA:
-      switch (type) {
-      case GL_UNSIGNED_INT_8_8_8_8_REV:
-      case GL_UNSIGNED_BYTE:
-         textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
-         cpp = 4;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_RGBA:
-      switch (type) {
-      case GL_UNSIGNED_INT_8_8_8_8_REV:
-      case GL_UNSIGNED_BYTE:
-         textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
-         cpp = 4;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_BGR:
-      switch (type) {
-      case GL_UNSIGNED_SHORT_5_6_5_REV:
-         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
-         cpp = 2;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_RGB:
-      switch (type) {
-      case GL_UNSIGNED_SHORT_5_6_5:
-         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
-         cpp = 2;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-
-   default:
-      return GL_FALSE;
-   }
-
-   i830->meta.tex_buffer[0] = buffer;
-   i830->meta.tex_offset[0] = offset;
-
-   setup[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
-                               (LOAD_TEXTURE_MAP0 << 0) | 4);
-   setup[I830_TEXREG_TM0S1] = (((height - 1) << TM0S1_HEIGHT_SHIFT) |
-                               ((pitch - 1) << TM0S1_WIDTH_SHIFT) |
-                               textureFormat);
-   setup[I830_TEXREG_TM0S2] =
-      (((((pitch * cpp) / 4) -
-         1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK);
-
-   setup[I830_TEXREG_TM0S3] =
-      ((((numLevels -
-          1) *
-         4) << TM0S3_MIN_MIP_SHIFT) | (FILTER_NEAREST <<
-                                       TM0S3_MIN_FILTER_SHIFT) |
-       (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT) | (FILTER_NEAREST <<
-                                                     TM0S3_MAG_FILTER_SHIFT));
-
-   setup[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(0));
-
-   setup[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
-                             MAP_UNIT(0) |
-                             ENABLE_TEXCOORD_PARAMS |
-                             TEXCOORDS_ARE_IN_TEXELUNITS |
-                             TEXCOORDTYPE_CARTESIAN |
-                             ENABLE_ADDR_V_CNTL |
-                             TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP) |
-                             ENABLE_ADDR_U_CNTL |
-                             TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP));
-
-   i830->meta.emitted &= ~I830_UPLOAD_TEX(0);
-   return GL_TRUE;
-}
-
-
-static void
-set_vertex_format(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   i830->meta.Ctx[I830_CTXREG_VF] = (_3DSTATE_VFT0_CMD |
-                                     VFT0_TEX_COUNT(1) |
-                                     VFT0_DIFFUSE | VFT0_XYZ);
-   i830->meta.Ctx[I830_CTXREG_VF2] = (_3DSTATE_VFT1_CMD |
-                                      VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
-                                      VFT1_TEX1_FMT(TEXCOORDFMT_2D) |
-                                      VFT1_TEX2_FMT(TEXCOORDFMT_2D) |
-                                      VFT1_TEX3_FMT(TEXCOORDFMT_2D));
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-}
-
-
-static void
-meta_import_pixel_state(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   i830->meta.Ctx[I830_CTXREG_STATE1] = i830->state.Ctx[I830_CTXREG_STATE1];
-   i830->meta.Ctx[I830_CTXREG_STATE2] = i830->state.Ctx[I830_CTXREG_STATE2];
-   i830->meta.Ctx[I830_CTXREG_STATE3] = i830->state.Ctx[I830_CTXREG_STATE3];
-   i830->meta.Ctx[I830_CTXREG_STATE4] = i830->state.Ctx[I830_CTXREG_STATE4];
-   i830->meta.Ctx[I830_CTXREG_STATE5] = i830->state.Ctx[I830_CTXREG_STATE5];
-   i830->meta.Ctx[I830_CTXREG_IALPHAB] = i830->state.Ctx[I830_CTXREG_IALPHAB];
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] =
-      i830->state.Ctx[I830_CTXREG_STENCILTST];
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] =
-      i830->state.Ctx[I830_CTXREG_ENABLES_1];
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] =
-      i830->state.Ctx[I830_CTXREG_ENABLES_2];
-   i830->meta.Ctx[I830_CTXREG_AA] = i830->state.Ctx[I830_CTXREG_AA];
-   i830->meta.Ctx[I830_CTXREG_FOGCOLOR] =
-      i830->state.Ctx[I830_CTXREG_FOGCOLOR];
-   i830->meta.Ctx[I830_CTXREG_BLENDCOLOR0] =
-      i830->state.Ctx[I830_CTXREG_BLENDCOLOR0];
-   i830->meta.Ctx[I830_CTXREG_BLENDCOLOR1] =
-      i830->state.Ctx[I830_CTXREG_BLENDCOLOR1];
-   i830->meta.Ctx[I830_CTXREG_MCSB0] = i830->state.Ctx[I830_CTXREG_MCSB0];
-   i830->meta.Ctx[I830_CTXREG_MCSB1] = i830->state.Ctx[I830_CTXREG_MCSB1];
-
-
-   i830->meta.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
-   i830->meta.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
-   i830->meta.emitted &= ~I830_UPLOAD_CTX;
-
-
-   i830->meta.Buffer[I830_DESTREG_SENABLE] =
-      i830->state.Buffer[I830_DESTREG_SENABLE];
-   i830->meta.Buffer[I830_DESTREG_SR1] = i830->state.Buffer[I830_DESTREG_SR1];
-   i830->meta.Buffer[I830_DESTREG_SR2] = i830->state.Buffer[I830_DESTREG_SR2];
-   i830->meta.emitted &= ~I830_UPLOAD_BUFFERS;
-}
-
-
-
-/* Select between front and back draw buffers.
- */
-static void
-meta_draw_region(struct intel_context *intel,
-                 struct intel_region *color_region,
-                 struct intel_region *depth_region)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-
-   i830_state_draw_region(intel, &i830->meta, color_region, depth_region);
-}
-
-
-/* Operations where the 3D engine is decoupled temporarily from the
- * current GL state and used for other purposes than simply rendering
- * incoming triangles.
- */
-static void
-install_meta_state(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   memcpy(&i830->meta, &i830->initial, sizeof(i830->meta));
-
-   i830->meta.active = ACTIVE;
-   i830->meta.emitted = 0;
-
-   SET_STATE(i830, meta);
-   set_vertex_format(intel);
-   set_no_texture(intel);
-}
-
-static void
-leave_meta_state(struct intel_context *intel)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   intel_region_release(&i830->meta.draw_region);
-   intel_region_release(&i830->meta.depth_region);
-/*    intel_region_release(intel, &i830->meta.tex_region[0]); */
-   SET_STATE(i830, state);
-}
-
-
-
-void
-i830InitMetaFuncs(struct i830_context *i830)
-{
-   i830->intel.vtbl.install_meta_state = install_meta_state;
-   i830->intel.vtbl.leave_meta_state = leave_meta_state;
-   i830->intel.vtbl.meta_no_depth_write = set_no_depth_write;
-   i830->intel.vtbl.meta_no_stencil_write = set_no_stencil_write;
-   i830->intel.vtbl.meta_stencil_replace = set_stencil_replace;
-   i830->intel.vtbl.meta_depth_replace = set_depth_replace;
-   i830->intel.vtbl.meta_color_mask = set_color_mask;
-   i830->intel.vtbl.meta_no_texture = set_no_texture;
-   i830->intel.vtbl.meta_texture_blend_replace = set_texture_blend_replace;
-   i830->intel.vtbl.meta_tex_rect_source = set_tex_rect_source;
-   i830->intel.vtbl.meta_draw_region = meta_draw_region;
-   i830->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
-}
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c
index acda7e70de0..3b9b3ae329e 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -1127,9 +1127,6 @@ i830InitState(struct i830_context *i830)
 
    _mesa_init_driver_state(ctx);
 
-   memcpy(&i830->initial, &i830->state, sizeof(i830->state));
-
-   i830->current = &i830->state;
    i830->state.emitted = 0;
    i830->state.active = (I830_UPLOAD_INVARIENT |
                          I830_UPLOAD_RASTER_RULES |
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 4471ca2bbbd..a8df77c600e 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -25,8 +25,6 @@
  * 
  **************************************************************************/
 
-#include "glapi/glapi.h"
-
 #include "i830_context.h"
 #include "i830_reg.h"
 #include "intel_batchbuffer.h"
@@ -237,8 +235,8 @@ static GLboolean
 i830_check_vertex_size(struct intel_context *intel, GLuint expected)
 {
    struct i830_context *i830 = i830_context(&intel->ctx);
-   int vft0 = i830->current->Ctx[I830_CTXREG_VF];
-   int vft1 = i830->current->Ctx[I830_CTXREG_VF2];
+   int vft0 = i830->state.Ctx[I830_CTXREG_VF];
+   int vft1 = i830->state.Ctx[I830_CTXREG_VF2];
    int nrtex = (vft0 & VFT0_TEX_COUNT_MASK) >> VFT0_TEX_COUNT_SHIFT;
    int i, sz = 0;
 
@@ -414,7 +412,7 @@ static void
 i830_emit_state(struct intel_context *intel)
 {
    struct i830_context *i830 = i830_context(&intel->ctx);
-   struct i830_hw_state *state = i830->current;
+   struct i830_hw_state *state = &i830->state;
    int i, count;
    GLuint dirty;
    dri_bo *aper_array[3 + I830_TEX_UNITS];
@@ -543,10 +541,6 @@ i830_emit_state(struct intel_context *intel)
 		      I915_GEM_DOMAIN_SAMPLER, 0,
                       state->tex_offset[i]);
          }
-	 else if (state == &i830->meta) {
-	    assert(i == 0);
-	    OUT_BATCH(0);
-	 }
 	 else {
 	    OUT_BATCH(state->tex_offset[i]);
 	 }
@@ -581,10 +575,6 @@ i830_destroy_context(struct intel_context *intel)
 
    intel_region_release(&i830->state.draw_region);
    intel_region_release(&i830->state.depth_region);
-   intel_region_release(&i830->meta.draw_region);
-   intel_region_release(&i830->meta.depth_region);
-   intel_region_release(&i830->initial.draw_region);
-   intel_region_release(&i830->initial.depth_region);
 
    for (i = 0; i < I830_TEX_UNITS; i++) {
       if (i830->state.tex_buffer[i] != NULL) {
@@ -596,24 +586,22 @@ i830_destroy_context(struct intel_context *intel)
    _tnl_free_vertices(&intel->ctx);
 }
 
-
-void
-i830_state_draw_region(struct intel_context *intel,
-		       struct i830_hw_state *state,
-		       struct intel_region *color_region,
-		       struct intel_region *depth_region)
+static void
+i830_set_draw_region(struct intel_context *intel,
+                     struct intel_region *color_regions[],
+                     struct intel_region *depth_region,
+		     GLuint num_regions)
 {
    struct i830_context *i830 = i830_context(&intel->ctx);
    GLcontext *ctx = &intel->ctx;
    struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
    GLuint value;
+   struct i830_hw_state *state = &i830->state;
 
-   ASSERT(state == &i830->state || state == &i830->meta);
-
-   if (state->draw_region != color_region) {
+   if (state->draw_region != color_regions[0]) {
       intel_region_release(&state->draw_region);
-      intel_region_reference(&state->draw_region, color_region);
+      intel_region_reference(&state->draw_region, color_regions[0]);
    }
    if (state->depth_region != depth_region) {
       intel_region_release(&state->depth_region);
@@ -624,7 +612,7 @@ i830_state_draw_region(struct intel_context *intel,
     * Set stride/cpp values
     */
    i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_CBUFADDR0],
-				color_region, BUF_3D_ID_COLOR_BACK);
+				color_regions[0], BUF_3D_ID_COLOR_BACK);
 
    i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_DBUFADDR0],
 				depth_region, BUF_3D_ID_DEPTH);
@@ -674,19 +662,6 @@ i830_state_draw_region(struct intel_context *intel,
    state->Buffer[I830_DESTREG_DRAWRECT5] = 0;
 
    I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
-
-
-}
-
-
-static void
-i830_set_draw_region(struct intel_context *intel,
-                     struct intel_region *color_regions[],
-                     struct intel_region *depth_region,
-		     GLuint num_regions)
-{
-   struct i830_context *i830 = i830_context(&intel->ctx);
-   i830_state_draw_region(intel, &i830->state, color_regions[0], depth_region);
 }
 
 /* This isn't really handled at the moment.
@@ -702,8 +677,7 @@ static void
 i830_assert_not_dirty( struct intel_context *intel )
 {
    struct i830_context *i830 = i830_context(&intel->ctx);
-   struct i830_hw_state *state = i830->current;
-   assert(!get_dirty(state));
+   assert(!get_dirty(&i830->state));
 }
 
 static void
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index 7c7711da099..ed9a44ff246 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -28,7 +28,6 @@
 #include "i915_context.h"
 #include "main/imports.h"
 #include "main/macros.h"
-#include "intel_tex.h"
 #include "intel_tris.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
@@ -38,15 +37,11 @@
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
 
-#include "utils.h"
 #include "i915_reg.h"
 #include "i915_program.h"
 
-#include "intel_regions.h"
-#include "intel_batchbuffer.h"
 #include "intel_tris.h"
 #include "intel_span.h"
-#include "intel_pixel.h"
 
 /***************************************
  * Mesa's Driver Functions
@@ -116,7 +111,6 @@ i915CreateContext(const __GLcontextModes * mesaVis,
       _mesa_printf("\ntexmem-0-3 branch\n\n");
 
    i915InitVtbl(i915);
-   i915InitMetaFuncs(i915);
 
    i915InitDriverFunctions(&functions);
 
diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index f55b5511398..60b357ec28d 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -259,7 +259,7 @@ struct i915_context
 
    struct i915_fragment_program *current_program;
 
-   struct i915_hw_state meta, initial, state, *current;
+   struct i915_hw_state state;
 };
 
 
@@ -346,12 +346,6 @@ extern void i915UpdateTextureState(struct intel_context *intel);
 extern void i915InitTextureFuncs(struct dd_function_table *functions);
 
 /*======================================================================
- * i915_metaops.c
- */
-void i915InitMetaFuncs(struct i915_context *i915);
-
-
-/*======================================================================
  * i915_fragprog.c
  */
 extern void i915ValidateFragmentProgram(struct i915_context *i915);
diff --git a/src/mesa/drivers/dri/i915/i915_debug_fp.c b/src/mesa/drivers/dri/i915/i915_debug_fp.c
index 84347a01efe..bf500e54fa2 100644
--- a/src/mesa/drivers/dri/i915/i915_debug_fp.c
+++ b/src/mesa/drivers/dri/i915/i915_debug_fp.c
@@ -30,9 +30,6 @@
 #include "i915_reg.h"
 #include "i915_debug.h"
 #include "main/imports.h"
-#include "shader/program.h"
-#include "shader/prog_instruction.h"
-#include "shader/prog_print.h"
 
 #define PRINTF( ... ) _mesa_printf( __VA_ARGS__ )
 
diff --git a/src/mesa/drivers/dri/i915/i915_metaops.c b/src/mesa/drivers/dri/i915/i915_metaops.c
deleted file mode 100644
index 90a78c6082b..00000000000
--- a/src/mesa/drivers/dri/i915/i915_metaops.c
+++ /dev/null
@@ -1,507 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "main/glheader.h"
-#include "main/enums.h"
-#include "main/mtypes.h"
-#include "main/macros.h"
-#include "utils.h"
-
-#include "intel_screen.h"
-#include "intel_batchbuffer.h"
-#include "intel_regions.h"
-
-#include "i915_context.h"
-#include "i915_reg.h"
-
-/* We touch almost everything:
- */
-#define ACTIVE (I915_UPLOAD_INVARIENT | 	\
-		I915_UPLOAD_CTX |		\
-		I915_UPLOAD_BUFFERS |		\
-		I915_UPLOAD_STIPPLE |		\
-                I915_UPLOAD_PROGRAM | 		\
-                I915_UPLOAD_FOG | 		\
-		I915_UPLOAD_TEX(0))
-
-#define SET_STATE( i915, STATE )		\
-do {						\
-   i915->current->emitted &= ~ACTIVE;		\
-   i915->current = &i915->STATE;		\
-   i915->current->emitted &= ~ACTIVE;		\
-} while (0)
-
-
-static void
-meta_no_stencil_write(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
-                                         S5_STENCIL_WRITE_ENABLE);
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-static void
-meta_no_depth_write(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS6] &= ~(S6_DEPTH_TEST_ENABLE |
-                                         S6_DEPTH_WRITE_ENABLE);
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-static void
-meta_depth_replace(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_TRUE )
-    * ctx->Driver.DepthMask( ctx, GL_TRUE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS6] |= (S6_DEPTH_TEST_ENABLE |
-                                        S6_DEPTH_WRITE_ENABLE);
-
-   /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
-   i915->meta.Ctx[I915_CTXREG_LIS6] |=
-      COMPAREFUNC_ALWAYS << S6_DEPTH_TEST_FUNC_SHIFT;
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-
-/* Set stencil unit to replace always with the reference value.
- */
-static void
-meta_stencil_replace(struct intel_context *intel,
-                     GLuint s_mask, GLuint s_clear)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   GLuint op = STENCILOP_REPLACE;
-   GLuint func = COMPAREFUNC_ALWAYS;
-
-   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
-                                        S5_STENCIL_WRITE_ENABLE);
-
-   /* ctx->Driver.StencilMask( ctx, s_mask )
-    */
-   i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
-
-   i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-                                          STENCIL_WRITE_MASK(s_mask));
-
-   /* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
-                                         S5_STENCIL_PASS_Z_FAIL_MASK |
-                                         S5_STENCIL_PASS_Z_PASS_MASK);
-
-   i915->meta.Ctx[I915_CTXREG_LIS5] |= ((op << S5_STENCIL_FAIL_SHIFT) |
-                                        (op << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
-                                        (op << S5_STENCIL_PASS_Z_PASS_SHIFT));
-
-
-   /* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_ref, ~0 )
-    */
-   i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
-   i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-                                          STENCIL_TEST_MASK(0xff));
-
-   i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
-                                         S5_STENCIL_TEST_FUNC_MASK);
-
-   i915->meta.Ctx[I915_CTXREG_LIS5] |= ((s_clear << S5_STENCIL_REF_SHIFT) |
-                                        (func << S5_STENCIL_TEST_FUNC_SHIFT));
-
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-
-static void
-meta_color_mask(struct intel_context *intel, GLboolean state)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   const GLuint mask = (S5_WRITEDISABLE_RED |
-                        S5_WRITEDISABLE_GREEN |
-                        S5_WRITEDISABLE_BLUE | S5_WRITEDISABLE_ALPHA);
-
-   /* Copy colormask state from "regular" hw context.
-    */
-   if (state) {
-      i915->meta.Ctx[I915_CTXREG_LIS5] &= ~mask;
-      i915->meta.Ctx[I915_CTXREG_LIS5] |=
-         (i915->state.Ctx[I915_CTXREG_LIS5] & mask);
-   }
-   else
-      i915->meta.Ctx[I915_CTXREG_LIS5] |= mask;
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-
-
-static void
-meta_import_pixel_state(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   memcpy(i915->meta.Fog, i915->state.Fog, I915_FOG_SETUP_SIZE * 4);
-
-   i915->meta.Ctx[I915_CTXREG_LIS5] = i915->state.Ctx[I915_CTXREG_LIS5];
-   i915->meta.Ctx[I915_CTXREG_LIS6] = i915->state.Ctx[I915_CTXREG_LIS6];
-   i915->meta.Ctx[I915_CTXREG_STATE4] = i915->state.Ctx[I915_CTXREG_STATE4];
-   i915->meta.Ctx[I915_CTXREG_BLENDCOLOR1] =
-      i915->state.Ctx[I915_CTXREG_BLENDCOLOR1];
-   i915->meta.Ctx[I915_CTXREG_IAB] = i915->state.Ctx[I915_CTXREG_IAB];
-
-   i915->meta.Buffer[I915_DESTREG_SENABLE] =
-      i915->state.Buffer[I915_DESTREG_SENABLE];
-   i915->meta.Buffer[I915_DESTREG_SR1] = i915->state.Buffer[I915_DESTREG_SR1];
-   i915->meta.Buffer[I915_DESTREG_SR2] = i915->state.Buffer[I915_DESTREG_SR2];
-
-   i915->meta.emitted &= ~I915_UPLOAD_FOG;
-   i915->meta.emitted &= ~I915_UPLOAD_BUFFERS;
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-
-
-
-#define REG( type, nr ) (((type)<<5)|(nr))
-
-#define REG_R(x)       REG(REG_TYPE_R, x)
-#define REG_T(x)       REG(REG_TYPE_T, x)
-#define REG_CONST(x)   REG(REG_TYPE_CONST, x)
-#define REG_S(x)       REG(REG_TYPE_S, x)
-#define REG_OC         REG(REG_TYPE_OC, 0)
-#define REG_OD	       REG(REG_TYPE_OD, 0)
-#define REG_U(x)       REG(REG_TYPE_U, x)
-
-#define REG_T_DIFFUSE  REG(REG_TYPE_T, T_DIFFUSE)
-#define REG_T_SPECULAR REG(REG_TYPE_T, T_SPECULAR)
-#define REG_T_FOG_W    REG(REG_TYPE_T, T_FOG_W)
-#define REG_T_TEX(x)   REG(REG_TYPE_T, x)
-
-
-#define A0_DEST_REG( reg ) ( (reg) << A0_DEST_NR_SHIFT )
-#define A0_SRC0_REG( reg ) ( (reg) << A0_SRC0_NR_SHIFT )
-#define A1_SRC1_REG( reg ) ( (reg) << A1_SRC1_NR_SHIFT )
-#define A1_SRC2_REG( reg ) ( (reg) << A1_SRC2_NR_SHIFT )
-#define A2_SRC2_REG( reg ) ( (reg) << A2_SRC2_NR_SHIFT )
-#define D0_DECL_REG( reg ) ( (reg) << D0_NR_SHIFT )
-#define T0_DEST_REG( reg ) ( (reg) << T0_DEST_NR_SHIFT )
-
-#define T0_SAMPLER( unit )     ((unit)<<T0_SAMPLER_NR_SHIFT)
-
-#define T1_ADDRESS_REG( type, nr ) (((type)<<T1_ADDRESS_REG_TYPE_SHIFT)| \
-				    ((nr)<<T1_ADDRESS_REG_NR_SHIFT))
-
-
-#define A1_SRC0_XYZW ((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) |	\
-		      (SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) |	\
-		      (SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) |	\
-		      (SRC_W << A1_SRC0_CHANNEL_W_SHIFT))
-
-#define A1_SRC1_XY   ((SRC_X << A1_SRC1_CHANNEL_X_SHIFT) |	\
-		      (SRC_Y << A1_SRC1_CHANNEL_Y_SHIFT))
-
-#define A2_SRC1_ZW   ((SRC_Z << A2_SRC1_CHANNEL_Z_SHIFT) |	\
-		      (SRC_W << A2_SRC1_CHANNEL_W_SHIFT))
-
-#define A2_SRC2_XYZW ((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) |	\
-		      (SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) |	\
-		      (SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) |	\
-		      (SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
-
-
-
-
-
-static void
-meta_no_texture(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   static const GLuint prog[] = {
-      _3DSTATE_PIXEL_SHADER_PROGRAM,
-
-      /* Declare incoming diffuse color:
-       */
-      (D0_DCL | D0_DECL_REG(REG_T_DIFFUSE) | D0_CHANNEL_ALL),
-      D1_MBZ,
-      D2_MBZ,
-
-      /* output-color = mov(t_diffuse)
-       */
-      (A0_MOV |
-       A0_DEST_REG(REG_OC) |
-       A0_DEST_CHANNEL_ALL | A0_SRC0_REG(REG_T_DIFFUSE)),
-      (A1_SRC0_XYZW),
-      0,
-   };
-
-
-   memcpy(i915->meta.Program, prog, sizeof(prog));
-   i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
-   i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
-   i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
-}
-
-static void
-meta_texture_blend_replace(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   static const GLuint prog[] = {
-      _3DSTATE_PIXEL_SHADER_PROGRAM,
-
-      /* Declare the sampler:
-       */
-      (D0_DCL | D0_DECL_REG(REG_S(0)) | D0_SAMPLE_TYPE_2D | D0_CHANNEL_NONE),
-      D1_MBZ,
-      D2_MBZ,
-
-      /* Declare the interpolated texture coordinate:
-       */
-      (D0_DCL | D0_DECL_REG(REG_T_TEX(0)) | D0_CHANNEL_ALL),
-      D1_MBZ,
-      D2_MBZ,
-
-      /* output-color = texld(sample0, texcoord0) 
-       */
-      (T0_TEXLD | T0_DEST_REG(REG_OC) | T0_SAMPLER(0)),
-      T1_ADDRESS_REG(REG_TYPE_T, 0),
-      T2_MBZ
-   };
-
-   memcpy(i915->meta.Program, prog, sizeof(prog));
-   i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
-   i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
-   i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
-}
-
-
-
-
-
-/* Set up an arbitary piece of memory as a rectangular texture
- * (including the front or back buffer).
- */
-static GLboolean
-meta_tex_rect_source(struct intel_context *intel,
-                     dri_bo *buffer,
-                     GLuint offset,
-                     GLuint pitch, GLuint height, GLenum format, GLenum type)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   GLuint unit = 0;
-   GLint numLevels = 1;
-   GLuint *state = i915->meta.Tex[0];
-   GLuint textureFormat;
-   GLuint cpp;
-
-   /* A full implementation of this would do the upload through
-    * glTexImage2d, and get all the conversion operations at that
-    * point.  We are restricted, but still at least have access to the
-    * fragment program swizzle.
-    */
-   switch (format) {
-   case GL_BGRA:
-      switch (type) {
-      case GL_UNSIGNED_INT_8_8_8_8_REV:
-      case GL_UNSIGNED_BYTE:
-         textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
-         cpp = 4;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_RGBA:
-      switch (type) {
-      case GL_UNSIGNED_INT_8_8_8_8_REV:
-      case GL_UNSIGNED_BYTE:
-         textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
-         cpp = 4;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_BGR:
-      switch (type) {
-      case GL_UNSIGNED_SHORT_5_6_5_REV:
-         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
-         cpp = 2;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-   case GL_RGB:
-      switch (type) {
-      case GL_UNSIGNED_SHORT_5_6_5:
-         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
-         cpp = 2;
-         break;
-      default:
-         return GL_FALSE;
-      }
-      break;
-
-   default:
-      return GL_FALSE;
-   }
-
-
-   if ((pitch * cpp) & 3) {
-      _mesa_printf("%s: texture is not dword pitch\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-/*    intel_region_release(&i915->meta.tex_region[0]); */
-/*    intel_region_reference(&i915->meta.tex_region[0], region); */
-   i915->meta.tex_buffer[0] = buffer;
-   i915->meta.tex_offset[0] = offset;
-
-   state[I915_TEXREG_MS3] = (((height - 1) << MS3_HEIGHT_SHIFT) |
-                             ((pitch - 1) << MS3_WIDTH_SHIFT) |
-                             textureFormat | MS3_USE_FENCE_REGS);
-
-   state[I915_TEXREG_MS4] = (((((pitch * cpp) / 4) - 1) << MS4_PITCH_SHIFT) |
-                             MS4_CUBE_FACE_ENA_MASK |
-                             ((((numLevels - 1) * 4)) << MS4_MAX_LOD_SHIFT));
-
-   state[I915_TEXREG_SS2] = ((FILTER_NEAREST << SS2_MIN_FILTER_SHIFT) |
-                             (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT) |
-                             (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT));
-
-   state[I915_TEXREG_SS3] = ((TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT) |
-                             (TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT) |
-                             (TEXCOORDMODE_WRAP << SS3_TCZ_ADDR_MODE_SHIFT) |
-                             (unit << SS3_TEXTUREMAP_INDEX_SHIFT));
-
-   state[I915_TEXREG_SS4] = 0;
-
-   i915->meta.emitted &= ~I915_UPLOAD_TEX(0);
-   return GL_TRUE;
-}
-
-
-/**
- * Set the color and depth drawing region for meta ops.
- */
-static void
-meta_draw_region(struct intel_context *intel,
-                 struct intel_region *color_region,
-                 struct intel_region *depth_region)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   i915_state_draw_region(intel, &i915->meta, color_region, depth_region);
-}
-
-
-static void
-set_vertex_format(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-
-   i915->meta.Ctx[I915_CTXREG_LIS2] =
-      (S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
-       S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
-
-   i915->meta.Ctx[I915_CTXREG_LIS4] &= ~S4_VFMT_MASK;
-
-   i915->meta.Ctx[I915_CTXREG_LIS4] |= (S4_VFMT_COLOR | S4_VFMT_XYZ);
-
-   i915->meta.emitted &= ~I915_UPLOAD_CTX;
-}
-
-
-
-/* Operations where the 3D engine is decoupled temporarily from the
- * current GL state and used for other purposes than simply rendering
- * incoming triangles.
- */
-static void
-install_meta_state(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   memcpy(&i915->meta, &i915->initial, sizeof(i915->meta));
-   i915->meta.active = ACTIVE;
-   i915->meta.emitted = 0;
-
-   SET_STATE(i915, meta);
-   set_vertex_format(intel);
-   meta_no_texture(intel);
-}
-
-static void
-leave_meta_state(struct intel_context *intel)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   intel_region_release(&i915->meta.draw_region);
-   intel_region_release(&i915->meta.depth_region);
-/*    intel_region_release(&i915->meta.tex_region[0]); */
-   SET_STATE(i915, state);
-}
-
-
-
-void
-i915InitMetaFuncs(struct i915_context *i915)
-{
-   i915->intel.vtbl.install_meta_state = install_meta_state;
-   i915->intel.vtbl.leave_meta_state = leave_meta_state;
-   i915->intel.vtbl.meta_no_depth_write = meta_no_depth_write;
-   i915->intel.vtbl.meta_no_stencil_write = meta_no_stencil_write;
-   i915->intel.vtbl.meta_stencil_replace = meta_stencil_replace;
-   i915->intel.vtbl.meta_depth_replace = meta_depth_replace;
-   i915->intel.vtbl.meta_color_mask = meta_color_mask;
-   i915->intel.vtbl.meta_no_texture = meta_no_texture;
-   i915->intel.vtbl.meta_texture_blend_replace = meta_texture_blend_replace;
-   i915->intel.vtbl.meta_tex_rect_source = meta_tex_rect_source;
-   i915->intel.vtbl.meta_draw_region = meta_draw_region;
-   i915->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
-}
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 9d7a9e1dfea..7275617a6fb 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -1157,7 +1157,4 @@ i915InitState(struct i915_context *i915)
    i915_init_packets(i915);
 
    _mesa_init_driver_state(ctx);
-
-   memcpy(&i915->initial, &i915->state, sizeof(i915->state));
-   i915->current = &i915->state;
 }
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 266e6848c3c..392126b7dca 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -37,17 +37,13 @@
 #include "tnl/t_vertex.h"
 
 #include "intel_batchbuffer.h"
-#include "intel_tex.h"
 #include "intel_regions.h"
 #include "intel_tris.h"
 #include "intel_fbo.h"
-#include "intel_chipset.h"
 
 #include "i915_reg.h"
 #include "i915_context.h"
 
-#include "glapi/glapi.h"
-
 static void
 i915_render_prevalidate(struct intel_context *intel)
 {
@@ -100,8 +96,8 @@ static GLboolean
 i915_check_vertex_size(struct intel_context *intel, GLuint expected)
 {
    struct i915_context *i915 = i915_context(&intel->ctx);
-   int lis2 = i915->current->Ctx[I915_CTXREG_LIS2];
-   int lis4 = i915->current->Ctx[I915_CTXREG_LIS4];
+   int lis2 = i915->state.Ctx[I915_CTXREG_LIS2];
+   int lis4 = i915->state.Ctx[I915_CTXREG_LIS4];
    int i, sz = 0;
 
    switch (lis4 & S4_VFMT_XYZW_MASK) {
@@ -287,7 +283,7 @@ static void
 i915_emit_state(struct intel_context *intel)
 {
    struct i915_context *i915 = i915_context(&intel->ctx);
-   struct i915_hw_state *state = i915->current;
+   struct i915_hw_state *state = &i915->state;
    int i, count, aper_count;
    GLuint dirty;
    dri_bo *aper_array[3 + I915_TEX_UNITS];
@@ -443,10 +439,6 @@ i915_emit_state(struct intel_context *intel)
 			 I915_GEM_DOMAIN_SAMPLER, 0,
                          state->tex_offset[i]);
             }
-            else if (state == &i915->meta) {
-               assert(i == 0);
-               OUT_BATCH(0);
-            }
             else {
                OUT_BATCH(state->tex_offset[i]);
             }
@@ -500,10 +492,6 @@ i915_destroy_context(struct intel_context *intel)
 
    intel_region_release(&i915->state.draw_region);
    intel_region_release(&i915->state.depth_region);
-   intel_region_release(&i915->meta.draw_region);
-   intel_region_release(&i915->meta.depth_region);
-   intel_region_release(&i915->initial.draw_region);
-   intel_region_release(&i915->initial.depth_region);
 
    for (i = 0; i < I915_TEX_UNITS; i++) {
       if (i915->state.tex_buffer[i] != NULL) {
@@ -533,29 +521,22 @@ i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
    }
 }
 
-/**
- * Set the drawing regions for the color and depth/stencil buffers.
- * This involves setting the pitch, cpp and buffer ID/location.
- * Also set pixel format for color and Z rendering
- * Used for setting both regular and meta state.
- */
-void
-i915_state_draw_region(struct intel_context *intel,
-                       struct i915_hw_state *state,
-                       struct intel_region *color_region,
-                       struct intel_region *depth_region)
+static void
+i915_set_draw_region(struct intel_context *intel,
+                     struct intel_region *color_regions[],
+                     struct intel_region *depth_region,
+		     GLuint num_regions)
 {
    struct i915_context *i915 = i915_context(&intel->ctx);
    GLcontext *ctx = &intel->ctx;
    struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
    GLuint value;
+   struct i915_hw_state *state = &i915->state;
 
-   ASSERT(state == &i915->state || state == &i915->meta);
-
-   if (state->draw_region != color_region) {
+   if (state->draw_region != color_regions[0]) {
       intel_region_release(&state->draw_region);
-      intel_region_reference(&state->draw_region, color_region);
+      intel_region_reference(&state->draw_region, color_regions[0]);
    }
    if (state->depth_region != depth_region) {
       intel_region_release(&state->depth_region);
@@ -566,7 +547,7 @@ i915_state_draw_region(struct intel_context *intel,
     * Set stride/cpp values
     */
    i915_set_buf_info_for_region(&state->Buffer[I915_DESTREG_CBUFADDR0],
-				color_region, BUF_3D_ID_COLOR_BACK);
+				color_regions[0], BUF_3D_ID_COLOR_BACK);
 
    i915_set_buf_info_for_region(&state->Buffer[I915_DESTREG_DBUFADDR0],
 				depth_region, BUF_3D_ID_DEPTH);
@@ -627,17 +608,6 @@ i915_state_draw_region(struct intel_context *intel,
 }
 
 
-static void
-i915_set_draw_region(struct intel_context *intel,
-                     struct intel_region *color_regions[],
-                     struct intel_region *depth_region,
-		     GLuint num_regions)
-{
-   struct i915_context *i915 = i915_context(&intel->ctx);
-   i915_state_draw_region(intel, &i915->state, color_regions[0], depth_region);
-}
-
-
 
 static void
 i915_new_batch(struct intel_context *intel)
@@ -655,8 +625,7 @@ static void
 i915_assert_not_dirty( struct intel_context *intel )
 {
    struct i915_context *i915 = i915_context(&intel->ctx);
-   struct i915_hw_state *state = i915->current;
-   GLuint dirty = get_dirty(state);
+   GLuint dirty = get_dirty(&i915->state);
    assert(!dirty);
 }
 
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index e99baf8e0e6..6d498c56542 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -52,8 +52,6 @@
 #include "intel_buffers.h"
 #include "intel_reg.h"
 #include "intel_span.h"
-#include "intel_tex.h"
-#include "intel_chipset.h"
 #include "i830_context.h"
 #include "i830_reg.h"
 
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index bac1c3a49c3..fa2d394b222 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -34,9 +34,7 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "brw_util.h"
-#include "intel_fbo.h"
 #include "main/macros.h"
-#include "main/enums.h"
 
 static void prepare_cc_vp( struct brw_context *brw )
 {
@@ -295,8 +293,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
    bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
 			 key, sizeof(*key),
 			 &brw->cc.vp_bo, 1,
-			 &cc, sizeof(cc),
-			 NULL, NULL);
+			 &cc, sizeof(cc));
 
    /* Emit CC viewport relocation */
    dri_bo_emit_reloc(bo,
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index af1d975de95..d3275c7a89d 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -130,13 +130,14 @@ static void compile_clip_prog( struct brw_context *brw,
    /* Upload
     */
    dri_bo_unreference(brw->clip.prog_bo);
-   brw->clip.prog_bo = brw_upload_cache( &brw->cache,
-					 BRW_CLIP_PROG,
-					 &c.key, sizeof(c.key),
-					 NULL, 0,
-					 program, program_size,
-					 &c.prog_data,
-					 &brw->clip.prog_data );
+   brw->clip.prog_bo = brw_upload_cache_with_auxdata(&brw->cache,
+						     BRW_CLIP_PROG,
+						     &c.key, sizeof(c.key),
+						     NULL, 0,
+						     program, program_size,
+						     &c.prog_data,
+						     sizeof(c.prog_data),
+						     &brw->clip.prog_data);
 }
 
 /* Calculate interpolants for triangle and line rasterization.
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index afc0b110494..ceb62a31162 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip_point.c b/src/mesa/drivers/dri/i965/brw_clip_point.c
index 8458f61c5a0..7f47634dca8 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_point.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_point.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index c8f24a94e4d..424c9a1f198 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -32,7 +32,6 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "main/macros.h"
 
 struct brw_clip_unit_key {
    unsigned int total_grf;
@@ -143,8 +142,7 @@ clip_unit_create_from_key(struct brw_context *brw,
    bo = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT,
 			 key, sizeof(*key),
 			 &brw->clip.prog_bo, 1,
-			 &clip, sizeof(clip),
-			 NULL, NULL);
+			 &clip, sizeof(clip));
 
    /* Emit clip program relocation */
    assert(brw->clip.prog_bo);
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index cfbb8f2686a..815211acc21 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 static void release_tmps( struct brw_clip_compile *c )
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index ad1bfa435fb..f36d22fdbf8 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -39,7 +39,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 86fed59fa4b..14bc889b0f8 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -40,7 +40,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_clip.h"
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 7bb15956b56..65f51be3410 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -33,7 +33,6 @@
 #include "main/imports.h"
 #include "main/api_noop.h"
 #include "main/macros.h"
-#include "main/vtxfmt.h"
 #include "main/simple_list.h"
 #include "shader/shader_api.h"
 
@@ -41,16 +40,9 @@
 #include "brw_defines.h"
 #include "brw_draw.h"
 #include "brw_state.h"
-#include "brw_vs.h"
-#include "intel_tex.h"
-#include "intel_blit.h"
-#include "intel_batchbuffer.h"
-#include "intel_pixel.h"
 #include "intel_span.h"
 #include "tnl/t_pipeline.h"
 
-#include "utils.h"
-
 
 /***************************************
  * Mesa's Driver Functions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 0dd3087143f..79818b92b75 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -131,7 +131,6 @@ struct brw_context;
 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 #define BRW_NEW_PSP                     0x800
 #define BRW_NEW_WM_SURFACES		0x1000
-#define BRW_NEW_FENCE                   0x2000
 #define BRW_NEW_INDICES			0x4000
 #define BRW_NEW_VERTICES		0x8000
 /**
@@ -332,7 +331,6 @@ struct brw_cache {
    struct brw_cache_item **items;
    GLuint size, n_items;
 
-   GLuint aux_size[BRW_MAX_CACHE];
    char *name[BRW_MAX_CACHE];
 
    /* Record of the last BOs chosen for each cache_id.  Used to set
@@ -583,6 +581,7 @@ struct brw_context
 
    struct {
       struct brw_vs_prog_data *prog_data;
+      int8_t *constant_map; /* variable array following prog_data */
 
       dri_bo *prog_bo;
       dri_bo *state_bo;
diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c
index 190310afbb0..22e3e732f40 100644
--- a/src/mesa/drivers/dri/i965/brw_curbe.c
+++ b/src/mesa/drivers/dri/i965/brw_curbe.c
@@ -256,13 +256,24 @@ static void prepare_constant_buffer(struct brw_context *brw)
        */
       _mesa_load_state_parameters(ctx, vp->program.Base.Parameters); 
 
-      /* XXX just use a memcpy here */
-      for (i = 0; i < nr; i++) {
-         const GLfloat *value = vp->program.Base.Parameters->ParameterValues[i];
-	 buf[offset + i * 4 + 0] = value[0];
-	 buf[offset + i * 4 + 1] = value[1];
-	 buf[offset + i * 4 + 2] = value[2];
-	 buf[offset + i * 4 + 3] = value[3];
+      if (vp->use_const_buffer) {
+	 /* Load the subset of push constants that will get used when
+	  * we also have a pull constant buffer.
+	  */
+	 for (i = 0; i < vp->program.Base.Parameters->NumParameters; i++) {
+	    if (brw->vs.constant_map[i] != -1) {
+	       assert(brw->vs.constant_map[i] <= nr);
+	       memcpy(buf + offset + brw->vs.constant_map[i] * 4,
+		      vp->program.Base.Parameters->ParameterValues[i],
+		      4 * sizeof(float));
+	    }
+	 }
+      } else {
+	 for (i = 0; i < nr; i++) {
+	    memcpy(buf + offset + i * 4,
+		   vp->program.Base.Parameters->ParameterValues[i],
+		   4 * sizeof(float));
+	 }
       }
    }
 
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index df281b27d5c..d510d767f97 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -39,10 +39,8 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 
 #include "intel_batchbuffer.h"
-#include "intel_buffer_objects.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BATCH
 
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index c773b71507c..c46b9ba89ce 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -29,19 +29,15 @@
 #include "main/glheader.h"
 #include "main/bufferobj.h"
 #include "main/context.h"
-#include "main/state.h"
-#include "main/api_validate.h"
 #include "main/enums.h"
 
 #include "brw_draw.h"
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
-#include "intel_tex.h"
 
 static GLuint double_types[5] = {
    0,
@@ -59,6 +55,14 @@ static GLuint float_types[5] = {
    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
 };
 
+static GLuint half_float_types[5] = {
+   0,
+   BRW_SURFACEFORMAT_R16_FLOAT,
+   BRW_SURFACEFORMAT_R16G16_FLOAT,
+   0, /* can't seem to render this one */
+   BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
+};
+
 static GLuint uint_types_norm[5] = {
    0,
    BRW_SURFACEFORMAT_R32_UNORM,
@@ -172,6 +176,7 @@ static GLuint get_surface_type( GLenum type, GLuint size,
       switch (type) {
       case GL_DOUBLE: return double_types[size];
       case GL_FLOAT: return float_types[size];
+      case GL_HALF_FLOAT: return half_float_types[size];
       case GL_INT: return int_types_norm[size];
       case GL_SHORT: return short_types_norm[size];
       case GL_BYTE: return byte_types_norm[size];
@@ -194,6 +199,7 @@ static GLuint get_surface_type( GLenum type, GLuint size,
       switch (type) {
       case GL_DOUBLE: return double_types[size];
       case GL_FLOAT: return float_types[size];
+      case GL_HALF_FLOAT: return half_float_types[size];
       case GL_INT: return int_types_scale[size];
       case GL_SHORT: return short_types_scale[size];
       case GL_BYTE: return byte_types_scale[size];
@@ -211,6 +217,7 @@ static GLuint get_size( GLenum type )
    switch (type) {
    case GL_DOUBLE: return sizeof(GLdouble);
    case GL_FLOAT: return sizeof(GLfloat);
+   case GL_HALF_FLOAT: return sizeof(GLhalfARB);
    case GL_INT: return sizeof(GLint);
    case GL_SHORT: return sizeof(GLshort);
    case GL_BYTE: return sizeof(GLbyte);
diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c
index fe5c1ae2791..ba401c215cb 100644
--- a/src/mesa/drivers/dri/i965/brw_fallback.c
+++ b/src/mesa/drivers/dri/i965/brw_fallback.c
@@ -36,13 +36,9 @@
 #include "swrast/swrast.h"
 #include "tnl/tnl.h"
 #include "brw_context.h"
-#include "brw_fallback.h"
-#include "intel_chipset.h"
 #include "intel_fbo.h"
 #include "intel_regions.h"
 
-#include "glapi/glapi.h"
-
 #define FILE_DEBUG_FLAG DEBUG_FALLBACKS
 
 static GLboolean do_check_fallback(struct brw_context *brw)
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 1bc3eccf49d..7261b316c10 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -125,12 +125,13 @@ static void compile_gs_prog( struct brw_context *brw,
    /* Upload
     */
    dri_bo_unreference(brw->gs.prog_bo);
-   brw->gs.prog_bo = brw_upload_cache( &brw->cache, BRW_GS_PROG,
-				       &c.key, sizeof(c.key),
-				       NULL, 0,
-				       program, program_size,
-				       &c.prog_data,
-				       &brw->gs.prog_data );
+   brw->gs.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_GS_PROG,
+						   &c.key, sizeof(c.key),
+						   NULL, 0,
+						   program, program_size,
+						   &c.prog_data,
+						   sizeof(c.prog_data),
+						   &brw->gs.prog_data);
 }
 
 static const GLenum gs_prim[GL_POLYGON+1] = {  
diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index a81b972ef4b..dd7b057d620 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -40,7 +40,6 @@
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "brw_util.h"
 #include "brw_gs.h"
 
 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
index 1af5790a676..d8ad5cecf3f 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
@@ -34,7 +34,6 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "main/macros.h"
 
 struct brw_gs_unit_key {
    unsigned int total_grf;
@@ -108,8 +107,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
    bo = brw_upload_cache(&brw->cache, BRW_GS_UNIT,
 			 key, sizeof(*key),
 			 &brw->gs.prog_bo, 1,
-			 &gs, sizeof(gs),
-			 NULL, NULL);
+			 &gs, sizeof(gs));
 
    if (key->prog_active) {
       /* Emit GS program relocation */
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 7b70f787b7b..f708ee00632 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -327,7 +327,7 @@ const struct brw_tracked_state brw_polygon_stipple = {
 
 static void upload_polygon_stipple_offset(struct brw_context *brw)
 {
-   __DRIdrawable *dPriv = brw->intel.driDrawable;
+   GLcontext *ctx = &brw->intel.ctx;
    struct brw_polygon_stipple_offset bpso;
 
    memset(&bpso, 0, sizeof(bpso));
@@ -343,8 +343,8 @@ static void upload_polygon_stipple_offset(struct brw_context *brw)
     * worry about.
     */
    if (brw->intel.ctx.DrawBuffer->Name == 0) {
-      bpso.bits0.x_offset = (32 - (dPriv->x & 31)) & 31;
-      bpso.bits0.y_offset = (32 - ((dPriv->y + dPriv->h) & 31)) & 31;
+      bpso.bits0.x_offset = 0;
+      bpso.bits0.y_offset = (32 - (ctx->DrawBuffer->Height & 31)) & 31;
    }
    else {
       bpso.bits0.y_offset = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index bac69187c19..e3b6fccc49f 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -37,7 +37,6 @@
 #include "tnl/tnl.h"
 
 #include "brw_context.h"
-#include "brw_util.h"
 #include "brw_wm.h"
 
 static void brwBindProgram( GLcontext *ctx,
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c
index 968890f7fb1..8e6839b8120 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.c
+++ b/src/mesa/drivers/dri/i965/brw_sf.c
@@ -117,12 +117,13 @@ static void compile_sf_prog( struct brw_context *brw,
    /* Upload
     */
    dri_bo_unreference(brw->sf.prog_bo);
-   brw->sf.prog_bo = brw_upload_cache( &brw->cache, BRW_SF_PROG,
-				       &c.key, sizeof(c.key),
-				       NULL, 0,
-				       program, program_size,
-				       &c.prog_data,
-				       &brw->sf.prog_data );
+   brw->sf.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_SF_PROG,
+						   &c.key, sizeof(c.key),
+						   NULL, 0,
+						   program, program_size,
+						   &c.prog_data,
+						   sizeof(c.prog_data),
+						   &brw->sf.prog_data);
 }
 
 /* Calculate interpolants for triangle and line rasterization.
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index 09223b7cfb1..847c886279d 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -35,7 +35,6 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "main/macros.h"
-#include "intel_fbo.h"
 
 static void upload_sf_vp(struct brw_context *brw)
 {
@@ -70,9 +69,9 @@ static void upload_sf_vp(struct brw_context *brw)
     * for DrawBuffer->_[XY]{min,max}
     */
 
-   /* The scissor only needs to handle the intersection of drawable and
-    * scissor rect.  Clipping to the boundaries of static shared buffers
-    * for front/back/depth is covered by looping over cliprects in brw_draw.c.
+   /* The scissor only needs to handle the intersection of drawable
+    * and scissor rect, since there are no longer cliprects for shared
+    * buffers with DRI2.
     *
     * Note that the hardware's coordinates are inclusive, while Mesa's min is
     * inclusive but max is exclusive.
@@ -309,8 +308,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
    bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT,
 			 key, sizeof(*key),
 			 reloc_bufs, 2,
-			 &sf, sizeof(sf),
-			 NULL, NULL);
+			 &sf, sizeof(sf));
 
    /* STATE_PREFETCH command description describes this state as being
     * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 9c9d145c4b6..536fe8b249b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -124,16 +124,26 @@ dri_bo *brw_cache_data(struct brw_cache *cache,
 		       dri_bo **reloc_bufs,
 		       GLuint nr_reloc_bufs);
 
-dri_bo *brw_upload_cache( struct brw_cache *cache,
-			  enum brw_cache_id cache_id,
-			  const void *key,
-			  GLuint key_sz,
-			  dri_bo **reloc_bufs,
-			  GLuint nr_reloc_bufs,
-			  const void *data,
-			  GLuint data_sz,
-			  const void *aux,
-			  void *aux_return );
+drm_intel_bo *brw_upload_cache(struct brw_cache *cache,
+			       enum brw_cache_id cache_id,
+			       const void *key,
+			       GLuint key_sz,
+			       dri_bo **reloc_bufs,
+			       GLuint nr_reloc_bufs,
+			       const void *data,
+			       GLuint data_sz);
+
+drm_intel_bo *brw_upload_cache_with_auxdata(struct brw_cache *cache,
+					    enum brw_cache_id cache_id,
+					    const void *key,
+					    GLuint key_sz,
+					    dri_bo **reloc_bufs,
+					    GLuint nr_reloc_bufs,
+					    const void *data,
+					    GLuint data_sz,
+					    const void *aux,
+					    GLuint aux_sz,
+					    void *aux_return);
 
 dri_bo *brw_search_cache( struct brw_cache *cache,
 			  enum brw_cache_id cache_id,
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c
index e4c9ba7d870..5fc47b0420a 100644
--- a/src/mesa/drivers/dri/i965/brw_state_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
@@ -71,25 +71,23 @@
 
 
 static GLuint
-hash_key(const void *key, GLuint key_size,
-         dri_bo **reloc_bufs, GLuint nr_reloc_bufs)
+hash_key(struct brw_cache_item *item)
 {
-   GLuint *ikey = (GLuint *)key;
-   GLuint hash = 0, i;
+   GLuint *ikey = (GLuint *)item->key;
+   GLuint hash = item->cache_id, i;
 
-   assert(key_size % 4 == 0);
+   assert(item->key_size % 4 == 0);
 
    /* I'm sure this can be improved on:
     */
-   for (i = 0; i < key_size/4; i++) {
+   for (i = 0; i < item->key_size/4; i++) {
       hash ^= ikey[i];
       hash = (hash << 5) | (hash >> 27);
    }
 
    /* Include the BO pointers as key data as well */
-   ikey = (GLuint *)reloc_bufs;
-   key_size = nr_reloc_bufs * sizeof(dri_bo *);
-   for (i = 0; i < key_size/4; i++) {
+   ikey = (GLuint *)item->reloc_bufs;
+   for (i = 0; i < item->nr_reloc_bufs * sizeof(drm_intel_bo *) / 4; i++) {
       hash ^= ikey[i];
       hash = (hash << 5) | (hash >> 27);
    }
@@ -114,11 +112,22 @@ update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id,
    cache->brw->state.dirty.cache |= 1 << cache_id;
 }
 
+static int
+brw_cache_item_equals(const struct brw_cache_item *a,
+		      const struct brw_cache_item *b)
+{
+   return a->cache_id == b->cache_id &&
+      a->hash == b->hash &&
+      a->key_size == b->key_size &&
+      (memcmp(a->key, b->key, a->key_size) == 0) &&
+      a->nr_reloc_bufs == b->nr_reloc_bufs &&
+      (memcmp(a->reloc_bufs, b->reloc_bufs,
+	      a->nr_reloc_bufs * sizeof(dri_bo *)) == 0);
+}
 
 static struct brw_cache_item *
-search_cache(struct brw_cache *cache, enum brw_cache_id cache_id,
-	     GLuint hash, const void *key, GLuint key_size,
-	     dri_bo **reloc_bufs, GLuint nr_reloc_bufs)
+search_cache(struct brw_cache *cache, GLuint hash,
+	     struct brw_cache_item *lookup)
 {
    struct brw_cache_item *c;
 
@@ -133,13 +142,7 @@ search_cache(struct brw_cache *cache, enum brw_cache_id cache_id,
 #endif
 
    for (c = cache->items[hash % cache->size]; c; c = c->next) {
-      if (c->cache_id == cache_id &&
-	  c->hash == hash &&
-	  c->key_size == key_size &&
-	  memcmp(c->key, key, key_size) == 0 &&
-	  c->nr_reloc_bufs == nr_reloc_bufs &&
-	  memcmp(c->reloc_bufs, reloc_bufs,
-		 nr_reloc_bufs * sizeof(dri_bo *)) == 0)
+      if (brw_cache_item_equals(lookup, c))
 	 return c;
    }
 
@@ -182,10 +185,18 @@ brw_search_cache(struct brw_cache *cache,
                  void *aux_return)
 {
    struct brw_cache_item *item;
-   GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs);
+   struct brw_cache_item lookup;
+   GLuint hash;
 
-   item = search_cache(cache, cache_id, hash, key, key_size,
-		       reloc_bufs, nr_reloc_bufs);
+   lookup.cache_id = cache_id;
+   lookup.key = key;
+   lookup.key_size = key_size;
+   lookup.reloc_bufs = reloc_bufs;
+   lookup.nr_reloc_bufs = nr_reloc_bufs;
+   hash = hash_key(&lookup);
+   lookup.hash = hash;
+
+   item = search_cache(cache, hash, &lookup);
 
    if (item == NULL)
       return NULL;
@@ -200,26 +211,34 @@ brw_search_cache(struct brw_cache *cache,
 }
 
 
-dri_bo *
-brw_upload_cache( struct brw_cache *cache,
-		  enum brw_cache_id cache_id,
-		  const void *key,
-		  GLuint key_size,
-		  dri_bo **reloc_bufs,
-		  GLuint nr_reloc_bufs,
-		  const void *data,
-		  GLuint data_size,
-		  const void *aux,
-		  void *aux_return )
+drm_intel_bo *
+brw_upload_cache_with_auxdata(struct brw_cache *cache,
+			      enum brw_cache_id cache_id,
+			      const void *key,
+			      GLuint key_size,
+			      dri_bo **reloc_bufs,
+			      GLuint nr_reloc_bufs,
+			      const void *data,
+			      GLuint data_size,
+			      const void *aux,
+			      GLuint aux_size,
+			      void *aux_return)
 {
    struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item);
-   GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs);
+   GLuint hash;
    GLuint relocs_size = nr_reloc_bufs * sizeof(dri_bo *);
-   GLuint aux_size = cache->aux_size[cache_id];
    void *tmp;
    dri_bo *bo;
    int i;
 
+   item->cache_id = cache_id;
+   item->key = key;
+   item->key_size = key_size;
+   item->reloc_bufs = reloc_bufs;
+   item->nr_reloc_bufs = nr_reloc_bufs;
+   hash = hash_key(item);
+   item->hash = hash;
+
    /* Create the buffer object to contain the data */
    bo = dri_bo_alloc(cache->brw->intel.bufmgr,
 		     cache->name[cache_id], data_size, 1 << 6);
@@ -229,19 +248,15 @@ brw_upload_cache( struct brw_cache *cache,
    tmp = _mesa_malloc(key_size + aux_size + relocs_size);
 
    memcpy(tmp, key, key_size);
-   memcpy(tmp + key_size, aux, cache->aux_size[cache_id]);
+   memcpy(tmp + key_size, aux, aux_size);
    memcpy(tmp + key_size + aux_size, reloc_bufs, relocs_size);
    for (i = 0; i < nr_reloc_bufs; i++) {
       if (reloc_bufs[i] != NULL)
 	 dri_bo_reference(reloc_bufs[i]);
    }
 
-   item->cache_id = cache_id;
    item->key = tmp;
-   item->hash = hash;
-   item->key_size = key_size;
    item->reloc_bufs = tmp + key_size + aux_size;
-   item->nr_reloc_bufs = nr_reloc_bufs;
 
    item->bo = bo;
    dri_bo_reference(bo);
@@ -255,7 +270,6 @@ brw_upload_cache( struct brw_cache *cache,
    cache->n_items++;
 
    if (aux_return) {
-      assert(cache->aux_size[cache_id]);
       *(void **)aux_return = (void *)((char *)item->key + item->key_size);
    }
 
@@ -272,6 +286,23 @@ brw_upload_cache( struct brw_cache *cache,
    return bo;
 }
 
+drm_intel_bo *
+brw_upload_cache(struct brw_cache *cache,
+		 enum brw_cache_id cache_id,
+		 const void *key,
+		 GLuint key_size,
+		 dri_bo **reloc_bufs,
+		 GLuint nr_reloc_bufs,
+		 const void *data,
+		 GLuint data_size)
+{
+   return brw_upload_cache_with_auxdata(cache, cache_id,
+					key, key_size,
+					reloc_bufs, nr_reloc_bufs,
+					data, data_size,
+					NULL, 0,
+					NULL);
+}
 
 /**
  * Wrapper around brw_cache_data_sz using the cache_id's canonical key size.
@@ -292,11 +323,18 @@ brw_cache_data(struct brw_cache *cache,
 	       GLuint nr_reloc_bufs)
 {
    dri_bo *bo;
-   struct brw_cache_item *item;
-   GLuint hash = hash_key(data, data_size, reloc_bufs, nr_reloc_bufs);
-
-   item = search_cache(cache, cache_id, hash, data, data_size,
-		       reloc_bufs, nr_reloc_bufs);
+   struct brw_cache_item *item, lookup;
+   GLuint hash;
+
+   lookup.cache_id = cache_id;
+   lookup.key = data;
+   lookup.key_size = data_size;
+   lookup.reloc_bufs = reloc_bufs;
+   lookup.nr_reloc_bufs = nr_reloc_bufs;
+   hash = hash_key(&lookup);
+   lookup.hash = hash;
+
+   item = search_cache(cache, hash, &lookup);
    if (item) {
       update_cache_last(cache, cache_id, item->bo);
       dri_bo_reference(item->bo);
@@ -306,8 +344,7 @@ brw_cache_data(struct brw_cache *cache,
    bo = brw_upload_cache(cache, cache_id,
 			 data, data_size,
 			 reloc_bufs, nr_reloc_bufs,
-			 data, data_size,
-			 NULL, NULL);
+			 data, data_size);
 
    return bo;
 }
@@ -321,11 +358,9 @@ enum pool_type {
 static void
 brw_init_cache_id(struct brw_cache *cache,
                   const char *name,
-                  enum brw_cache_id id,
-                  GLuint aux_size)
+                  enum brw_cache_id id)
 {
    cache->name[id] = strdup(name);
-   cache->aux_size[id] = aux_size;
 }
 
 
@@ -341,80 +376,28 @@ brw_init_non_surface_cache(struct brw_context *brw)
    cache->items = (struct brw_cache_item **)
       _mesa_calloc(cache->size * sizeof(struct brw_cache_item));
 
-   brw_init_cache_id(cache,
-		     "CC_VP",
-		     BRW_CC_VP,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "CC_UNIT",
-		     BRW_CC_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "WM_PROG",
-		     BRW_WM_PROG,
-		     sizeof(struct brw_wm_prog_data));
-
-   brw_init_cache_id(cache,
-		     "SAMPLER_DEFAULT_COLOR",
-		     BRW_SAMPLER_DEFAULT_COLOR,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "SAMPLER",
-		     BRW_SAMPLER,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "WM_UNIT",
-		     BRW_WM_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "SF_PROG",
-		     BRW_SF_PROG,
-		     sizeof(struct brw_sf_prog_data));
-
-   brw_init_cache_id(cache,
-		     "SF_VP",
-		     BRW_SF_VP,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "SF_UNIT",
-		     BRW_SF_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "VS_UNIT",
-		     BRW_VS_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "VS_PROG",
-		     BRW_VS_PROG,
-		     sizeof(struct brw_vs_prog_data));
-
-   brw_init_cache_id(cache,
-		     "CLIP_UNIT",
-		     BRW_CLIP_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "CLIP_PROG",
-		     BRW_CLIP_PROG,
-		     sizeof(struct brw_clip_prog_data));
-
-   brw_init_cache_id(cache,
-		     "GS_UNIT",
-		     BRW_GS_UNIT,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "GS_PROG",
-		     BRW_GS_PROG,
-		     sizeof(struct brw_gs_prog_data));
+   brw_init_cache_id(cache, "CC_VP", BRW_CC_VP);
+   brw_init_cache_id(cache, "CC_UNIT", BRW_CC_UNIT);
+   brw_init_cache_id(cache, "WM_PROG", BRW_WM_PROG);
+   brw_init_cache_id(cache, "SAMPLER_DEFAULT_COLOR", BRW_SAMPLER_DEFAULT_COLOR);
+   brw_init_cache_id(cache, "SAMPLER", BRW_SAMPLER);
+   brw_init_cache_id(cache, "WM_UNIT", BRW_WM_UNIT);
+   brw_init_cache_id(cache, "SF_PROG", BRW_SF_PROG);
+   brw_init_cache_id(cache, "SF_VP", BRW_SF_VP);
+
+   brw_init_cache_id(cache, "SF_UNIT", BRW_SF_UNIT);
+
+   brw_init_cache_id(cache, "VS_UNIT", BRW_VS_UNIT);
+
+   brw_init_cache_id(cache, "VS_PROG", BRW_VS_PROG);
+
+   brw_init_cache_id(cache, "CLIP_UNIT", BRW_CLIP_UNIT);
+
+   brw_init_cache_id(cache, "CLIP_PROG", BRW_CLIP_PROG);
+
+   brw_init_cache_id(cache, "GS_UNIT", BRW_GS_UNIT);
+
+   brw_init_cache_id(cache, "GS_PROG", BRW_GS_PROG);
 }
 
 
@@ -430,15 +413,8 @@ brw_init_surface_cache(struct brw_context *brw)
    cache->items = (struct brw_cache_item **)
       _mesa_calloc(cache->size * sizeof(struct brw_cache_item));
 
-   brw_init_cache_id(cache,
-		     "SS_SURFACE",
-		     BRW_SS_SURFACE,
-		     0);
-
-   brw_init_cache_id(cache,
-		     "SS_SURF_BIND",
-		     BRW_SS_SURF_BIND,
-		     0);
+   brw_init_cache_id(cache, "SS_SURFACE", BRW_SS_SURFACE);
+   brw_init_cache_id(cache, "SS_SURF_BIND", BRW_SS_SURF_BIND);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
index e94fa7d2b4c..020ac523b68 100644
--- a/src/mesa/drivers/dri/i965/brw_state_dump.c
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -28,7 +28,6 @@
 #include "main/mtypes.h"
 
 #include "brw_context.h"
-#include "brw_state.h"
 #include "brw_defines.h"
 
 /**
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index af8dfb4c15c..0ecbef1ef92 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -36,13 +36,7 @@
 #include "intel_batchbuffer.h"
 #include "intel_buffers.h"
 
-/* This is used to initialize brw->state.atoms[].  We could use this
- * list directly except for a single atom, brw_constant_buffer, which
- * has a .dirty value which changes according to the parameters of the
- * current fragment and vertex programs, and so cannot be a static
- * value.
- */
-const struct brw_tracked_state *atoms[] =
+static const struct brw_tracked_state *atoms[] =
 {
    &brw_check_fallback,
 
@@ -208,7 +202,6 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_CONTEXT),
    DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
    DEFINE_BIT(BRW_NEW_PSP),
-   DEFINE_BIT(BRW_NEW_FENCE),
    DEFINE_BIT(BRW_NEW_INDICES),
    DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VERTICES),
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 64a9535282b..09edfd81fde 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -36,7 +36,6 @@
 #include "intel_tex_layout.h"
 #include "intel_context.h"
 #include "main/macros.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index fd055e225e0..44b085e214b 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -35,6 +35,7 @@
 #include "brw_util.h"
 #include "brw_state.h"
 #include "shader/prog_print.h"
+#include "shader/prog_parameter.h"
 
 
 
@@ -42,9 +43,11 @@ static void do_vs_prog( struct brw_context *brw,
 			struct brw_vertex_program *vp,
 			struct brw_vs_prog_key *key )
 {
+   GLcontext *ctx = &brw->intel.ctx;
    GLuint program_size;
    const GLuint *program;
    struct brw_vs_compile c;
+   int aux_size;
 
    memset(&c, 0, sizeof(c));
    memcpy(&c.key, key, sizeof(*key));
@@ -73,13 +76,27 @@ static void do_vs_prog( struct brw_context *brw,
     */
    program = brw_get_program(&c.func, &program_size);
 
+   /* We upload from &c.prog_data including the constant_map assuming
+    * they're packed together.  It would be nice to have a
+    * compile-time assert macro here.
+    */
+   assert(c.constant_map == (int8_t *)&c.prog_data +
+	  sizeof(c.prog_data));
+   assert(ctx->Const.VertexProgram.MaxNativeParameters ==
+	  ARRAY_SIZE(c.constant_map));
+
+   aux_size = sizeof(c.prog_data);
+   if (c.vp->use_const_buffer)
+      aux_size += c.vp->program.Base.Parameters->NumParameters;
+
    dri_bo_unreference(brw->vs.prog_bo);
-   brw->vs.prog_bo = brw_upload_cache( &brw->cache, BRW_VS_PROG,
-				       &c.key, sizeof(c.key),
-				       NULL, 0,
-				       program, program_size,
-				       &c.prog_data,
-				       &brw->vs.prog_data );
+   brw->vs.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_VS_PROG,
+						   &c.key, sizeof(c.key),
+						   NULL, 0,
+						   program, program_size,
+						   &c.prog_data,
+						   aux_size,
+						   &brw->vs.prog_data);
 }
 
 
@@ -109,6 +126,8 @@ static void brw_upload_vs_prog(struct brw_context *brw)
 				      &brw->vs.prog_data);
    if (brw->vs.prog_bo == NULL)
       do_vs_prog(brw, vp, &key);
+   brw->vs.constant_map = ((int8_t *)brw->vs.prog_data +
+			   sizeof(*brw->vs.prog_data));
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h
index 4a591365c98..95e0501b1eb 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.h
+++ b/src/mesa/drivers/dri/i965/brw_vs.h
@@ -51,6 +51,7 @@ struct brw_vs_compile {
    struct brw_compile func;
    struct brw_vs_prog_key key;
    struct brw_vs_prog_data prog_data;
+   int8_t constant_map[1024];
 
    struct brw_vertex_program *vp;
 
@@ -81,6 +82,8 @@ struct brw_vs_compile {
       GLint index;
       struct brw_reg reg;
    } current_const[3];
+
+   GLboolean needs_stack;
 };
 
 void brw_vs_emit( struct brw_vs_compile *c );
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 1b84dd505f6..52cc04fee87 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -104,9 +104,47 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
    /* Vertex program parameters from curbe:
     */
    if (c->vp->use_const_buffer) {
-      /* get constants from a real constant buffer */
-      c->prog_data.curb_read_length = 0;
-      c->prog_data.nr_params = 4; /* XXX 0 causes a bug elsewhere... */
+      int max_constant = BRW_MAX_GRF - 20 - c->vp->program.Base.NumTemporaries;
+      int constant = 0;
+
+      /* We've got more constants than we can load with the push
+       * mechanism.  This is often correlated with reladdr loads where
+       * we should probably be using a pull mechanism anyway to avoid
+       * excessive reading.  However, the pull mechanism is slow in
+       * general.  So, we try to allocate as many non-reladdr-loaded
+       * constants through the push buffer as we can before giving up.
+       */
+      memset(c->constant_map, -1, c->vp->program.Base.Parameters->NumParameters);
+      for (i = 0;
+	   i < c->vp->program.Base.NumInstructions && constant < max_constant;
+	   i++) {
+	 struct prog_instruction *inst = &c->vp->program.Base.Instructions[i];
+	 int arg;
+
+	 for (arg = 0; arg < 3 && constant < max_constant; arg++) {
+	    if ((inst->SrcReg[arg].File != PROGRAM_STATE_VAR &&
+		 inst->SrcReg[arg].File != PROGRAM_CONSTANT &&
+		 inst->SrcReg[arg].File != PROGRAM_UNIFORM &&
+		 inst->SrcReg[arg].File != PROGRAM_ENV_PARAM &&
+		 inst->SrcReg[arg].File != PROGRAM_LOCAL_PARAM) ||
+		inst->SrcReg[arg].RelAddr)
+	       continue;
+
+	    if (c->constant_map[inst->SrcReg[arg].Index] == -1) {
+	       c->constant_map[inst->SrcReg[arg].Index] = constant++;
+	    }
+	 }
+      }
+
+      for (i = 0; i < constant; i++) {
+         c->regs[PROGRAM_STATE_VAR][i] = stride( brw_vec4_grf(reg+i/2,
+							      (i%2) * 4),
+						 0, 4, 1);
+      }
+      reg += (constant + 1) / 2;
+      c->prog_data.curb_read_length = reg - 1;
+      /* XXX 0 causes a bug elsewhere... */
+      c->prog_data.nr_params = MAX2(constant * 4, 4);
    }
    else {
       /* use a section of the GRF for constants */
@@ -214,8 +252,10 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
       }
    }
 
-   c->stack =  brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, reg, 0);
-   reg += 2;
+   if (c->needs_stack) {
+      c->stack =  brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, reg, 0);
+      reg += 2;
+   }
 
    /* Some opcodes need an internal temporary:
     */
@@ -762,15 +802,14 @@ get_constant(struct brw_vs_compile *c,
 {
    const struct prog_src_register *src = &inst->SrcReg[argIndex];
    struct brw_compile *p = &c->func;
-   struct brw_reg const_reg;
-   struct brw_reg const2_reg;
-   const GLboolean relAddr = src->RelAddr;
+   struct brw_reg const_reg = c->current_const[argIndex].reg;
 
    assert(argIndex < 3);
 
-   if (c->current_const[argIndex].index != src->Index || relAddr) {
+   if (c->current_const[argIndex].index != src->Index) {
       struct brw_reg addrReg = c->regs[PROGRAM_ADDRESS][0];
 
+      /* Keep track of the last constant loaded in this slot, for reuse. */
       c->current_const[argIndex].index = src->Index;
 
 #if 0
@@ -779,48 +818,74 @@ get_constant(struct brw_vs_compile *c,
 #endif
       /* need to fetch the constant now */
       brw_dp_READ_4_vs(p,
-                       c->current_const[argIndex].reg,/* writeback dest */
+                       const_reg,                     /* writeback dest */
                        0,                             /* oword */
-                       relAddr,                       /* relative indexing? */
+                       0,                             /* relative indexing? */
                        addrReg,                       /* address register */
                        16 * src->Index,               /* byte offset */
                        SURF_INDEX_VERT_CONST_BUFFER   /* binding table index */
                        );
-
-      if (relAddr) {
-         /* second read */
-         const2_reg = get_tmp(c);
-
-         /* use upper half of address reg for second read */
-         addrReg = stride(addrReg, 0, 4, 0);
-         addrReg.subnr = 16;
-
-         brw_dp_READ_4_vs(p,
-                          const2_reg,              /* writeback dest */
-                          1,                       /* oword */
-                          relAddr,                 /* relative indexing? */
-                          addrReg,                 /* address register */
-                          16 * src->Index,         /* byte offset */
-                          SURF_INDEX_VERT_CONST_BUFFER
-                          );
-      }
    }
 
-   const_reg = c->current_const[argIndex].reg;
+   /* replicate lower four floats into upper half (to get XYZWXYZW) */
+   const_reg = stride(const_reg, 0, 4, 0);
+   const_reg.subnr = 0;
 
-   if (relAddr) {
-      /* merge the two Owords into the constant register */
-      /* const_reg[7..4] = const2_reg[7..4] */
-      brw_MOV(p,
-              suboffset(stride(const_reg, 0, 4, 1), 4),
-              suboffset(stride(const2_reg, 0, 4, 1), 4));
-      release_tmp(c, const2_reg);
-   }
-   else {
-      /* replicate lower four floats into upper half (to get XYZWXYZW) */
-      const_reg = stride(const_reg, 0, 4, 0);
-      const_reg.subnr = 0;
-   }
+   return const_reg;
+}
+
+static struct brw_reg
+get_reladdr_constant(struct brw_vs_compile *c,
+		     const struct prog_instruction *inst,
+		     GLuint argIndex)
+{
+   const struct prog_src_register *src = &inst->SrcReg[argIndex];
+   struct brw_compile *p = &c->func;
+   struct brw_reg const_reg = c->current_const[argIndex].reg;
+   struct brw_reg const2_reg;
+   struct brw_reg addrReg = c->regs[PROGRAM_ADDRESS][0];
+
+   assert(argIndex < 3);
+
+   /* Can't reuse a reladdr constant load. */
+   c->current_const[argIndex].index = -1;
+
+ #if 0
+   printf("  fetch const[a0.x+%d] for arg %d into reg %d\n",
+	  src->Index, argIndex, c->current_const[argIndex].reg.nr);
+#endif
+
+   /* fetch the first vec4 */
+   brw_dp_READ_4_vs(p,
+		    const_reg,                     /* writeback dest */
+		    0,                             /* oword */
+		    1,                             /* relative indexing? */
+		    addrReg,                       /* address register */
+		    16 * src->Index,               /* byte offset */
+		    SURF_INDEX_VERT_CONST_BUFFER   /* binding table index */
+		    );
+   /* second vec4 */
+   const2_reg = get_tmp(c);
+
+   /* use upper half of address reg for second read */
+   addrReg = stride(addrReg, 0, 4, 0);
+   addrReg.subnr = 16;
+
+   brw_dp_READ_4_vs(p,
+		    const2_reg,              /* writeback dest */
+		    1,                       /* oword */
+		    1,                       /* relative indexing? */
+		    addrReg,                 /* address register */
+		    16 * src->Index,         /* byte offset */
+		    SURF_INDEX_VERT_CONST_BUFFER
+		    );
+
+   /* merge the two Owords into the constant register */
+   /* const_reg[7..4] = const2_reg[7..4] */
+   brw_MOV(p,
+	   suboffset(stride(const_reg, 0, 4, 1), 4),
+	   suboffset(stride(const2_reg, 0, 4, 1), 4));
+   release_tmp(c, const2_reg);
 
    return const_reg;
 }
@@ -928,7 +993,13 @@ get_src_reg( struct brw_vs_compile *c,
    case PROGRAM_ENV_PARAM:
    case PROGRAM_LOCAL_PARAM:
       if (c->vp->use_const_buffer) {
-         return get_constant(c, inst, argIndex);
+	 if (!relAddr && c->constant_map[index] != -1) {
+	    assert(c->regs[PROGRAM_STATE_VAR][c->constant_map[index]].nr != 0);
+	    return c->regs[PROGRAM_STATE_VAR][c->constant_map[index]];
+	 } else if (relAddr)
+	    return get_reladdr_constant(c, inst, argIndex);
+	 else
+	    return get_constant(c, inst, argIndex);
       }
       else if (relAddr) {
          return deref(c, c->regs[PROGRAM_STATE_VAR][0], index);
@@ -1380,12 +1451,14 @@ void brw_vs_emit(struct brw_vs_compile *c )
 
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_access_mode(p, BRW_ALIGN_16);
-   
-   /* Message registers can't be read, so copy the output into GRF register
-      if they are used in source registers */
+
    for (insn = 0; insn < nr_insns; insn++) {
        GLuint i;
        struct prog_instruction *inst = &c->vp->program.Base.Instructions[insn];
+
+       /* Message registers can't be read, so copy the output into GRF
+	* register if they are used in source registers
+	*/
        for (i = 0; i < 3; i++) {
 	   struct prog_src_register *src = &inst->SrcReg[i];
 	   GLuint index = src->Index;
@@ -1393,12 +1466,23 @@ void brw_vs_emit(struct brw_vs_compile *c )
 	   if (file == PROGRAM_OUTPUT && index != VERT_RESULT_HPOS)
 	       c->output_regs[index].used_in_src = GL_TRUE;
        }
+
+       switch (inst->Opcode) {
+       case OPCODE_CAL:
+       case OPCODE_RET:
+	  c->needs_stack = GL_TRUE;
+	  break;
+       default:
+	  break;
+       }
    }
 
    /* Static register allocation
     */
    brw_vs_alloc_regs(c);
-   brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
+
+   if (c->needs_stack)
+      brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
 
    for (insn = 0; insn < nr_insns; insn++) {
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 345ffa7ee11..fd9f2fee423 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -164,8 +164,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
    bo = brw_upload_cache(&brw->cache, BRW_VS_UNIT,
 			 key, sizeof(*key),
 			 &brw->vs.prog_bo, 1,
-			 &vs, sizeof(vs),
-			 NULL, NULL);
+			 &vs, sizeof(vs));
 
    /* Emit VS program relocation */
    dri_bo_emit_reloc(bo,
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 3bc9840a971..ead623fc0ea 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -35,7 +35,6 @@
 
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_defines.h"
 
 /* Creates a new VS constant buffer reflecting the current VS program's
  * constants, if needed by the VS program.
@@ -156,7 +155,7 @@ brw_vs_get_binding_table(struct brw_context *brw)
 
    if (bind_bo == NULL) {
       GLuint data_size = BRW_VS_MAX_SURF * sizeof(GLuint);
-      uint32_t *data = malloc(data_size);
+      uint32_t data[BRW_VS_MAX_SURF];
       int i;
 
       for (i = 0; i < BRW_VS_MAX_SURF; i++)
@@ -168,8 +167,7 @@ brw_vs_get_binding_table(struct brw_context *brw)
       bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND,
 				  NULL, 0,
 				  brw->vs.surf_bo, BRW_VS_MAX_SURF,
-				  data, data_size,
-				  NULL, NULL);
+				  data, data_size);
 
       /* Emit binding table relocations to surface state */
       for (i = 0; i < BRW_VS_MAX_SURF; i++) {
@@ -182,8 +180,6 @@ brw_vs_get_binding_table(struct brw_context *brw)
 				    I915_GEM_DOMAIN_INSTRUCTION, 0);
 	 }
       }
-
-      free(data);
    }
 
    return bind_bo;
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 72749b3859d..e08f32c4e27 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -44,7 +44,6 @@
 #include "brw_state.h"
 #include "brw_draw.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 #include "brw_vs.h"
 #include "brw_wm.h"
 
@@ -172,12 +171,6 @@ static void brw_new_batch( struct intel_context *intel )
    }
 }
 
-
-static void brw_note_fence( struct intel_context *intel, GLuint fence )
-{
-   brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_FENCE;
-}
-
 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
 {
    /* nothing */
@@ -193,7 +186,6 @@ void brwInitVtbl( struct brw_context *brw )
    brw->intel.vtbl.update_texture_state = 0;
 
    brw->intel.vtbl.invalidate_state = brw_invalidate_state;
-   brw->intel.vtbl.note_fence = brw_note_fence;
    brw->intel.vtbl.new_batch = brw_new_batch;
    brw->intel.vtbl.finish_batch = brw_finish_batch;
    brw->intel.vtbl.destroy = brw_destroy_context;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 6895f644104..9191c81755d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -30,7 +30,6 @@
   */
              
 #include "brw_context.h"
-#include "brw_util.h"
 #include "brw_wm.h"
 #include "brw_state.h"
 
@@ -199,12 +198,13 @@ static void do_wm_prog( struct brw_context *brw,
    program = brw_get_program(&c->func, &program_size);
 
    dri_bo_unreference(brw->wm.prog_bo);
-   brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
-				       &c->key, sizeof(c->key),
-				       NULL, 0,
-				       program, program_size,
-				       &c->prog_data,
-				       &brw->wm.prog_data );
+   brw->wm.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_WM_PROG,
+						   &c->key, sizeof(c->key),
+						   NULL, 0,
+						   program, program_size,
+						   &c->prog_data,
+						   sizeof(c->prog_data),
+						   &brw->wm.prog_data);
 }
 
 
@@ -336,11 +336,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
     * drawable height in order to invert the Y axis.
     */
    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
-      if (brw->intel.driDrawable != NULL) {
-         key->origin_x = brw->intel.driDrawable->x;
-         key->origin_y = brw->intel.driDrawable->y;
-         key->drawable_height = brw->intel.driDrawable->h;
-      }
+      key->drawable_height = ctx->DrawBuffer->Height;
    }
 
    key->nr_color_regions = brw->state.nr_color_regions;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index b9b987ea70a..88d84ee82fe 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -76,7 +76,6 @@ struct brw_wm_prog_key {
 
    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
 
-   GLushort origin_x, origin_y;
    GLushort drawable_height;
    GLbitfield64 vp_outputs_written;
    GLuint program_string_id:32;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index f316e0cda49..fa0898c5862 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -138,19 +138,43 @@ void emit_wpos_xy(struct brw_wm_compile *c,
     * X and Y channels.
     */
    if (mask & WRITEMASK_X) {
-      /* X' = X - origin */
-      brw_ADD(p,
-	      dst[0],
-	      retype(arg0[0], BRW_REGISTER_TYPE_W),
-	      brw_imm_d(0 - c->key.origin_x));
+      if (c->fp->program.PixelCenterInteger) {
+	 /* X' = X */
+	 brw_MOV(p,
+		 dst[0],
+		 retype(arg0[0], BRW_REGISTER_TYPE_W));
+      } else {
+	 /* X' = X + 0.5 */
+	 brw_ADD(p,
+		 dst[0],
+		 retype(arg0[0], BRW_REGISTER_TYPE_W),
+		 brw_imm_f(0.5));
+      }
    }
 
    if (mask & WRITEMASK_Y) {
-      /* Y' = height - (Y - origin_y) = height + origin_y - Y */
-      brw_ADD(p,
-	      dst[1],
-	      negate(retype(arg0[1], BRW_REGISTER_TYPE_W)),
-	      brw_imm_d(c->key.origin_y + c->key.drawable_height - 1));
+      if (c->fp->program.OriginUpperLeft) {
+	 if (c->fp->program.PixelCenterInteger) {
+	    /* Y' = Y */
+	    brw_MOV(p,
+		    dst[1],
+		    retype(arg0[1], BRW_REGISTER_TYPE_W));
+	 } else {
+	    /* Y' = Y + 0.5 */
+	    brw_ADD(p,
+		    dst[1],
+		    retype(arg0[1], BRW_REGISTER_TYPE_W),
+		    brw_imm_f(0.5));
+	 }
+      } else {
+	 float center_offset = c->fp->program.PixelCenterInteger ? 0.0 : 0.5;
+
+	 /* Y' = (height - 1) - Y + center */
+	 brw_ADD(p,
+		 dst[1],
+		 negate(retype(arg0[1], BRW_REGISTER_TYPE_W)),
+		 brw_imm_f(c->key.drawable_height - 1 + center_offset));
+      }
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
index ad267a4e6ae..87387b1e2d5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
@@ -326,8 +326,7 @@ static void upload_wm_samplers( struct brw_context *brw )
       brw->wm.sampler_bo = brw_upload_cache(&brw->cache, BRW_SAMPLER,
 					    &key, sizeof(key),
 					    brw->wm.sdc_bo, key.sampler_count,
-					    &sampler, sizeof(sampler),
-					    NULL, NULL);
+					    &sampler, sizeof(sampler));
 
       /* Emit SDC relocations */
       for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index d3373ea79e8..a7f80db554a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -210,8 +210,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
    bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT,
 			 key, sizeof(*key),
 			 reloc_bufs, 3,
-			 &wm, sizeof(wm),
-			 NULL, NULL);
+			 &wm, sizeof(wm));
 
    /* Emit WM program relocation */
    dri_bo_emit_reloc(bo,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index f26cfabb7df..1db438ae7b5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -256,8 +256,7 @@ brw_create_texture_surface( struct brw_context *brw,
    bo = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE,
 			 key, sizeof(*key),
 			 &key->bo, key->bo ? 1 : 0,
-			 &surf, sizeof(surf),
-			 NULL, NULL);
+			 &surf, sizeof(surf));
 
    if (key->bo) {
       /* Emit relocation to surface contents */
@@ -351,8 +350,7 @@ brw_create_constant_surface( struct brw_context *brw,
    bo = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE,
 			 key, sizeof(*key),
 			 &key->bo, key->bo ? 1 : 0,
-			 &surf, sizeof(surf),
-			 NULL, NULL);
+			 &surf, sizeof(surf));
 
    if (key->bo) {
       /* Emit relocation to surface contents.  Section 5.1.1 of the gen4
@@ -579,7 +577,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
       key.draw_y = 0;
    }
    /* _NEW_COLOR */
-   memcpy(key.color_mask, ctx->Color.ColorMask[0],
+   memcpy(key.color_mask, ctx->Color.ColorMask[unit],
 	  sizeof(key.color_mask));
 
    /* As mentioned above, disable writes to the alpha component when the
@@ -589,7 +587,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
      key.color_mask[3] = GL_FALSE;
 
    key.color_blend = (!ctx->Color._LogicOpEnabled &&
-		      ctx->Color.BlendEnabled);
+		      (ctx->Color.BlendEnabled & (1 << unit)));
 
    dri_bo_unreference(brw->wm.surf_bo[unit]);
    brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache,
@@ -653,8 +651,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
                                                BRW_SS_SURFACE,
                                                &key, sizeof(key),
 					       &region_bo, 1,
-					       &surf, sizeof(surf),
-					       NULL, NULL);
+					       &surf, sizeof(surf));
       if (region_bo != NULL) {
 	 /* We might sample from it, and we might render to it, so flag
 	  * them both.  We might be able to figure out from other state
@@ -701,8 +698,7 @@ brw_wm_get_binding_table(struct brw_context *brw)
       bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND,
 				  NULL, 0,
 				  brw->wm.surf_bo, brw->wm.nr_surfaces,
-				  data, data_size,
-				  NULL, NULL);
+				  data, data_size);
 
       /* Emit binding table relocations to surface state */
       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 3a4b21a844f..ae0f8a16f95 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -32,44 +32,6 @@
 #include "intel_bufmgr.h"
 #include "intel_buffers.h"
 
-/* Relocations in kernel space:
- *    - pass dma buffer seperately
- *    - memory manager knows how to patch
- *    - pass list of dependent buffers
- *    - pass relocation list
- *
- * Either:
- *    - get back an offset for buffer to fire
- *    - memory manager knows how to fire buffer
- *
- * Really want the buffer to be AGP and pinned.
- *
- */
-
-/* Cliprect fence: The highest fence protecting a dma buffer
- * containing explicit cliprect information.  Like the old drawable
- * lock but irq-driven.  X server must wait for this fence to expire
- * before changing cliprects [and then doing sw rendering?].  For
- * other dma buffers, the scheduler will grab current cliprect info
- * and mix into buffer.  X server must hold the lock while changing
- * cliprects???  Make per-drawable.  Need cliprects in shared memory
- * -- beats storing them with every cmd buffer in the queue.
- *
- * ==> X server must wait for this fence to expire before touching the
- * framebuffer with new cliprects.
- *
- * ==> Cliprect-dependent buffers associated with a
- * cliprect-timestamp.  All of the buffers associated with a timestamp
- * must go to hardware before any buffer with a newer timestamp.
- *
- * ==> Dma should be queued per-drawable for correct X/GL
- * synchronization.  Or can fences be used for this?
- *
- * Applies to: Blit operations, metaops, X server operations -- X
- * server automatically waits on its own dma to complete before
- * modifying cliprects ???
- */
-
 void
 intel_batchbuffer_reset(struct intel_batchbuffer *batch)
 {
@@ -167,7 +129,8 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
    struct intel_context *intel = batch->intel;
    GLuint used = batch->ptr - batch->map;
 
-   if (intel->first_post_swapbuffers_batch == NULL) {
+   if (!intel->using_dri2_swapbuffers &&
+       intel->first_post_swapbuffers_batch == NULL) {
       intel->first_post_swapbuffers_batch = intel->batch->buf;
       drm_intel_bo_reference(intel->first_post_swapbuffers_batch);
    }
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 55bee0084c1..31d4f3d421b 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -38,7 +38,6 @@
 #include "intel_reg.h"
 #include "intel_regions.h"
 #include "intel_batchbuffer.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLIT
 
@@ -103,7 +102,7 @@ intelEmitCopyBlit(struct intel_context *intel,
 	 return GL_FALSE;
    }
 
-   /* do space/cliprects check before going any further */
+   /* do space check before going any further */
    do {
        aper_array[0] = intel->batch->buf;
        aper_array[1] = dst_buffer;
@@ -213,10 +212,8 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
    struct intel_context *intel = intel_context(ctx);
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    GLuint clear_depth;
-   GLbitfield skipBuffers = 0;
-   unsigned int num_cliprects;
-   struct drm_clip_rect *cliprects;
-   int x_off, y_off;
+   GLboolean all;
+   GLint cx, cy, cw, ch;
    BATCH_LOCALS;
 
    /*
@@ -230,183 +227,134 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
       clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
    }
 
-   /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
-    * the loop below.
-    */
-   if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
-      skipBuffers = BUFFER_BIT_STENCIL;
-   }
-
-   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
-   if (num_cliprects) {
-      GLint cx, cy, cw, ch;
-      drm_clip_rect_t clear;
-      int i;
-
-      /* Get clear bounds after locking */
-      cx = fb->_Xmin;
+   cx = fb->_Xmin;
+   if (fb->Name == 0)
+      cy = ctx->DrawBuffer->Height - fb->_Ymax;
+   else
       cy = fb->_Ymin;
-      cw = fb->_Xmax - cx;
-      ch = fb->_Ymax - cy;
-
-      if (fb->Name == 0) {
-         /* clearing a window */
-
-         /* flip top to bottom */
-         clear.x1 = cx + x_off;
-         clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
-         clear.x2 = clear.x1 + cw;
-         clear.y2 = clear.y1 + ch;
-      }
-      else {
-         /* clearing FBO */
-         assert(num_cliprects == 1);
-         assert(cliprects == &intel->fboRect);
-         clear.x1 = cx;
-         clear.y1 = cy;
-         clear.x2 = clear.x1 + cw;
-         clear.y2 = clear.y1 + ch;
-         /* no change to mask */
+   cw = fb->_Xmax - fb->_Xmin;
+   ch = fb->_Ymax - fb->_Ymin;
+
+   if (cw == 0 || ch == 0)
+      return;
+
+   GLuint buf;
+   all = (cw == fb->Width && ch == fb->Height);
+
+   /* Loop over all renderbuffers */
+   for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
+      const GLbitfield bufBit = 1 << buf;
+      struct intel_renderbuffer *irb;
+      drm_intel_bo *write_buffer;
+      int x1, y1, x2, y2;
+      uint32_t clear_val;
+      uint32_t BR13, CMD;
+      int pitch, cpp;
+
+      if (!(mask & bufBit))
+	 continue;
+
+      /* OK, clear this renderbuffer */
+      irb = intel_get_renderbuffer(fb, buf);
+      write_buffer = intel_region_buffer(intel, irb->region,
+					 all ? INTEL_WRITE_FULL :
+					 INTEL_WRITE_PART);
+      x1 = cx + irb->region->draw_x;
+      y1 = cy + irb->region->draw_y;
+      x2 = cx + cw + irb->region->draw_x;
+      y2 = cy + ch + irb->region->draw_y;
+
+      pitch = irb->region->pitch;
+      cpp = irb->region->cpp;
+
+      DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
+	  __FUNCTION__,
+	  irb->region->buffer, (pitch * cpp),
+	  x1, y1, x2 - x1, y2 - y1);
+
+      BR13 = 0xf0 << 16;
+      CMD = XY_COLOR_BLT_CMD;
+
+      /* Setup the blit command */
+      if (cpp == 4) {
+	 BR13 |= BR13_8888;
+	 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
+	    if (mask & BUFFER_BIT_DEPTH)
+	       CMD |= XY_BLT_WRITE_RGB;
+	    if (mask & BUFFER_BIT_STENCIL)
+	       CMD |= XY_BLT_WRITE_ALPHA;
+	 } else {
+	    /* clearing RGBA */
+	    CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+	 }
+      } else {
+	 ASSERT(cpp == 2);
+	 BR13 |= BR13_565;
       }
 
-      for (i = 0; i < num_cliprects; i++) {
-         const drm_clip_rect_t *box = &cliprects[i];
-         drm_clip_rect_t b;
-         GLuint buf;
-         GLuint clearMask = mask;      /* use copy, since we modify it below */
-         GLboolean all = (cw == fb->Width && ch == fb->Height);
-
-         if (!all) {
-            intel_intersect_cliprects(&b, &clear, box);
-         }
-         else {
-            b = *box;
-         }
-
-         if (b.x1 >= b.x2 || b.y1 >= b.y2)
-            continue;
-
-         if (0)
-            _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
-                         b.x1, b.y1, b.x2, b.y2, mask);
-
-         /* Loop over all renderbuffers */
-         for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
-            const GLbitfield bufBit = 1 << buf;
-            if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
-               /* OK, clear this renderbuffer */
-	       struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, buf);
-               dri_bo *write_buffer =
-                  intel_region_buffer(intel, irb->region,
-                                      all ? INTEL_WRITE_FULL :
-                                      INTEL_WRITE_PART);
-	       int x1 = b.x1 + irb->region->draw_x;
-	       int y1 = b.y1 + irb->region->draw_y;
-	       int x2 = b.x2 + irb->region->draw_x;
-	       int y2 = b.y2 + irb->region->draw_y;
-
-               GLuint clearVal;
-               GLint pitch, cpp;
-               GLuint BR13, CMD;
-
-               pitch = irb->region->pitch;
-               cpp = irb->region->cpp;
-
-               DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
-                   __FUNCTION__,
-                   irb->region->buffer, (pitch * cpp),
-                   x1, y1, x2 - x1, y2 - y1);
-
-	       BR13 = 0xf0 << 16;
-	       CMD = XY_COLOR_BLT_CMD;
-
-               /* Setup the blit command */
-               if (cpp == 4) {
-                  BR13 |= BR13_8888;
-                  if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
-                     if (clearMask & BUFFER_BIT_DEPTH)
-                        CMD |= XY_BLT_WRITE_RGB;
-                     if (clearMask & BUFFER_BIT_STENCIL)
-                        CMD |= XY_BLT_WRITE_ALPHA;
-                  }
-                  else {
-                     /* clearing RGBA */
-                     CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
-                  }
-               }
-               else {
-                  ASSERT(cpp == 2);
-                  BR13 |= BR13_565;
-               }
-
-	       assert(irb->region->tiling != I915_TILING_Y);
+      assert(irb->region->tiling != I915_TILING_Y);
 
 #ifndef I915
-	       if (irb->region->tiling != I915_TILING_NONE) {
-		  CMD |= XY_DST_TILED;
-		  pitch /= 4;
-	       }
+      if (irb->region->tiling != I915_TILING_NONE) {
+	 CMD |= XY_DST_TILED;
+	 pitch /= 4;
+      }
 #endif
-	       BR13 |= (pitch * cpp);
-
-               if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
-                  clearVal = clear_depth;
-               }
-               else {
-		  uint8_t clear[4];
-		  GLclampf *color = ctx->Color.ClearColor;
-
-		  CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
-		  CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
-		  CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
-		  CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
-
-		  switch (irb->Base.Format) {
-		  case MESA_FORMAT_ARGB8888:
-		  case MESA_FORMAT_XRGB8888:
-		     clearVal = PACK_COLOR_8888(clear[3], clear[0],
-						clear[1], clear[2]);
-		     break;
-		  case MESA_FORMAT_RGB565:
-		     clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
-		     break;
-		  case MESA_FORMAT_ARGB4444:
-		     clearVal = PACK_COLOR_4444(clear[3], clear[0],
-						clear[1], clear[2]);
-		     break;
-		  case MESA_FORMAT_ARGB1555:
-		     clearVal = PACK_COLOR_1555(clear[3], clear[0],
-						clear[1], clear[2]);
-		     break;
-		  default:
-		     _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
-				   irb->Base.Format);
-		     clearVal = 0;
-		  }
-	       }
-
-               /*
-                  _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
-                  buf, irb->Base.Name);
-                */
-
-               assert(x1 < x2);
-               assert(y1 < y2);
-
-               BEGIN_BATCH(6);
-               OUT_BATCH(CMD);
-               OUT_BATCH(BR13);
-               OUT_BATCH((y1 << 16) | x1);
-               OUT_BATCH((y2 << 16) | x2);
-               OUT_RELOC(write_buffer,
-			 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                         0);
-               OUT_BATCH(clearVal);
-               ADVANCE_BATCH();
-               clearMask &= ~bufBit;    /* turn off bit, for faster loop exit */
-            }
-         }
+      BR13 |= (pitch * cpp);
+
+      if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
+	 clear_val = clear_depth;
+      } else {
+	 uint8_t clear[4];
+	 GLclampf *color = ctx->Color.ClearColor;
+
+	 CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
+	 CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
+	 CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
+	 CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
+
+	 switch (irb->Base.Format) {
+	 case MESA_FORMAT_ARGB8888:
+	 case MESA_FORMAT_XRGB8888:
+	    clear_val = PACK_COLOR_8888(clear[3], clear[0],
+					clear[1], clear[2]);
+	    break;
+	 case MESA_FORMAT_RGB565:
+	    clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
+	    break;
+	 case MESA_FORMAT_ARGB4444:
+	    clear_val = PACK_COLOR_4444(clear[3], clear[0],
+					clear[1], clear[2]);
+	    break;
+	 case MESA_FORMAT_ARGB1555:
+	    clear_val = PACK_COLOR_1555(clear[3], clear[0],
+					clear[1], clear[2]);
+	    break;
+	 default:
+	    _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
+			  irb->Base.Format);
+	    clear_val = 0;
+	 }
       }
+
+      assert(x1 < x2);
+      assert(y1 < y2);
+
+      BEGIN_BATCH(6);
+      OUT_BATCH(CMD);
+      OUT_BATCH(BR13);
+      OUT_BATCH((y1 << 16) | x1);
+      OUT_BATCH((y2 << 16) | x2);
+      OUT_RELOC(write_buffer,
+		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+		0);
+      OUT_BATCH(clear_val);
+      ADVANCE_BATCH();
+
+      if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
+	 mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
+      else
+	 mask &= ~bufBit;    /* turn off bit, for faster loop exit */
    }
 }
 
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 7c4b79f743a..2f03e450051 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -28,45 +28,7 @@
 #include "intel_context.h"
 #include "intel_buffers.h"
 #include "intel_fbo.h"
-#include "intel_regions.h"
-#include "intel_batchbuffer.h"
 #include "main/framebuffer.h"
-#include "drirenderbuffer.h"
-
-
-/**
- * XXX move this into a new dri/common/cliprects.c file.
- */
-GLboolean
-intel_intersect_cliprects(drm_clip_rect_t * dst,
-                          const drm_clip_rect_t * a,
-                          const drm_clip_rect_t * b)
-{
-   GLint bx = b->x1;
-   GLint by = b->y1;
-   GLint bw = b->x2 - bx;
-   GLint bh = b->y2 - by;
-
-   if (bx < a->x1)
-      bw -= a->x1 - bx, bx = a->x1;
-   if (by < a->y1)
-      bh -= a->y1 - by, by = a->y1;
-   if (bx + bw > a->x2)
-      bw = a->x2 - bx;
-   if (by + bh > a->y2)
-      bh = a->y2 - by;
-   if (bw <= 0)
-      return GL_FALSE;
-   if (bh <= 0)
-      return GL_FALSE;
-
-   dst->x1 = bx;
-   dst->y1 = by;
-   dst->x2 = bx + bw;
-   dst->y2 = by + bh;
-
-   return GL_TRUE;
-}
 
 /**
  * Return pointer to current color drawing region, or NULL.
@@ -96,24 +58,6 @@ intel_readbuf_region(struct intel_context *intel)
       return NULL;
 }
 
-void
-intel_get_cliprects(struct intel_context *intel,
-		    struct drm_clip_rect **cliprects,
-		    unsigned int *num_cliprects,
-		    int *x_off, int *y_off)
-{
-   intel->fboRect.x1 = 0;
-   intel->fboRect.y1 = 0;
-   intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
-   intel->fboRect.y2 = intel->ctx.DrawBuffer->Height;
-
-   *cliprects = &intel->fboRect;
-   *num_cliprects = 1;
-   *x_off = 0;
-   *y_off = 0;
-}
-
-
 /**
  * Check if we're about to draw into the front color buffer.
  * If so, set the intel->front_buffer_dirty field to true.
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.h b/src/mesa/drivers/dri/intel/intel_buffers.h
index d7800f2ca2f..abb86aade60 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.h
+++ b/src/mesa/drivers/dri/intel/intel_buffers.h
@@ -35,12 +35,6 @@
 struct intel_context;
 struct intel_framebuffer;
 
-
-extern GLboolean
-intel_intersect_cliprects(drm_clip_rect_t * dest,
-                          const drm_clip_rect_t * a,
-                          const drm_clip_rect_t * b);
-
 extern struct intel_region *intel_readbuf_region(struct intel_context *intel);
 
 extern struct intel_region *intel_drawbuf_region(struct intel_context *intel);
diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index 956f2339ff0..ca78681538c 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -33,12 +33,9 @@
 
 #include "intel_context.h"
 #include "intel_blit.h"
-#include "intel_chipset.h"
 #include "intel_clear.h"
 #include "intel_fbo.h"
-#include "intel_pixel.h"
 #include "intel_regions.h"
-#include "intel_batchbuffer.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLIT
 
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 3f6634c65a7..0adee6131ed 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -28,7 +28,6 @@
 
 #include "main/glheader.h"
 #include "main/context.h"
-#include "main/arrayobj.h"
 #include "main/extensions.h"
 #include "main/framebuffer.h"
 #include "main/imports.h"
@@ -52,13 +51,11 @@
 #include "intel_regions.h"
 #include "intel_buffer_objects.h"
 #include "intel_fbo.h"
-#include "intel_decode.h"
 #include "intel_bufmgr.h"
 #include "intel_screen.h"
 
 #include "drirenderbuffer.h"
 #include "utils.h"
-#include "xmlpool.h"            /* for symbolic values of enum-type options */
 
 
 #ifndef INTEL_DEBUG
@@ -522,7 +519,8 @@ intel_glFlush(GLcontext *ctx)
     * and getting our hands on that doesn't seem worth it, so we just us the
     * first batch we emitted after the last swap.
     */
-   if (intel->first_post_swapbuffers_batch != NULL) {
+   if (!intel->using_dri2_swapbuffers &&
+       intel->first_post_swapbuffers_batch != NULL) {
       drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
       intel->first_post_swapbuffers_batch = NULL;
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 07207bfbec9..36abef470a0 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -107,7 +107,6 @@ struct intel_context
       void (*finish_batch) (struct intel_context * intel);
       void (*new_batch) (struct intel_context * intel);
       void (*emit_invarient_state) (struct intel_context * intel);
-      void (*note_fence) (struct intel_context *intel, GLuint fence);
       void (*update_texture_state) (struct intel_context * intel);
 
       void (*render_start) (struct intel_context * intel);
@@ -125,40 +124,6 @@ struct intel_context
       void (*invalidate_state) (struct intel_context *intel,
 				GLuint new_state);
 
-
-      /* Metaops: 
-       */
-      void (*install_meta_state) (struct intel_context * intel);
-      void (*leave_meta_state) (struct intel_context * intel);
-
-      void (*meta_draw_region) (struct intel_context * intel,
-                                struct intel_region * draw_region,
-                                struct intel_region * depth_region);
-
-      void (*meta_color_mask) (struct intel_context * intel, GLboolean);
-
-      void (*meta_stencil_replace) (struct intel_context * intel,
-                                    GLuint mask, GLuint clear);
-
-      void (*meta_depth_replace) (struct intel_context * intel);
-
-      void (*meta_texture_blend_replace) (struct intel_context * intel);
-
-      void (*meta_no_stencil_write) (struct intel_context * intel);
-      void (*meta_no_depth_write) (struct intel_context * intel);
-      void (*meta_no_texture) (struct intel_context * intel);
-
-      void (*meta_import_pixel_state) (struct intel_context * intel);
-      void (*meta_frame_buffer_texture) (struct intel_context *intel,
-					 GLint xoff, GLint yoff);
-
-      GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
-					dri_bo * buffer,
-					GLuint offset,
-					GLuint pitch,
-					GLuint height,
-					GLenum format, GLenum type);
-
       void (*assert_not_dirty) (struct intel_context *intel);
 
       void (*debug_batch)(struct intel_context *intel);
@@ -187,6 +152,7 @@ struct intel_context
    struct intel_batchbuffer *batch;
    drm_intel_bo *first_post_swapbuffers_batch;
    GLboolean no_batch_wrap;
+   GLboolean using_dri2_swapbuffers;
 
    struct
    {
@@ -273,10 +239,6 @@ struct intel_context
 
    GLboolean use_texture_tiling;
    GLboolean use_early_z;
-   drm_clip_rect_t fboRect;     /**< cliprect for FBO rendering */
-
-   drm_clip_rect_t draw_rect;
-   drm_clip_rect_t scissor_rect;
 
    int driFd;
 
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 5ac5ce10afb..84c8d013e30 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -48,6 +48,7 @@
 #define need_GL_EXT_blend_func_separate
 #define need_GL_EXT_blend_minmax
 #define need_GL_EXT_cull_vertex
+#define need_GL_EXT_draw_buffers2
 #define need_GL_EXT_fog_coord
 #define need_GL_EXT_framebuffer_object
 #define need_GL_EXT_framebuffer_blit
@@ -154,12 +155,14 @@ static const struct dri_extension brw_extensions[] = {
    { "GL_ARB_fragment_program_shadow",    NULL },
    { "GL_ARB_fragment_shader",            NULL },
    { "GL_ARB_framebuffer_object",         GL_ARB_framebuffer_object_functions},
+   { "GL_ARB_half_float_vertex",          NULL },
    { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions },
    { "GL_ARB_point_sprite", 		  NULL },
    { "GL_ARB_seamless_cube_map",          NULL },
    { "GL_ARB_shadow",                     NULL },
    { "GL_MESA_texture_signed_rgba",       NULL },
    { "GL_ARB_texture_non_power_of_two",   NULL },
+   { "GL_EXT_draw_buffers2",              GL_EXT_draw_buffers2_functions },
    { "GL_EXT_shadow_funcs",               NULL },
    { "GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions },
    { "GL_EXT_texture_sRGB",		  NULL },
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 82e4150c6a9..cb5a341050b 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -29,7 +29,6 @@
 #include "intel_mipmap_tree.h"
 #include "intel_regions.h"
 #include "intel_tex_layout.h"
-#include "intel_chipset.h"
 #ifndef I915
 #include "brw_state.h"
 #endif
diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c
index 5142f3dcd99..cb088e40329 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel.c
@@ -29,14 +29,7 @@
 #include "main/state.h"
 #include "main/bufferobj.h"
 #include "main/context.h"
-#include "main/enable.h"
-#include "main/matrix.h"
-#include "main/texstate.h"
-#include "main/varray.h"
-#include "main/viewport.h"
 #include "swrast/swrast.h"
-#include "shader/arbprogram.h"
-#include "shader/program.h"
 
 #include "intel_context.h"
 #include "intel_pixel.h"
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 85e5ad2cdd4..1e517650b7a 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -37,7 +37,6 @@
 #include "main/polygon.h"
 #include "main/state.h"
 #include "main/teximage.h"
-#include "main/texenv.h"
 #include "main/texobj.h"
 #include "main/texstate.h"
 #include "main/texparam.h"
@@ -46,7 +45,6 @@
 #include "main/enable.h"
 #include "main/viewport.h"
 #include "shader/arbprogram.h"
-#include "glapi/dispatch.h"
 #include "swrast/swrast.h"
 
 #include "intel_screen.h"
@@ -54,7 +52,6 @@
 #include "intel_batchbuffer.h"
 #include "intel_blit.h"
 #include "intel_regions.h"
-#include "intel_buffer_objects.h"
 #include "intel_buffers.h"
 #include "intel_pixel.h"
 #include "intel_reg.h"
@@ -106,7 +103,7 @@ static void set_bit( GLubyte *dest, GLuint bit )
 }
 
 /* Extract a rectangle's worth of data from the bitmap.  Called
- * per-cliprect.
+ * per chunk of HW-sized bitmap.
  */
 static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
 			      const struct gl_pixelstore_attrib *unpack,
@@ -191,11 +188,12 @@ do_blit_bitmap( GLcontext *ctx,
    GLfloat tmpColor[4];
    GLubyte ubcolor[4];
    GLuint color;
-   unsigned int num_cliprects;
-   drm_clip_rect_t *cliprects;
-   int x_off, y_off;
    GLsizei bitmap_width = width;
    GLsizei bitmap_height = height;
+   GLint px, py;
+   GLuint stipple[32];
+   GLint orig_dstx = dstx;
+   GLint orig_dsty = dsty;
 
    /* Update draw buffer bounds */
    _mesa_update_state(ctx);
@@ -236,90 +234,60 @@ do_blit_bitmap( GLcontext *ctx,
    if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
       return GL_FALSE;
 
-   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
-   if (num_cliprects != 0) {
-      GLuint i;
-      GLint orig_dstx = dstx;
-      GLint orig_dsty = dsty;
-
-      /* Clip to buffer bounds and scissor. */
-      if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
-				fb->_Xmax, fb->_Ymax,
-				&dstx, &dsty, &width, &height))
-            goto out;
-
-      dstx = x_off + dstx;
-      dsty = y_off + y_flip(fb, dsty, height);
-
-      for (i = 0; i < num_cliprects; i++) {
-	 int box_x, box_y, box_w, box_h;
-	 GLint px, py;
-	 GLuint stipple[32];  
-
-	 box_x = dstx;
-	 box_y = dsty;
-	 box_w = width;
-	 box_h = height;
-
-	 /* Clip to drawable cliprect */
-         if (!_mesa_clip_to_region(cliprects[i].x1,
-				   cliprects[i].y1,
-				   cliprects[i].x2,
-				   cliprects[i].y2,
-				   &box_x, &box_y, &box_w, &box_h))
-	    continue;
+   /* Clip to buffer bounds and scissor. */
+   if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
+			     fb->_Xmax, fb->_Ymax,
+			     &dstx, &dsty, &width, &height))
+      goto out;
+
+   dsty = y_flip(fb, dsty, height);
 
 #define DY 32
 #define DX 32
 
-	 /* Then, finally, chop it all into chunks that can be
-	  * digested by hardware:
+   /* Chop it all into chunks that can be digested by hardware: */
+   for (py = 0; py < height; py += DY) {
+      for (px = 0; px < width; px += DX) {
+	 int h = MIN2(DY, height - py);
+	 int w = MIN2(DX, width - px);
+	 GLuint sz = ALIGN(ALIGN(w,8) * h, 64)/8;
+	 GLenum logic_op = ctx->Color.ColorLogicOpEnabled ?
+	    ctx->Color.LogicOp : GL_COPY;
+
+	 assert(sz <= sizeof(stipple));
+	 memset(stipple, 0, sz);
+
+	 /* May need to adjust this when padding has been introduced in
+	  * sz above:
+	  *
+	  * Have to translate destination coordinates back into source
+	  * coordinates.
 	  */
-	 for (py = 0; py < box_h; py += DY) { 
-	    for (px = 0; px < box_w; px += DX) { 
-	       int h = MIN2(DY, box_h - py);
-	       int w = MIN2(DX, box_w - px); 
-	       GLuint sz = ALIGN(ALIGN(w,8) * h, 64)/8;
-	       GLenum logic_op = ctx->Color.ColorLogicOpEnabled ?
-		  ctx->Color.LogicOp : GL_COPY;
-
-	       assert(sz <= sizeof(stipple));
-	       memset(stipple, 0, sz);
-
-	       /* May need to adjust this when padding has been introduced in
-		* sz above:
-		*
-		* Have to translate destination coordinates back into source
-		* coordinates.
-		*/
-	       if (get_bitmap_rect(bitmap_width, bitmap_height, unpack,
-				   bitmap,
-				   -orig_dstx + (box_x + px - x_off),
-				   -orig_dsty + y_flip(fb,
-						       box_y + py - y_off, h),
-				   w, h,
-				   (GLubyte *)stipple,
-				   8,
-				   fb->Name == 0 ? GL_TRUE : GL_FALSE) == 0)
-		  continue;
-
-	       if (!intelEmitImmediateColorExpandBlit(intel,
-						      dst->cpp,
-						      (GLubyte *)stipple,
-						      sz,
-						      color,
-						      dst->pitch,
-						      dst->buffer,
-						      0,
-						      dst->tiling,
-						      box_x + px,
-						      box_y + py,
-						      w, h,
-						      logic_op)) {
-		  return GL_FALSE;
-	       }
-	    } 
-	 } 
+	 if (get_bitmap_rect(bitmap_width, bitmap_height, unpack,
+			     bitmap,
+			     -orig_dstx + (dstx + px),
+			     -orig_dsty + y_flip(fb, dsty + py, h),
+			     w, h,
+			     (GLubyte *)stipple,
+			     8,
+			     fb->Name == 0 ? GL_TRUE : GL_FALSE) == 0)
+	    continue;
+
+	 if (!intelEmitImmediateColorExpandBlit(intel,
+						dst->cpp,
+						(GLubyte *)stipple,
+						sz,
+						color,
+						dst->pitch,
+						dst->buffer,
+						0,
+						dst->tiling,
+						dstx + px,
+						dsty + py,
+						w, h,
+						logic_op)) {
+	    return GL_FALSE;
+	 }
       }
    }
 out:
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
index e002516cdd0..87c293d8b07 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -112,9 +112,10 @@ do_blit_copypixels(GLcontext * ctx,
    struct intel_region *src = copypix_src_region(intel, type);
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    struct gl_framebuffer *read_fb = ctx->ReadBuffer;
-   unsigned int num_cliprects;
-   drm_clip_rect_t *cliprects;
-   int x_off, y_off;
+   GLint orig_dstx;
+   GLint orig_dsty;
+   GLint orig_srcx;
+   GLint orig_srcy;
 
    if (type == GL_DEPTH || type == GL_STENCIL) {
       if (INTEL_DEBUG & DEBUG_FALLBACKS)
@@ -135,94 +136,56 @@ do_blit_copypixels(GLcontext * ctx,
    if (!src || !dst)
       return GL_FALSE;
 
-
-
    intelFlush(&intel->ctx);
 
-   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
-   if (num_cliprects != 0) {
-      GLint delta_x;
-      GLint delta_y;
-      GLint orig_dstx;
-      GLint orig_dsty;
-      GLint orig_srcx;
-      GLint orig_srcy;
-      GLuint i;
-
-      /* XXX: We fail to handle different inversion between read and draw framebuffer. */
-
-      /* Clip to destination buffer. */
-      orig_dstx = dstx;
-      orig_dsty = dsty;
-      if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
-				fb->_Xmax, fb->_Ymax,
-				&dstx, &dsty, &width, &height))
-	 goto out;
-      /* Adjust src coords for our post-clipped destination origin */
-      srcx += dstx - orig_dstx;
-      srcy += dsty - orig_dsty;
-
-      /* Clip to source buffer. */
-      orig_srcx = srcx;
-      orig_srcy = srcy;
-      if (!_mesa_clip_to_region(0, 0,
-				read_fb->Width, read_fb->Height,
-				&srcx, &srcy, &width, &height))
-	 goto out;
-      /* Adjust dst coords for our post-clipped source origin */
-      dstx += srcx - orig_srcx;
-      dsty += srcy - orig_srcy;
-
-      /* Convert from GL to hardware coordinates:
-       */
-      if (fb->Name == 0) {
-	 /* copypixels to a system framebuffer */
-	 dstx = x_off + dstx;
-	 dsty = y_off + (fb->Height - dsty - height);
-      } else {
-	 /* copypixels to a user framebuffer object */
-	 dstx = x_off + dstx;
-	 dsty = y_off + dsty;
-      }
-
-      /* Flip source Y if it's a system framebuffer. */
-      if (read_fb->Name == 0) {
-	 srcx = intel->driReadDrawable->x + srcx;
-	 srcy = intel->driReadDrawable->y + (fb->Height - srcy - height);
-      }
-
-      delta_x = srcx - dstx;
-      delta_y = srcy - dsty;
-      /* Could do slightly more clipping: Eg, take the intersection of
-       * the destination cliprects and the read drawable cliprects
-       *
-       * This code will not overwrite other windows, but will
-       * introduce garbage when copying from obscured window regions.
-       */
-      for (i = 0; i < num_cliprects; i++) {
-	 GLint clip_x = dstx;
-	 GLint clip_y = dsty;
-	 GLint clip_w = width;
-	 GLint clip_h = height;
-
-         if (!_mesa_clip_to_region(cliprects[i].x1, cliprects[i].y1,
-				   cliprects[i].x2, cliprects[i].y2,
-				   &clip_x, &clip_y, &clip_w, &clip_h))
-            continue;
-
-	 if (!intel_region_copy(intel,
-				dst, 0, clip_x, clip_y,
-				src, 0, clip_x + delta_x, clip_y + delta_y,
-				clip_w, clip_h,
-				ctx->Color.ColorLogicOpEnabled ?
-				ctx->Color.LogicOp : GL_COPY)) {
-	    DBG("%s: blit failure\n", __FUNCTION__);
-	    return GL_FALSE;
-	 }
-      }
+   /* XXX: We fail to handle different inversion between read and draw framebuffer. */
+
+   /* Clip to destination buffer. */
+   orig_dstx = dstx;
+   orig_dsty = dsty;
+   if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
+			     fb->_Xmax, fb->_Ymax,
+			     &dstx, &dsty, &width, &height))
+      goto out;
+   /* Adjust src coords for our post-clipped destination origin */
+   srcx += dstx - orig_dstx;
+   srcy += dsty - orig_dsty;
+
+   /* Clip to source buffer. */
+   orig_srcx = srcx;
+   orig_srcy = srcy;
+   if (!_mesa_clip_to_region(0, 0,
+			     read_fb->Width, read_fb->Height,
+			     &srcx, &srcy, &width, &height))
+      goto out;
+   /* Adjust dst coords for our post-clipped source origin */
+   dstx += srcx - orig_srcx;
+   dsty += srcy - orig_srcy;
+
+   /* Convert from GL to hardware coordinates: */
+   if (fb->Name == 0) {
+      /* copypixels to a system framebuffer */
+      dsty = fb->Height - dsty - height;
+   } else {
+      /* copypixels to a user framebuffer object */
+      dsty = dsty;
    }
-out:
 
+   /* Flip source Y if it's a system framebuffer. */
+   if (read_fb->Name == 0)
+      srcy = fb->Height - srcy - height;
+
+   if (!intel_region_copy(intel,
+			  dst, 0, dstx, dsty,
+			  src, 0, srcx, srcy,
+			  width, height,
+			  ctx->Color.ColorLogicOpEnabled ?
+			  ctx->Color.LogicOp : GL_COPY)) {
+      DBG("%s: blit failure\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+out:
    intel_check_front_buffer_rendering(intel);
 
    DBG("%s: success\n", __FUNCTION__);
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
index b870e9315e0..10177228bd8 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
@@ -46,10 +46,6 @@
 #include "drivers/common/meta.h"
 
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
-#include "intel_buffers.h"
-#include "intel_regions.h"
 #include "intel_pixel.h"
 #include "intel_fbo.h"
 
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_read.c b/src/mesa/drivers/dri/intel/intel_pixel_read.c
index 9c0fdc6067c..a98e8e16c24 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_read.c
@@ -36,7 +36,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_blit.h"
 #include "intel_buffers.h"
 #include "intel_regions.h"
@@ -65,99 +64,6 @@
  * any case.
  */
 
-
-static GLboolean
-do_texture_readpixels(GLcontext * ctx,
-                      GLint x, GLint y, GLsizei width, GLsizei height,
-                      GLenum format, GLenum type,
-                      const struct gl_pixelstore_attrib *pack,
-                      struct intel_region *dest_region)
-{
-#if 0
-   struct intel_context *intel = intel_context(ctx);
-   intelScreenPrivate *screen = intel->intelScreen;
-   GLint pitch = pack->RowLength ? pack->RowLength : width;
-   __DRIdrawable *dPriv = intel->driDrawable;
-   int textureFormat;
-   GLenum glTextureFormat;
-   int destFormat, depthFormat, destPitch;
-   drm_clip_rect_t tmp;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-
-   if (ctx->_ImageTransferState ||
-       pack->SwapBytes || pack->LsbFirst || !pack->Invert) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-         fprintf(stderr, "%s: check_color failed\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   intel->vtbl.meta_texrect_source(intel, intel_readbuf_region(intel));
-
-   if (!intel->vtbl.meta_render_dest(intel, dest_region, type, format)) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-         fprintf(stderr, "%s: couldn't set dest %s/%s\n",
-                 __FUNCTION__,
-                 _mesa_lookup_enum_by_nr(type),
-                 _mesa_lookup_enum_by_nr(format));
-      return GL_FALSE;
-   }
-
-   if (intel->driDrawable->numClipRects) {
-      intel->vtbl.install_meta_state(intel);
-      intel->vtbl.meta_no_depth_write(intel);
-      intel->vtbl.meta_no_stencil_write(intel);
-
-      if (!driClipRectToFramebuffer(ctx->ReadBuffer, &x, &y, &width, &height)) {
-         SET_STATE(i830, state);
-         if (INTEL_DEBUG & DEBUG_PIXEL)
-            fprintf(stderr, "%s: cliprect failed\n", __FUNCTION__);
-         return GL_TRUE;
-      }
-
-      y = dPriv->h - y - height;
-      x += dPriv->x;
-      y += dPriv->y;
-
-
-      /* Set the frontbuffer up as a large rectangular texture.
-       */
-      intel->vtbl.meta_tex_rect_source(intel, src_region, textureFormat);
-
-
-      intel->vtbl.meta_texture_blend_replace(i830, glTextureFormat);
-
-
-      /* Set the 3d engine to draw into the destination region:
-       */
-
-      intel->vtbl.meta_draw_region(intel, dest_region);
-      intel->vtbl.meta_draw_format(intel, destFormat, depthFormat);     /* ?? */
-
-
-      /* Draw a single quad, no cliprects:
-       */
-      intel->vtbl.meta_disable_cliprects(intel);
-
-      intel->vtbl.draw_quad(intel,
-                            0, width, 0, height,
-                            0x00ff00ff, x, x + width, y, y + height);
-
-      intel->vtbl.leave_meta_state(intel);
-   }
-
-   intel_region_wait_fence(ctx, dest_region);   /* required by GL */
-   return GL_TRUE;
-#endif
-
-   return GL_FALSE;
-}
-
-
-
-
 static GLboolean
 do_blit_readpixels(GLcontext * ctx,
                    GLint x, GLint y, GLsizei width, GLsizei height,
@@ -169,6 +75,9 @@ do_blit_readpixels(GLcontext * ctx,
    struct intel_buffer_object *dst = intel_buffer_object(pack->BufferObj);
    GLuint dst_offset;
    GLuint rowLength;
+   drm_intel_bo *dst_buffer;
+   GLboolean all;
+   GLint dst_x, dst_y;
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
       _mesa_printf("%s\n", __FUNCTION__);
@@ -209,56 +118,42 @@ do_blit_readpixels(GLcontext * ctx,
       return GL_FALSE;
    }
    else {
-      rowLength = -rowLength;
+      if (ctx->ReadBuffer->Name == 0)
+	 rowLength = -rowLength;
    }
 
    dst_offset = (GLintptr) _mesa_image_address(2, pack, pixels, width, height,
 					       format, type, 0, 0, 0);
 
+   if (!_mesa_clip_copytexsubimage(ctx,
+				   &dst_x, &dst_y,
+				   &x, &y,
+				   &width, &height)) {
+      return GL_TRUE;
+   }
 
-   /* Although the blits go on the command buffer, need to do this and
-    * fire with lock held to guarentee cliprects are correct.
-    */
-   intelFlush(&intel->ctx);
-
-   if (intel->driReadDrawable->numClipRects) {
-      GLboolean all = (width * height * src->cpp == dst->Base.Size &&
-                       x == 0 && dst_offset == 0);
-
-      dri_bo *dst_buffer = intel_bufferobj_buffer(intel, dst,
-						  all ? INTEL_WRITE_FULL :
-						  INTEL_WRITE_PART);
-      __DRIdrawable *dPriv = intel->driReadDrawable;
-      int nbox = dPriv->numClipRects;
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      drm_clip_rect_t rect;
-      drm_clip_rect_t src_rect;
-      int i;
-
-      src_rect.x1 = dPriv->x + x;
-      src_rect.y1 = dPriv->y + dPriv->h - (y + height);
-      src_rect.x2 = src_rect.x1 + width;
-      src_rect.y2 = src_rect.y1 + height;
+   all = (width * height * src->cpp == dst->Base.Size &&
+	  x == 0 && dst_offset == 0);
 
+   dst_x = 0;
+   dst_y = 0;
 
+   dst_buffer = intel_bufferobj_buffer(intel, dst,
+					       all ? INTEL_WRITE_FULL :
+					       INTEL_WRITE_PART);
 
-      for (i = 0; i < nbox; i++) {
-         if (!intel_intersect_cliprects(&rect, &src_rect, &box[i]))
-            continue;
+   if (ctx->ReadBuffer->Name == 0)
+      y = ctx->ReadBuffer->Height - (y + height);
 
-         if (!intelEmitCopyBlit(intel,
-				src->cpp,
-				src->pitch, src->buffer, 0, src->tiling,
-				rowLength, dst_buffer, dst_offset, GL_FALSE,
-				rect.x1,
-				rect.y1,
-				rect.x1 - src_rect.x1,
-				rect.y2 - src_rect.y2,
-				rect.x2 - rect.x1, rect.y2 - rect.y1,
-				GL_COPY)) {
-	    return GL_FALSE;
-	 }
-      }
+   if (!intelEmitCopyBlit(intel,
+			  src->cpp,
+			  src->pitch, src->buffer, 0, src->tiling,
+			  rowLength, dst_buffer, dst_offset, GL_FALSE,
+			  x, y,
+			  dst_x, dst_y,
+			  width, height,
+			  GL_COPY)) {
+      return GL_FALSE;
    }
 
    if (INTEL_DEBUG & DEBUG_PIXEL)
@@ -282,15 +177,6 @@ intelReadPixels(GLcontext * ctx,
        (ctx, x, y, width, height, format, type, pack, pixels))
       return;
 
-#ifdef I915
-   if (do_texture_readpixels
-       (ctx, x, y, width, height, format, type, pack, pixels))
-      return;
-#else
-   (void)do_blit_readpixels;
-   (void)do_texture_readpixels;
-#endif
-
    if (INTEL_DEBUG & DEBUG_PIXEL)
       _mesa_printf("%s: fallback to swrast\n", __FUNCTION__);
 
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 61aefa01b8a..301c3df17cf 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -48,7 +48,6 @@
 #include "intel_buffer_objects.h"
 #include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_REGION
 
@@ -443,6 +442,7 @@ intel_region_attach_pbo(struct intel_context *intel,
    region->pbo->region = region;
    dri_bo_reference(buffer);
    region->buffer = buffer;
+   region->tiling = I915_TILING_NONE;
 }
 
 
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index e240957197d..e8cc202f889 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -37,15 +37,11 @@
 #include "intel_buffers.h"
 #include "intel_bufmgr.h"
 #include "intel_chipset.h"
-#include "intel_extensions.h"
 #include "intel_fbo.h"
-#include "intel_regions.h"
 #include "intel_screen.h"
-#include "intel_span.h"
 #include "intel_tex.h"
 
 #include "i915_drm.h"
-#include "i830_dri.h"
 
 #define DRI_CONF_TEXTURE_TILING(def) \
 	DRI_CONF_OPT_BEGIN(texture_tiling, bool, def)		\
@@ -128,8 +124,14 @@ intelDRI2Flush(__DRIdrawable *drawable)
 static void
 intelDRI2FlushInvalidate(__DRIdrawable *drawable)
 {
+   struct intel_context *intel = drawable->driContextPriv->driverPrivate;
+
+   intel->using_dri2_swapbuffers = GL_TRUE;
+
    intelDRI2Flush(drawable);
    drawable->validBuffers = GL_FALSE;
+
+   intel_update_renderbuffers(intel->driContext, drawable);
 }
 
 static const struct __DRI2flushExtensionRec intelFlushExtension = {
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 605734d8e58..d925cb9997f 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -259,36 +259,20 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
 #define DBG 0
 
 #define LOCAL_VARS							\
-   struct intel_context *intel = intel_context(ctx);			\
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);		\
    const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1;			\
    const GLint yBias = ctx->DrawBuffer->Name ? 0 : irb->Base.Height - 1;\
-   unsigned int num_cliprects;						\
-   struct drm_clip_rect *cliprects;					\
-   int x_off, y_off;							\
+   int minx = 0, miny = 0;						\
+   int maxx = ctx->DrawBuffer->Width;					\
+   int maxy = ctx->DrawBuffer->Height;					\
    int pitch = irb->region->pitch * irb->region->cpp;			\
    void *buf = irb->region->buffer->virtual;				\
    GLuint p;								\
    (void) p;								\
    (void)buf; (void)pitch; /* unused for non-gttmap. */			\
-   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
 
-/* XXX FBO: this is identical to the macro in spantmp2.h except we get
- * the cliprect info from the context, not the driDrawable.
- * Move this into spantmp2.h someday.
- */
-#define HW_CLIPLOOP()							\
-   do {									\
-      int _nc = num_cliprects;						\
-      while ( _nc-- ) {							\
-	 int minx = cliprects[_nc].x1 - x_off;				\
-	 int miny = cliprects[_nc].y1 - y_off;				\
-	 int maxx = cliprects[_nc].x2 - x_off;				\
-	 int maxy = cliprects[_nc].y2 - y_off;
-	
-#if 0
-      }}
-#endif
+#define HW_CLIPLOOP()
+#define HW_ENDCLIPLOOP()
 
 #define Y_FLIP(_y) ((_y) * yScale + yBias)
 
@@ -297,9 +281,9 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
 #define HW_UNLOCK()
 
 /* Convenience macros to avoid typing the swizzle argument over and over */
-#define NO_TILE(_X, _Y) no_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
-#define X_TILE(_X, _Y) x_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
-#define Y_TILE(_X, _Y) y_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+#define NO_TILE(_X, _Y) no_tile_swizzle(irb, (_X), (_Y))
+#define X_TILE(_X, _Y) x_tile_swizzle(irb, (_X), (_Y))
+#define Y_TILE(_X, _Y) y_tile_swizzle(irb, (_X), (_Y))
 
 /* r5g6b5 color span and pixel functions */
 #define INTEL_PIXEL_FMT GL_RGB
@@ -342,18 +326,15 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
 #include "intel_spantmp.h"
 
 #define LOCAL_DEPTH_VARS						\
-   struct intel_context *intel = intel_context(ctx);			\
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);		\
    const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1;			\
    const GLint yBias = ctx->DrawBuffer->Name ? 0 : irb->Base.Height - 1;\
-   unsigned int num_cliprects;						\
-   struct drm_clip_rect *cliprects;					\
-   int x_off, y_off;							\
+   int minx = 0, miny = 0;						\
+   int maxx = ctx->DrawBuffer->Width;					\
+   int maxy = ctx->DrawBuffer->Height;					\
    int pitch = irb->region->pitch * irb->region->cpp;			\
    void *buf = irb->region->buffer->virtual;				\
    (void)buf; (void)pitch; /* unused for non-gttmap. */			\
-   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
-
 
 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
 
diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c
index aefae53eb20..c5ef909dbf1 100644
--- a/src/mesa/drivers/dri/intel/intel_state.c
+++ b/src/mesa/drivers/dri/intel/intel_state.c
@@ -35,8 +35,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_regions.h"
-#include "swrast/swrast.h"
 
 int
 intel_translate_shadow_compare_func(GLenum func)
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index d8e71093c47..d67451cf8ec 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -36,7 +36,6 @@
 
 #include "intel_screen.h"
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_buffers.h"
 #include "intel_mipmap_tree.h"
 #include "intel_regions.h"
@@ -114,8 +113,6 @@ do_copy_texsubimage(struct intel_context *intel,
       drm_intel_bo *dst_bo = intel_region_buffer(intel,
 						 intelImage->mt->region,
 						 INTEL_WRITE_PART);
-      const GLint orig_x = x;
-      const GLint orig_y = y;
       GLuint image_x, image_y;
       GLshort src_pitch;
 
@@ -125,9 +122,6 @@ do_copy_texsubimage(struct intel_context *intel,
 				     intelImage->face,
 				     0,
 				     &image_x, &image_y);
-      /* Update dst for clipped src.  Need to also clip the source rect. */
-      dstx += x - orig_x;
-      dsty += y - orig_y;
 
       /* Can't blit to tiled buffers with non-tile-aligned offset. */
       if (intelImage->mt->region->tiling == I915_TILING_Y) {
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index a7c6c45ffe4..7be5231eaef 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -1,6 +1,5 @@
 #include "intel_context.h"
 #include "intel_tex.h"
-#include "intel_chipset.h"
 #include "main/enums.h"
 
 
diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c
index 6f41eafd0ef..a56e085b90f 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_image.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_image.c
@@ -7,7 +7,6 @@
 #include "main/convolve.h"
 #include "main/context.h"
 #include "main/formats.h"
-#include "main/image.h"
 #include "main/texcompress.h"
 #include "main/texstore.h"
 #include "main/texgetimage.h"
@@ -241,7 +240,8 @@ try_pbo_upload(struct intel_context *intel,
       if (!intelEmitCopyBlit(intel,
 			     intelImage->mt->cpp,
 			     src_stride, src_buffer, src_offset, GL_FALSE,
-			     dst_stride, dst_buffer, 0, GL_FALSE,
+			     dst_stride, dst_buffer, 0,
+			     intelImage->mt->region->tiling,
 			     0, 0, dst_x, dst_y, width, height,
 			     GL_COPY)) {
 	 return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index c9a24ac3983..ed5c5d896b9 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -2,10 +2,8 @@
 #include "main/macros.h"
 
 #include "intel_context.h"
-#include "intel_batchbuffer.h"
 #include "intel_mipmap_tree.h"
 #include "intel_tex.h"
-#include "intel_chipset.h"
 
 #define FILE_DEBUG_FLAG DEBUG_TEXTURE
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_context.c b/src/mesa/drivers/dri/mach64/mach64_context.c
index 3b4ef7ffd82..11bce31b12c 100644
--- a/src/mesa/drivers/dri/mach64/mach64_context.c
+++ b/src/mesa/drivers/dri/mach64/mach64_context.c
@@ -33,8 +33,6 @@
 #include "main/context.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
-#include "main/matrix.h"
-#include "main/extensions.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_dd.c b/src/mesa/drivers/dri/mach64/mach64_dd.c
index e400e9a918d..ca713e2de5e 100644
--- a/src/mesa/drivers/dri/mach64/mach64_dd.c
+++ b/src/mesa/drivers/dri/mach64/mach64_dd.c
@@ -31,12 +31,9 @@
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
-#include "mach64_state.h"
-#include "mach64_vb.h"
 #include "mach64_dd.h"
 
 #include "main/context.h"
-#include "main/framebuffer.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_lock.c b/src/mesa/drivers/dri/mach64/mach64_lock.c
index 8653c77da57..1a95a8f619d 100644
--- a/src/mesa/drivers/dri/mach64/mach64_lock.c
+++ b/src/mesa/drivers/dri/mach64/mach64_lock.c
@@ -32,7 +32,6 @@
 #include "mach64_context.h"
 #include "mach64_state.h"
 #include "mach64_lock.h"
-#include "mach64_tex.h"
 #include "drirenderbuffer.h"
 
 #if DEBUG_LOCKING
diff --git a/src/mesa/drivers/dri/mach64/mach64_screen.c b/src/mesa/drivers/dri/mach64/mach64_screen.c
index 1ed3b0b70ef..5cbfb85627a 100644
--- a/src/mesa/drivers/dri/mach64/mach64_screen.c
+++ b/src/mesa/drivers/dri/mach64/mach64_screen.c
@@ -31,8 +31,6 @@
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
-#include "mach64_tris.h"
-#include "mach64_vb.h"
 #include "mach64_span.h"
 
 #include "main/context.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_span.c b/src/mesa/drivers/dri/mach64/mach64_span.c
index b4ba2a41c98..0c52c0c88cb 100644
--- a/src/mesa/drivers/dri/mach64/mach64_span.c
+++ b/src/mesa/drivers/dri/mach64/mach64_span.c
@@ -31,7 +31,6 @@
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
-#include "mach64_state.h"
 #include "mach64_span.h"
 
 #include "swrast/swrast.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_state.c b/src/mesa/drivers/dri/mach64/mach64_state.c
index df7cbc8670e..b9093b5a139 100644
--- a/src/mesa/drivers/dri/mach64/mach64_state.c
+++ b/src/mesa/drivers/dri/mach64/mach64_state.c
@@ -36,7 +36,6 @@
 #include "mach64_vb.h"
 #include "mach64_tex.h"
 
-#include "main/context.h"
 #include "main/enums.h"
 #include "main/colormac.h"
 #include "swrast/swrast.h"
@@ -44,8 +43,6 @@
 #include "tnl/tnl.h"
 #include "swrast_setup/swrast_setup.h"
 
-#include "tnl/t_pipeline.h"
-
 
 /* =============================================================
  * Alpha blending
diff --git a/src/mesa/drivers/dri/mach64/mach64_tex.c b/src/mesa/drivers/dri/mach64/mach64_tex.c
index 6627d3c38a0..1bce967d58f 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tex.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tex.c
@@ -31,13 +31,8 @@
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
-#include "mach64_state.h"
-#include "mach64_vb.h"
-#include "mach64_tris.h"
 #include "mach64_tex.h"
 
-#include "main/context.h"
-#include "main/macros.h"
 #include "main/simple_list.h"
 #include "main/enums.h"
 #include "main/texstore.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_texmem.c b/src/mesa/drivers/dri/mach64/mach64_texmem.c
index b97e9eec25b..46cee4320d0 100644
--- a/src/mesa/drivers/dri/mach64/mach64_texmem.c
+++ b/src/mesa/drivers/dri/mach64/mach64_texmem.c
@@ -37,10 +37,7 @@
 #include "main/imports.h"
 
 #include "mach64_context.h"
-#include "mach64_state.h"
 #include "mach64_ioctl.h"
-#include "mach64_vb.h"
-#include "mach64_tris.h"
 #include "mach64_tex.h"
 
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_texstate.c b/src/mesa/drivers/dri/mach64/mach64_texstate.c
index df0a09a5c12..adf774ec194 100644
--- a/src/mesa/drivers/dri/mach64/mach64_texstate.c
+++ b/src/mesa/drivers/dri/mach64/mach64_texstate.c
@@ -36,8 +36,6 @@
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
-#include "mach64_state.h"
-#include "mach64_vb.h"
 #include "mach64_tris.h"
 #include "mach64_tex.h"
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_vb.c b/src/mesa/drivers/dri/mach64/mach64_vb.c
index e58812e9028..00da8353769 100644
--- a/src/mesa/drivers/dri/mach64/mach64_vb.c
+++ b/src/mesa/drivers/dri/mach64/mach64_vb.c
@@ -42,7 +42,6 @@
 #include "mach64_vb.h"
 #include "mach64_ioctl.h"
 #include "mach64_tris.h"
-#include "mach64_state.h"
 
 
 #define MACH64_TEX1_BIT       0x1
diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c
index f835cb8bd6b..e7813b63725 100644
--- a/src/mesa/drivers/dri/mga/mga_xmesa.c
+++ b/src/mesa/drivers/dri/mga/mga_xmesa.c
@@ -35,7 +35,6 @@
 #include "mga_drm.h"
 #include "mga_xmesa.h"
 #include "main/context.h"
-#include "main/matrix.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
 #include "main/framebuffer.h"
@@ -64,7 +63,6 @@
 #include "utils.h"
 #include "vblank.h"
 
-#include "main/extensions.h"
 #include "drirenderbuffer.h"
 
 #include "GL/internal/dri_interface.h"
diff --git a/src/mesa/drivers/dri/mga/mgadd.c b/src/mesa/drivers/dri/mga/mgadd.c
index 3b1ea22b609..2f23c0e5142 100644
--- a/src/mesa/drivers/dri/mga/mgadd.c
+++ b/src/mesa/drivers/dri/mga/mgadd.c
@@ -32,11 +32,6 @@
 
 #include "mgacontext.h"
 #include "mgadd.h"
-#include "mgastate.h"
-#include "mgaspan.h"
-#include "mgatex.h"
-#include "mgatris.h"
-#include "mgavb.h"
 #include "mga_xmesa.h"
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/mga/mgaioctl.c b/src/mesa/drivers/dri/mga/mgaioctl.c
index 8ce5d802ab8..259358eaa3f 100644
--- a/src/mesa/drivers/dri/mga/mgaioctl.c
+++ b/src/mesa/drivers/dri/mga/mgaioctl.c
@@ -42,10 +42,7 @@
 #include "mgacontext.h"
 #include "mgadd.h"
 #include "mgastate.h"
-#include "mgatex.h"
-#include "mgavb.h"
 #include "mgaioctl.h"
-#include "mgatris.h"
 
 #include "vblank.h"
 
diff --git a/src/mesa/drivers/dri/mga/mgarender.c b/src/mesa/drivers/dri/mga/mgarender.c
index 517c3b8f82c..8b8fc485d31 100644
--- a/src/mesa/drivers/dri/mga/mgarender.c
+++ b/src/mesa/drivers/dri/mga/mgarender.c
@@ -48,7 +48,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "mgacontext.h"
 #include "mgatris.h"
-#include "mgastate.h"
 #include "mgaioctl.h"
 #include "mgavb.h"
 
diff --git a/src/mesa/drivers/dri/mga/mgatex.c b/src/mesa/drivers/dri/mga/mgatex.c
index 62a9317cd48..ca3dd4b0139 100644
--- a/src/mesa/drivers/dri/mga/mgatex.c
+++ b/src/mesa/drivers/dri/mga/mgatex.c
@@ -40,11 +40,8 @@
 #include "mgacontext.h"
 #include "mgatex.h"
 #include "mgaregs.h"
-#include "mgatris.h"
 #include "mgaioctl.h"
 
-#include "swrast/swrast.h"
-
 #include "xmlpool.h"
 
 /**
diff --git a/src/mesa/drivers/dri/mga/mgatris.c b/src/mesa/drivers/dri/mga/mgatris.c
index c1bcd4b8531..4c58c3bdb04 100644
--- a/src/mesa/drivers/dri/mga/mgatris.c
+++ b/src/mesa/drivers/dri/mga/mgatris.c
@@ -38,7 +38,6 @@
 #include "mgaioctl.h"
 #include "mgatris.h"
 #include "mgavb.h"
-#include "mgastate.h"
 
 
 static void mgaRenderPrimitive( GLcontext *ctx, GLenum prim );
diff --git a/src/mesa/drivers/dri/mga/mgavb.c b/src/mesa/drivers/dri/mga/mgavb.c
index 1c635b23a65..def5109863c 100644
--- a/src/mesa/drivers/dri/mga/mgavb.c
+++ b/src/mesa/drivers/dri/mga/mgavb.c
@@ -39,7 +39,6 @@
 #include "main/colormac.h"
 
 #include "tnl/t_context.h"
-#include "swrast_setup/swrast_setup.h"
 #include "swrast/swrast.h"
 
 
diff --git a/src/mesa/drivers/dri/r128/r128_context.c b/src/mesa/drivers/dri/r128/r128_context.c
index e389e1c87b0..67e92405057 100644
--- a/src/mesa/drivers/dri/r128/r128_context.c
+++ b/src/mesa/drivers/dri/r128/r128_context.c
@@ -36,7 +36,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/context.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
-#include "main/matrix.h"
 #include "main/extensions.h"
 
 #include "swrast/swrast.h"
diff --git a/src/mesa/drivers/dri/r128/r128_dd.c b/src/mesa/drivers/dri/r128/r128_dd.c
index dfe47f2dd64..64dec70cdd5 100644
--- a/src/mesa/drivers/dri/r128/r128_dd.c
+++ b/src/mesa/drivers/dri/r128/r128_dd.c
@@ -34,12 +34,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "r128_context.h"
 #include "r128_ioctl.h"
-#include "r128_state.h"
 #include "r128_dd.h"
-#include "swrast/swrast.h"
 
 #include "main/context.h"
-#include "main/framebuffer.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/r128/r128_lock.c b/src/mesa/drivers/dri/r128/r128_lock.c
index 9bc3515b5aa..c1fa068d1fd 100644
--- a/src/mesa/drivers/dri/r128/r128_lock.c
+++ b/src/mesa/drivers/dri/r128/r128_lock.c
@@ -33,8 +33,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "r128_context.h"
 #include "r128_lock.h"
-#include "r128_tex.h"
-#include "r128_state.h"
 
 #include "drirenderbuffer.h"
 
diff --git a/src/mesa/drivers/dri/r128/r128_screen.c b/src/mesa/drivers/dri/r128/r128_screen.c
index 80b265811ec..ef6b5a35c4a 100644
--- a/src/mesa/drivers/dri/r128/r128_screen.c
+++ b/src/mesa/drivers/dri/r128/r128_screen.c
@@ -37,7 +37,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_context.h"
 #include "r128_ioctl.h"
 #include "r128_span.h"
-#include "r128_tris.h"
 
 #include "main/context.h"
 #include "main/imports.h"
diff --git a/src/mesa/drivers/dri/r128/r128_span.c b/src/mesa/drivers/dri/r128/r128_span.c
index 0413e5b4f12..2fbe93c5905 100644
--- a/src/mesa/drivers/dri/r128/r128_span.c
+++ b/src/mesa/drivers/dri/r128/r128_span.c
@@ -35,9 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "r128_context.h"
 #include "r128_ioctl.h"
-#include "r128_state.h"
 #include "r128_span.h"
-#include "r128_tex.h"
 
 #include "swrast/swrast.h"
 
diff --git a/src/mesa/drivers/dri/r128/r128_state.c b/src/mesa/drivers/dri/r128/r128_state.c
index 2254a7a4ffc..42f6dd73888 100644
--- a/src/mesa/drivers/dri/r128/r128_state.c
+++ b/src/mesa/drivers/dri/r128/r128_state.c
@@ -47,8 +47,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/tnl.h"
 #include "swrast_setup/swrast_setup.h"
 
-#include "tnl/t_pipeline.h"
-
 #include "drirenderbuffer.h"
 
 
diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c
index f1be7cc1c4f..24fbf8f5194 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.c
+++ b/src/mesa/drivers/dri/r128/r128_tex.c
@@ -33,21 +33,16 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include "r128_context.h"
-#include "r128_state.h"
 #include "r128_ioctl.h"
-#include "r128_tris.h"
 #include "r128_tex.h"
 #include "r128_texobj.h"
 
-#include "main/context.h"
-#include "main/macros.h"
 #include "main/simple_list.h"
 #include "main/enums.h"
 #include "main/texstore.h"
 #include "main/teximage.h"
 #include "main/texobj.h"
 #include "main/imports.h"
-#include "main/colormac.h"
 #include "main/texobj.h"
 
 #include "xmlpool.h"
diff --git a/src/mesa/drivers/dri/r128/r128_texmem.c b/src/mesa/drivers/dri/r128/r128_texmem.c
index 4ddcb86bcdc..5eec8c08cd6 100644
--- a/src/mesa/drivers/dri/r128/r128_texmem.c
+++ b/src/mesa/drivers/dri/r128/r128_texmem.c
@@ -33,12 +33,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include "r128_context.h"
-#include "r128_state.h"
 #include "r128_ioctl.h"
-#include "r128_tris.h"
 #include "r128_tex.h"
 
-#include "main/context.h"
 #include "main/macros.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
diff --git a/src/mesa/drivers/dri/r128/r128_texstate.c b/src/mesa/drivers/dri/r128/r128_texstate.c
index cb2b5f95360..2505b5cd655 100644
--- a/src/mesa/drivers/dri/r128/r128_texstate.c
+++ b/src/mesa/drivers/dri/r128/r128_texstate.c
@@ -38,7 +38,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/macros.h"
 
 #include "r128_context.h"
-#include "r128_state.h"
 #include "r128_ioctl.h"
 #include "r128_tris.h"
 #include "r128_tex.h"
diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index 8212dc12031..14eb96c1bab 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -9,10 +9,6 @@ LIBNAME = r200_dri.so
 
 MINIGLX_SOURCES = server/radeon_dri.c 
 
-ifeq ($(USING_EGL), 1)
-EGL_SOURCES = server/radeon_egl.c
-endif
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
@@ -29,8 +25,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_mipmap_tree.c \
 	radeon_queryobj.c \
 	radeon_span.c \
-	radeon_texture.c
-
+	radeon_texture.c \
+	radeon_tex_copy.c
 
 DRIVER_SOURCES = r200_context.c \
 		 r200_ioctl.c \
@@ -46,6 +42,7 @@ DRIVER_SOURCES = r200_context.c \
 		 r200_sanity.c \
 		 r200_fragshader.c \
 		 r200_vertprog.c \
+		 r200_blit.c \
 		 radeon_screen.c \
 		 $(EGL_SOURCES) \
 		 $(RADEON_COMMON_SOURCES) \
@@ -55,7 +52,7 @@ C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES)
 
 X86_SOURCES = 
 
-DRIVER_DEFINES = -DRADEON_R200 -Wall
+DRIVER_DEFINES = -DRADEON_R200
 
 DRI_LIB_DEPS += $(RADEON_LDFLAGS)
 
diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
new file mode 100644
index 00000000000..e446d532cf7
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -0,0 +1,407 @@
+/*
+ * Copyright (C) 2009 Maciej Cencora <[email protected]>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "radeon_common.h"
+#include "r200_context.h"
+#include "r200_blit.h"
+
+static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
+                                  int reg, int count)
+{
+    if (count)
+	    return CP_PACKET0(reg, count - 1);
+    return CP_PACKET2;
+}
+
+/* common formats supported as both textures and render targets */
+static unsigned is_blit_supported(gl_format mesa_format)
+{
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+    case MESA_FORMAT_XRGB8888:
+    case MESA_FORMAT_RGB565:
+    case MESA_FORMAT_ARGB4444:
+    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_A8:
+	    break;
+    default:
+	    return 0;
+    }
+
+    /* ??? */
+    if (_mesa_get_format_bits(mesa_format, GL_DEPTH_BITS) > 0)
+	    return 0;
+
+    return 1;
+}
+
+static inline void emit_vtx_state(struct r200_context *r200)
+{
+    BATCH_LOCALS(&r200->radeon);
+
+    BEGIN_BATCH(14);
+    if (r200->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
+	    OUT_BATCH_REGVAL(R200_SE_VAP_CNTL_STATUS, 0);
+    } else {
+	    OUT_BATCH_REGVAL(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS);
+    }
+    OUT_BATCH_REGVAL(R200_SE_VAP_CNTL, (R200_VAP_FORCE_W_TO_ONE |
+					(9 << R200_VAP_VF_MAX_VTX_NUM__SHIFT)));
+    OUT_BATCH_REGVAL(R200_SE_VTX_STATE_CNTL, 0);
+    OUT_BATCH_REGVAL(R200_SE_VTE_CNTL, 0);
+    OUT_BATCH_REGVAL(R200_SE_VTX_FMT_0, R200_VTX_XY);
+    OUT_BATCH_REGVAL(R200_SE_VTX_FMT_1, (2 << R200_VTX_TEX0_COMP_CNT_SHIFT));
+    OUT_BATCH_REGVAL(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD |
+				      RADEON_BFACE_SOLID |
+				      RADEON_FFACE_SOLID |
+				      RADEON_VTX_PIX_CENTER_OGL |
+				      RADEON_ROUND_MODE_ROUND |
+				      RADEON_ROUND_PREC_4TH_PIX));
+    END_BATCH();
+}
+
+static void inline emit_tx_setup(struct r200_context *r200,
+				 gl_format mesa_format,
+				 struct radeon_bo *bo,
+				 intptr_t offset,
+				 unsigned width,
+				 unsigned height,
+				 unsigned pitch)
+{
+    uint32_t txformat = R200_TXFORMAT_NON_POWER2;
+    BATCH_LOCALS(&r200->radeon);
+
+    assert(width <= 2047);
+    assert(height <= 2047);
+    assert(offset % 32 == 0);
+
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+	    txformat |= R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_XRGB8888:
+	    txformat |= R200_TXFORMAT_ARGB8888;
+	    break;
+    case MESA_FORMAT_RGB565:
+	    txformat |= R200_TXFORMAT_RGB565;
+	    break;
+    case MESA_FORMAT_ARGB4444:
+	    txformat |= R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_ARGB1555:
+	    txformat |= R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_A8:
+	    txformat |= R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    default:
+	    break;
+    }
+
+    BEGIN_BATCH(28);
+    OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
+    OUT_BATCH_REGVAL(R200_PP_CNTL_X, 0);
+    OUT_BATCH_REGVAL(R200_PP_TXMULTI_CTL_0, 0);
+    OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO |
+					  R200_TXC_ARG_B_ZERO |
+					  R200_TXC_ARG_C_R0_COLOR |
+					  R200_TXC_OP_MADD));
+    OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0);
+    OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
+					  R200_TXA_ARG_B_ZERO |
+					  R200_TXA_ARG_C_R0_ALPHA |
+					  R200_TXA_OP_MADD));
+    OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0);
+    OUT_BATCH_REGVAL(R200_PP_TXFILTER_0, (R200_CLAMP_S_CLAMP_LAST |
+					  R200_CLAMP_T_CLAMP_LAST |
+					  R200_MAG_FILTER_NEAREST |
+					  R200_MIN_FILTER_NEAREST));
+    OUT_BATCH_REGVAL(R200_PP_TXFORMAT_0, txformat);
+    OUT_BATCH_REGVAL(R200_PP_TXFORMAT_X_0, 0);
+    OUT_BATCH_REGVAL(R200_PP_TXSIZE_0, ((width - 1) |
+					((height - 1) << RADEON_TEX_VSIZE_SHIFT)));
+    OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32);
+
+    OUT_BATCH_REGSEQ(R200_PP_TXOFFSET_0, 1);
+    OUT_BATCH_RELOC(0, bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
+
+    END_BATCH();
+}
+
+static inline void emit_cb_setup(struct r200_context *r200,
+				 struct radeon_bo *bo,
+				 intptr_t offset,
+				 gl_format mesa_format,
+				 unsigned pitch,
+				 unsigned width,
+				 unsigned height)
+{
+    uint32_t dst_pitch = pitch;
+    uint32_t dst_format = 0;
+    BATCH_LOCALS(&r200->radeon);
+
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+    case MESA_FORMAT_XRGB8888:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB8888;
+	    break;
+    case MESA_FORMAT_RGB565:
+	    dst_format = RADEON_COLOR_FORMAT_RGB565;
+	    break;
+    case MESA_FORMAT_ARGB4444:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB4444;
+	    break;
+    case MESA_FORMAT_ARGB1555:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB1555;
+	    break;
+    case MESA_FORMAT_A8:
+	    dst_format = RADEON_COLOR_FORMAT_RGB8;
+	    break;
+    default:
+	    break;
+    }
+
+    BEGIN_BATCH_NO_AUTOSTATE(22);
+    OUT_BATCH_REGVAL(R200_RE_AUX_SCISSOR_CNTL, 0);
+    OUT_BATCH_REGVAL(R200_RE_CNTL, 0);
+    OUT_BATCH_REGVAL(RADEON_RE_TOP_LEFT, 0);
+    OUT_BATCH_REGVAL(RADEON_RE_WIDTH_HEIGHT, ((width << RADEON_RE_WIDTH_SHIFT) |
+					      (height << RADEON_RE_HEIGHT_SHIFT)));
+    OUT_BATCH_REGVAL(RADEON_RB3D_PLANEMASK, 0xffffffff);
+    OUT_BATCH_REGVAL(RADEON_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
+    OUT_BATCH_REGVAL(RADEON_RB3D_CNTL, dst_format);
+
+    OUT_BATCH_REGSEQ(RADEON_RB3D_COLOROFFSET, 1);
+    OUT_BATCH_RELOC(0, bo, 0, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0);
+    OUT_BATCH_REGSEQ(RADEON_RB3D_COLORPITCH, 1);
+    OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0);
+
+    END_BATCH();
+}
+
+static GLboolean validate_buffers(struct r200_context *r200,
+                                  struct radeon_bo *src_bo,
+                                  struct radeon_bo *dst_bo)
+{
+    int ret;
+    radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs,
+                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+
+    radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs,
+                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+
+    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
+                                        first_elem(&r200->radeon.dma.reserved)->bo,
+                                        RADEON_GEM_DOMAIN_GTT, 0);
+    if (ret)
+        return GL_FALSE;
+
+    return GL_TRUE;
+}
+
+/**
+ * Calculate texcoords for given image region.
+ * Output values are [minx, maxx, miny, maxy]
+ */
+static inline void calc_tex_coords(float img_width, float img_height,
+				   float x, float y,
+				   float reg_width, float reg_height,
+				   unsigned flip_y, float *buf)
+{
+    buf[0] = x / img_width;
+    buf[1] = buf[0] + reg_width / img_width;
+    buf[2] = y / img_height;
+    buf[3] = buf[2] + reg_height / img_height;
+    if (flip_y)
+    {
+        buf[2] = 1.0 - buf[2];
+        buf[3] = 1.0 - buf[3];
+    }
+}
+
+static inline void emit_draw_packet(struct r200_context *r200,
+				    unsigned src_width, unsigned src_height,
+				    unsigned src_x_offset, unsigned src_y_offset,
+				    unsigned dst_x_offset, unsigned dst_y_offset,
+				    unsigned reg_width, unsigned reg_height,
+				    unsigned flip_y)
+{
+    float texcoords[4];
+    float verts[12];
+    BATCH_LOCALS(&r200->radeon);
+
+    calc_tex_coords(src_width, src_height,
+                    src_x_offset, src_y_offset,
+                    reg_width, reg_height,
+                    flip_y, texcoords);
+
+    verts[0] = dst_x_offset;
+    verts[1] = dst_y_offset + reg_height;
+    verts[2] = texcoords[0];
+    verts[3] = texcoords[3];
+
+    verts[4] = dst_x_offset + reg_width;
+    verts[5] = dst_y_offset + reg_height;
+    verts[6] = texcoords[1];
+    verts[7] = texcoords[3];
+
+    verts[8] = dst_x_offset + reg_width;
+    verts[9] = dst_y_offset;
+    verts[10] = texcoords[1];
+    verts[11] = texcoords[2];
+
+    BEGIN_BATCH(14);
+    OUT_BATCH(R200_CP_CMD_3D_DRAW_IMMD_2 | (12 << 16));
+    OUT_BATCH(RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+	      RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST |
+              (3 << 16));
+    OUT_BATCH_TABLE(verts, 12);
+    END_BATCH();
+}
+
+/**
+ * Copy a region of [@a width x @a height] pixels from source buffer
+ * to destination buffer.
+ * @param[in] r200 r200 context
+ * @param[in] src_bo source radeon buffer object
+ * @param[in] src_offset offset of the source image in the @a src_bo
+ * @param[in] src_mesaformat source image format
+ * @param[in] src_pitch aligned source image width
+ * @param[in] src_width source image width
+ * @param[in] src_height source image height
+ * @param[in] src_x_offset x offset in the source image
+ * @param[in] src_y_offset y offset in the source image
+ * @param[in] dst_bo destination radeon buffer object
+ * @param[in] dst_offset offset of the destination image in the @a dst_bo
+ * @param[in] dst_mesaformat destination image format
+ * @param[in] dst_pitch aligned destination image width
+ * @param[in] dst_width destination image width
+ * @param[in] dst_height destination image height
+ * @param[in] dst_x_offset x offset in the destination image
+ * @param[in] dst_y_offset y offset in the destination image
+ * @param[in] width region width
+ * @param[in] height region height
+ * @param[in] flip_y set if y coords of the source image need to be flipped
+ */
+unsigned r200_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned reg_width,
+                   unsigned reg_height,
+                   unsigned flip_y)
+{
+    struct r200_context *r200 = R200_CONTEXT(ctx);
+
+    if (!is_blit_supported(dst_mesaformat))
+        return GL_FALSE;
+
+    /* Make sure that colorbuffer has even width - hw limitation */
+    if (dst_pitch % 2 > 0)
+        ++dst_pitch;
+
+    /* Rendering to small buffer doesn't work.
+     * Looks like a hw limitation.
+     */
+    if (dst_pitch < 32)
+        return GL_FALSE;
+
+    /* Need to clamp the region size to make sure
+     * we don't read outside of the source buffer
+     * or write outside of the destination buffer.
+     */
+    if (reg_width + src_x_offset > src_width)
+        reg_width = src_width - src_x_offset;
+    if (reg_height + src_y_offset > src_height)
+        reg_height = src_height - src_y_offset;
+    if (reg_width + dst_x_offset > dst_width)
+        reg_width = dst_width - dst_x_offset;
+    if (reg_height + dst_y_offset > dst_height)
+        reg_height = dst_height - dst_y_offset;
+
+    if (src_bo == dst_bo) {
+        return GL_FALSE;
+    }
+
+    if (src_offset % 32 || dst_offset % 32) {
+        return GL_FALSE;
+    }
+
+    if (0) {
+        fprintf(stderr, "src: size [%d x %d], pitch %d, "
+                "offset [%d x %d], format %s, bo %p\n",
+                src_width, src_height, src_pitch,
+                src_x_offset, src_y_offset,
+                _mesa_get_format_name(src_mesaformat),
+                src_bo);
+        fprintf(stderr, "dst: pitch %d, offset[%d x %d], format %s, bo %p\n",
+                dst_pitch, dst_x_offset, dst_y_offset,
+                _mesa_get_format_name(dst_mesaformat), dst_bo);
+        fprintf(stderr, "region: %d x %d\n", reg_width, reg_height);
+    }
+
+    /* Flush is needed to make sure that source buffer has correct data */
+    radeonFlush(r200->radeon.glCtx);
+
+    rcommonEnsureCmdBufSpace(&r200->radeon, 78, __FUNCTION__);
+
+    if (!validate_buffers(r200, src_bo, dst_bo))
+        return GL_FALSE;
+
+    /* 14 */
+    emit_vtx_state(r200);
+    /* 28 */
+    emit_tx_setup(r200, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
+    /* 22 */
+    emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
+    /* 14 */
+    emit_draw_packet(r200, src_width, src_height,
+                     src_x_offset, src_y_offset,
+                     dst_x_offset, dst_y_offset,
+                     reg_width, reg_height,
+                     flip_y);
+
+    radeonFlush(ctx);
+
+    return GL_TRUE;
+}
diff --git a/src/mesa/drivers/dri/r200/r200_blit.h b/src/mesa/drivers/dri/r200/r200_blit.h
new file mode 100644
index 00000000000..38487266ae1
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/r200_blit.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2009 Maciej Cencora <[email protected]>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef R200_BLIT_H
+#define R200_BLIT_H
+
+void r200_blit_init(struct r200_context *r200);
+
+unsigned r200_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned width,
+                   unsigned height,
+                   unsigned flip_y);
+
+#endif // R200_BLIT_H
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index f34e319222d..453c8de2200 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -61,6 +61,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_maos.h"
 #include "r200_vertprog.h"
 #include "radeon_queryobj.h"
+#include "r200_blit.h"
 
 #include "radeon_span.h"
 
@@ -268,6 +269,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.fallback = r200Fallback;
    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
+   radeon->vtbl.blit = r200_blit;
 }
 
 
@@ -294,6 +296,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    if ( !rmesa )
       return GL_FALSE;
 
+   rmesa->radeon.radeonScreen = screen;
    r200_init_vtbl(&rmesa->radeon);
    /* init exp fog table data */
    r200InitStaticFogData();
@@ -326,7 +329,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    r200InitDriverFuncs(&functions);
    r200InitIoctlFuncs(&functions);
    r200InitStateFuncs(&functions);
-   r200InitTextureFuncs(&functions);
+   r200InitTextureFuncs(&rmesa->radeon, &functions);
    r200InitShaderFuncs(&functions);
    radeonInitQueryObjFunctions(&functions);
 
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index 17e4d8962ea..a9dce310ae1 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -645,6 +645,8 @@ extern GLboolean r200MakeCurrent( __DRIcontext *driContextPriv,
 				  __DRIdrawable *driReadPriv );
 extern GLboolean r200UnbindContext( __DRIcontext *driContextPriv );
 
+extern void r200_init_texcopy_functions(struct dd_function_table *table);
+
 /* ================================================================
  * Debugging:
  */
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 6c5a0b79eed..80b08dcc992 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -698,7 +698,8 @@ static void tex_emit_mm(GLcontext *ctx, struct radeon_state_atom *atom)
    uint32_t dwords = atom->check(ctx, atom);
    int i = atom->idx;
    radeonTexObj *t = r200->state.texture.unit[i].texobj;
-   if (!r200->state.texture.unit[i].unitneeded)
+
+   if (!r200->state.texture.unit[i].unitneeded && !(dwords <= atom->cmd_size))
         dwords -= 4;
    BEGIN_BATCH_NO_AUTOSTATE(dwords);
 
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 5b87ba6ccdf..0916df64765 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -477,7 +477,7 @@ static struct gl_texture_object *r200NewTextureObject(GLcontext * ctx,
 
 
 
-void r200InitTextureFuncs( struct dd_function_table *functions )
+void r200InitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions )
 {
    /* Note: we only plug in the functions we implement in the driver
     * since _mesa_init_driver_functions() was already called.
@@ -511,6 +511,11 @@ void r200InitTextureFuncs( struct dd_function_table *functions )
    functions->CompressedTexImage2D	= radeonCompressedTexImage2D;
    functions->CompressedTexSubImage2D	= radeonCompressedTexSubImage2D;
 
+   if (radeon->radeonScreen->kernel_mm) {
+      functions->CopyTexImage2D = radeonCopyTexImage2D;
+      functions->CopyTexSubImage2D = radeonCopyTexSubImage2D;
+   }
+
    functions->GenerateMipmap = radeonGenerateMipmap;
 
    functions->NewTextureImage = radeonNewTextureImage;
diff --git a/src/mesa/drivers/dri/r200/r200_tex.h b/src/mesa/drivers/dri/r200/r200_tex.h
index e122de6e5ed..1a1e7038df6 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.h
+++ b/src/mesa/drivers/dri/r200/r200_tex.h
@@ -48,7 +48,7 @@ extern int r200UploadTexImages( r200ContextPtr rmesa, radeonTexObjPtr t, GLuint
 
 extern void r200DestroyTexObj( r200ContextPtr rmesa, radeonTexObjPtr t );
 
-extern void r200InitTextureFuncs( struct dd_function_table *functions );
+extern void r200InitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions );
 
 extern void r200UpdateFragmentShader( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c
index 11405d7caee..4f225a233da 100644
--- a/src/mesa/drivers/dri/r200/r200_vertprog.c
+++ b/src/mesa/drivers/dri/r200/r200_vertprog.c
@@ -437,7 +437,7 @@ static GLboolean r200_translate_vertex_program(GLcontext *ctx, struct r200_verte
       (1 << VERT_RESULT_TEX2) | (1 << VERT_RESULT_TEX3) | (1 << VERT_RESULT_TEX4) |
       (1 << VERT_RESULT_TEX5) | (1 << VERT_RESULT_PSIZ))) != 0) {
       if (R200_DEBUG & RADEON_FALLBACKS) {
-	 fprintf(stderr, "can't handle vert prog outputs 0x%x\n",
+	 fprintf(stderr, "can't handle vert prog outputs 0x%llx\n",
 	    mesa_vp->Base.OutputsWritten);
       }
       return GL_FALSE;
diff --git a/src/mesa/drivers/dri/r200/radeon_tex_copy.c b/src/mesa/drivers/dri/r200/radeon_tex_copy.c
new file mode 120000
index 00000000000..dfa5ba34e65
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/radeon_tex_copy.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r200/server/radeon_egl.c b/src/mesa/drivers/dri/r200/server/radeon_egl.c
deleted file mode 120000
index d7735a76438..00000000000
--- a/src/mesa/drivers/dri/r200/server/radeon_egl.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_egl.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index be005bd1641..04459c2ddfa 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -9,10 +9,6 @@ LIBNAME = r300_dri.so
 
 MINIGLX_SOURCES = server/radeon_dri.c
 
-ifeq ($(USING_EGL), 1)
-EGL_SOURCES = server/radeon_egl.c
-endif
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
@@ -39,7 +35,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_mipmap_tree.c \
 	radeon_span.c \
 	radeon_queryobj.c \
-	radeon_texture.c
+	radeon_texture.c \
+	radeon_tex_copy.c
 
 DRIVER_SOURCES = \
 		 radeon_screen.c \
@@ -50,7 +47,6 @@ DRIVER_SOURCES = \
 		 r300_state.c \
 		 r300_render.c \
 		 r300_tex.c \
-		 r300_texcopy.c \
 		 r300_texstate.c \
 		 r300_vertprog.c \
 		 r300_fragprog_common.c \
@@ -66,7 +62,6 @@ C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES)
 
 DRIVER_DEFINES = -DRADEON_R300
 #	-DRADEON_BO_TRACK \
-	-Wall
 
 DRI_LIB_DEPS += $(RADEON_LDFLAGS)
 
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_compiler.h b/src/mesa/drivers/dri/r300/compiler/radeon_compiler.h
index 731adc1af2b..f27f858652e 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_compiler.h
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_compiler.h
@@ -23,6 +23,8 @@
 #ifndef RADEON_COMPILER_H
 #define RADEON_COMPILER_H
 
+#include "../../../../main/compiler.h"
+
 #include "memory_pool.h"
 #include "radeon_code.h"
 #include "radeon_program.h"
diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c
index 2eec27e900f..e24c7955d4b 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.c
+++ b/src/mesa/drivers/dri/r300/r300_blit.c
@@ -150,8 +150,8 @@ static void r300_emit_tx_setup(struct r300_context *r300,
                      (R300_TX_CLAMP_TO_EDGE  << R300_TX_WRAP_T_SHIFT) |
                      (R300_TX_CLAMP_TO_EDGE  << R300_TX_WRAP_R_SHIFT) |
                      R300_TX_MIN_FILTER_MIP_NONE |
-                     R300_TX_MIN_FILTER_LINEAR |
-                     R300_TX_MAG_FILTER_LINEAR |
+                     R300_TX_MIN_FILTER_NEAREST |
+                     R300_TX_MAG_FILTER_NEAREST |
                      (0 << 28));
     OUT_BATCH_REGVAL(R300_TX_FILTER1_0, 0);
     OUT_BATCH_REGVAL(R300_TX_SIZE_0,
@@ -403,9 +403,8 @@ static void calc_tex_coords(float img_width, float img_height,
     buf[3] = buf[2] + reg_height / img_height;
     if (flip_y)
     {
-        float tmp = buf[2];
-        buf[2] = 1.0 - buf[3];
-        buf[3] = 1.0 - tmp;
+        buf[2] = 1.0 - buf[2];
+        buf[3] = 1.0 - buf[3];
     }
 }
 
@@ -424,13 +423,13 @@ static void emit_draw_packet(struct r300_context *r300,
                     flip_y, texcoords);
 
     float verts[] = { dst_x_offset, dst_y_offset,
-                      texcoords[0], texcoords[3],
-                      dst_x_offset, dst_y_offset + reg_height,
                       texcoords[0], texcoords[2],
+                      dst_x_offset, dst_y_offset + reg_height,
+                      texcoords[0], texcoords[3],
                       dst_x_offset + reg_width, dst_y_offset + reg_height,
-                      texcoords[1], texcoords[2],
+                      texcoords[1], texcoords[3],
                       dst_x_offset + reg_width, dst_y_offset,
-                      texcoords[1], texcoords[3] };
+                      texcoords[1], texcoords[2] };
 
     BATCH_LOCALS(&r300->radeon);
 
@@ -495,6 +494,27 @@ static void emit_cb_setup(struct r300_context *r300,
     END_BATCH();
 }
 
+static unsigned is_blit_supported(gl_format dst_format)
+{
+    switch (dst_format) {
+        case MESA_FORMAT_RGB565:
+        case MESA_FORMAT_ARGB1555:
+        case MESA_FORMAT_RGBA8888:
+        case MESA_FORMAT_RGBA8888_REV:
+        case MESA_FORMAT_ARGB8888:
+        case MESA_FORMAT_ARGB8888_REV:
+        case MESA_FORMAT_XRGB8888:
+            break;
+        default:
+            return 0;
+    }
+
+    if (_mesa_get_format_bits(dst_format, GL_DEPTH_BITS) > 0)
+        return 0;
+
+    return 1;
+}
+
 /**
  * Copy a region of [@a width x @a height] pixels from source buffer
  * to destination buffer.
@@ -519,29 +539,31 @@ static void emit_cb_setup(struct r300_context *r300,
  * @param[in] height region height
  * @param[in] flip_y set if y coords of the source image need to be flipped
  */
-GLboolean r300_blit(struct r300_context *r300,
-                    struct radeon_bo *src_bo,
-                    intptr_t src_offset,
-                    gl_format src_mesaformat,
-                    unsigned src_pitch,
-                    unsigned src_width,
-                    unsigned src_height,
-                    unsigned src_x_offset,
-                    unsigned src_y_offset,
-                    struct radeon_bo *dst_bo,
-                    intptr_t dst_offset,
-                    gl_format dst_mesaformat,
-                    unsigned dst_pitch,
-                    unsigned dst_width,
-                    unsigned dst_height,
-                    unsigned dst_x_offset,
-                    unsigned dst_y_offset,
-                    unsigned reg_width,
-                    unsigned reg_height,
-                    unsigned flip_y)
+unsigned r300_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned reg_width,
+                   unsigned reg_height,
+                   unsigned flip_y)
 {
-    if (_mesa_get_format_bits(src_mesaformat, GL_DEPTH_BITS) > 0)
-        return GL_FALSE;
+    r300ContextPtr r300 = R300_CONTEXT(ctx);
+
+    if (!is_blit_supported(dst_mesaformat))
+        return 0;
 
     /* Make sure that colorbuffer has even width - hw limitation */
     if (dst_pitch % 2 > 0)
@@ -551,7 +573,7 @@ GLboolean r300_blit(struct r300_context *r300,
      * Looks like a hw limitation.
      */
     if (dst_pitch < 32)
-        return GL_FALSE;
+        return 0;
 
     /* Need to clamp the region size to make sure
      * we don't read outside of the source buffer
@@ -567,6 +589,10 @@ GLboolean r300_blit(struct r300_context *r300,
         reg_height = dst_height - dst_y_offset;
 
     if (src_bo == dst_bo) {
+        return 0;
+    }
+
+    if (src_offset % 32 || dst_offset % 32) {
         return GL_FALSE;
     }
 
@@ -587,7 +613,7 @@ GLboolean r300_blit(struct r300_context *r300,
     radeonFlush(r300->radeon.glCtx);
 
     if (!validate_buffers(r300, src_bo, dst_bo))
-        return GL_FALSE;
+        return 0;
 
     rcommonEnsureCmdBufSpace(&r300->radeon, 200, __FUNCTION__);
 
@@ -618,5 +644,5 @@ GLboolean r300_blit(struct r300_context *r300,
 
     radeonFlush(r300->radeon.glCtx);
 
-    return GL_TRUE;
-}
\ No newline at end of file
+    return 1;
+}
diff --git a/src/mesa/drivers/dri/r300/r300_blit.h b/src/mesa/drivers/dri/r300/r300_blit.h
index dc21e880982..735acaddd70 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.h
+++ b/src/mesa/drivers/dri/r300/r300_blit.h
@@ -30,25 +30,25 @@
 
 void r300_blit_init(struct r300_context *r300);
 
-GLboolean r300_blit(struct r300_context *r300,
-                    struct radeon_bo *src_bo,
-                    intptr_t src_offset,
-                    gl_format src_mesaformat,
-                    unsigned src_pitch,
-                    unsigned src_width,
-                    unsigned src_height,
-                    unsigned src_x_offset,
-                    unsigned src_y_offset,
-                    struct radeon_bo *dst_bo,
-                    intptr_t dst_offset,
-                    gl_format dst_mesaformat,
-                    unsigned dst_pitch,
-                    unsigned dst_width,
-                    unsigned dst_height,
-                    unsigned dst_x_offset,
-                    unsigned dst_y_offset,
-                    unsigned width,
-                    unsigned height,
-                    unsigned flip_y);
+unsigned r300_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned reg_width,
+                   unsigned reg_height,
+                   unsigned flip_y);
 
 #endif // R300_BLIT_H
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index e1c33bbb2cf..4787bafc66a 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -39,7 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/macros.h"
 #include "main/context.h"
 #include "main/simple_list.h"
-#include "swrast/swrast.h"
 
 #include "drm.h"
 #include "radeon_drm.h"
@@ -50,7 +49,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_emit.h"
 #include "radeon_bocs_wrapper.h"
 #include "radeon_mipmap_tree.h"
-#include "r300_state.h"
 #include "radeon_queryobj.h"
 
 /** # of dwords reserved for additional instructions that may need to be written
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 1f6ccf6ddca..eedb7b6ed86 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -40,9 +40,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/context.h"
 #include "main/simple_list.h"
 #include "main/imports.h"
-#include "main/matrix.h"
 #include "main/extensions.h"
-#include "main/state.h"
 #include "main/bufferobj.h"
 #include "main/texobj.h"
 
@@ -52,13 +50,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
-#include "tnl/t_vp_build.h"
 
 #include "drivers/common/driverfuncs.h"
 #include "drivers/common/meta.h"
 
 #include "r300_context.h"
-#include "radeon_context.h"
 #include "radeon_span.h"
 #include "r300_blit.h"
 #include "r300_cmdbuf.h"
@@ -70,7 +66,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_buffer_objects.h"
 #include "radeon_queryobj.h"
 
-#include "vblank.h"
 #include "utils.h"
 #include "xmlpool.h"		/* for symbolic values of enum-type options */
 
@@ -93,8 +88,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "main/remap_helper.h"
 
-void r300_init_texcopy_functions(struct dd_function_table *table);
-
 static const struct dri_extension card_extensions[] = {
   /* *INDENT-OFF* */
   {"GL_ARB_depth_texture",		NULL},
@@ -326,6 +319,8 @@ static void r300_init_vtbl(radeonContextPtr radeon)
 			radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
 	} else
 		radeon->vtbl.emit_query_finish = r300_emit_query_finish;
+
+    radeon->vtbl.blit = r300_blit;
 }
 
 static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
@@ -451,6 +446,8 @@ static void r300InitGLExtensions(GLcontext *ctx)
 	if (!r300->radeon.radeonScreen->drmSupportsOcclusionQueries) {
 		_mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 	}
+	if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV350)
+  		_mesa_enable_extension(ctx, "GL_ARB_half_float_vertex");
 }
 
 static void r300InitIoctlFuncs(struct dd_function_table *functions)
@@ -488,15 +485,11 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 	_mesa_init_driver_functions(&functions);
 	r300InitIoctlFuncs(&functions);
 	r300InitStateFuncs(&functions);
-	r300InitTextureFuncs(&functions);
+	r300InitTextureFuncs(&r300->radeon, &functions);
 	r300InitShaderFuncs(&functions);
 	radeonInitQueryObjFunctions(&functions);
 	radeonInitBufferObjectFuncs(&functions);
 
-	if (r300->radeon.radeonScreen->kernel_mm) {
-		r300_init_texcopy_functions(&functions);
-	}
-
 	if (!radeonInitContext(&r300->radeon, &functions,
 			       glVisual, driContextPriv,
 			       sharedContextPrivate)) {
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 546cd8ddde3..78ab43a99f9 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -554,8 +554,6 @@ extern void r300InitShaderFunctions(r300ContextPtr r300);
 
 extern void r300InitDraw(GLcontext *ctx);
 
-extern void r300_init_texcopy_functions(struct dd_function_table *table);
-
 #define r300PackFloat32 radeonPackFloat32
 #define r300PackFloat24 radeonPackFloat24
 
diff --git a/src/mesa/drivers/dri/r300/r300_draw.c b/src/mesa/drivers/dri/r300/r300_draw.c
index 3dcd986e226..813495a0466 100644
--- a/src/mesa/drivers/dri/r300/r300_draw.c
+++ b/src/mesa/drivers/dri/r300/r300_draw.c
@@ -29,7 +29,6 @@
 #include "main/glheader.h"
 #include "main/context.h"
 #include "main/state.h"
-#include "main/api_validate.h"
 #include "main/enums.h"
 #include "main/simple_list.h"
 
@@ -47,8 +46,6 @@
 #include "tnl/tnl.h"
 #include "tnl/t_vp_build.h"
 #include "vbo/vbo_context.h"
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
 
 
 static int getTypeSize(GLenum type)
@@ -56,6 +53,8 @@ static int getTypeSize(GLenum type)
 	switch (type) {
 		case GL_DOUBLE:
 			return sizeof(GLdouble);
+		case GL_HALF_FLOAT:
+			return sizeof(GLhalfARB);
 		case GL_FLOAT:
 			return sizeof(GLfloat);
 		case GL_INT:
@@ -385,6 +384,18 @@ static void r300TranslateAttrib(GLcontext *ctx, GLuint attr, int count, const st
 			r300_attr._signed = 0;
 			r300_attr.normalize = 0;
 			break;
+		case GL_HALF_FLOAT:
+			switch (input->Size) {
+				case 1:
+				case 2:
+					r300_attr.data_type = R300_DATA_TYPE_FLT16_2;
+					break;
+				case 3:
+				case 4:
+					r300_attr.data_type = R300_DATA_TYPE_FLT16_4;
+					break;
+			}
+			break;
 		case GL_SHORT:
 			r300_attr._signed = 1;
 			r300_attr.normalize = input->Normalized;
diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 15aeaf05148..740c9022217 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -39,19 +39,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/colormac.h"
 #include "main/imports.h"
 #include "main/macros.h"
-#include "main/image.h"
 
 #include "swrast_setup/swrast_setup.h"
-#include "math/m_translate.h"
 #include "tnl/tnl.h"
 #include "tnl/t_context.h"
 
 #include "r300_context.h"
-#include "r300_state.h"
 #include "r300_emit.h"
 #include "r300_render.h"
 #include "r300_swtcl.h"
 
+
 GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead)
 {
 	/* No idea what this value means. I have seen other values written to
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog_common.c b/src/mesa/drivers/dri/r300/r300_fragprog_common.c
index 2933d31136c..e41aeff91a4 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog_common.c
+++ b/src/mesa/drivers/dri/r300/r300_fragprog_common.c
@@ -38,14 +38,12 @@
 
 #include "r300_fragprog_common.h"
 
-#include "shader/program.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_print.h"
 
 #include "compiler/radeon_compiler.h"
 
 #include "radeon_mesa_to_rc.h"
-#include "r300_state.h"
 
 
 static GLuint build_dtm(GLuint depthmode)
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index ea684e7df18..d18ebab8ff2 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -230,6 +230,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_DATA_TYPE_SHORT_4                   7
 #       define R300_DATA_TYPE_VECTOR_3_TTT              8
 #       define R300_DATA_TYPE_VECTOR_3_EET              9
+#	define R300_DATA_TYPE_FLT16_2			11
+#	define R300_DATA_TYPE_FLT16_4			12
+
 #       define R300_SKIP_DWORDS_SHIFT                   4
 #       define R300_DST_VEC_LOC_SHIFT                   8
 #       define R300_LAST_VEC                            (1 << 13)
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 02c94250a8f..e3e62857840 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -53,7 +53,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_render.h"
 
 #include "main/glheader.h"
-#include "main/state.h"
 #include "main/imports.h"
 #include "main/enums.h"
 #include "main/macros.h"
@@ -65,14 +64,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast_setup/swrast_setup.h"
 #include "vbo/vbo.h"
 #include "vbo/vbo_split.h"
-#include "tnl/tnl.h"
-#include "tnl/t_vp_build.h"
 #include "r300_context.h"
 #include "r300_state.h"
 #include "r300_reg.h"
-#include "r300_tex.h"
 #include "r300_emit.h"
-#include "r300_fragprog_common.h"
 #include "r300_swtcl.h"
 
 /**
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index c51285aad93..017d45a5039 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -58,13 +58,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_state.h"
 #include "r300_reg.h"
 #include "r300_emit.h"
-#include "r300_tex.h"
 #include "r300_fragprog_common.h"
 #include "r300_render.h"
 #include "r300_vertprog.h"
 
-#include "drirenderbuffer.h"
-
 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
 {
 	r300ContextPtr rmesa = R300_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 963f648cb14..8dd85073954 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -41,18 +41,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/mipmap.h"
 #include "main/simple_list.h"
 #include "main/texstore.h"
-#include "main/teximage.h"
 #include "main/texobj.h"
 
 #include "texmem.h"
 
 #include "r300_context.h"
-#include "r300_state.h"
 #include "radeon_mipmap_tree.h"
 #include "r300_tex.h"
 
-#include "xmlpool.h"
-
 
 static unsigned int translate_wrap_mode(GLenum wrapmode)
 {
@@ -312,7 +308,7 @@ static struct gl_texture_object *r300NewTextureObject(GLcontext * ctx,
 	return &t->base;
 }
 
-void r300InitTextureFuncs(struct dd_function_table *functions)
+void r300InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 	/* Note: we only plug in the functions we implement in the driver
 	 * since _mesa_init_driver_functions() was already called.
@@ -340,6 +336,11 @@ void r300InitTextureFuncs(struct dd_function_table *functions)
 	functions->CompressedTexImage2D = radeonCompressedTexImage2D;
 	functions->CompressedTexSubImage2D = radeonCompressedTexSubImage2D;
 
+	if (radeon->radeonScreen->kernel_mm) {
+		functions->CopyTexImage2D = radeonCopyTexImage2D;
+		functions->CopyTexSubImage2D = radeonCopyTexSubImage2D;
+	}
+
 	functions->GenerateMipmap = radeonGenerateMipmap;
 
 	driInitTextureFormats();
diff --git a/src/mesa/drivers/dri/r300/r300_tex.h b/src/mesa/drivers/dri/r300/r300_tex.h
index 6ede0fe25c9..9694e703b83 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.h
+++ b/src/mesa/drivers/dri/r300/r300_tex.h
@@ -49,7 +49,7 @@ extern void r300SetTexOffset(__DRIcontext *pDRICtx, GLint texname,
 
 extern GLboolean r300ValidateBuffers(GLcontext * ctx);
 
-extern void r300InitTextureFuncs(struct dd_function_table *functions);
+extern void r300InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions);
 
 int32_t r300TranslateTexFormat(gl_format mesaFormat);
 
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 78ff54574f6..09e046859a4 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -45,7 +45,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/simple_list.h"
 
 #include "r300_context.h"
-#include "r300_state.h"
 #include "radeon_mipmap_tree.h"
 #include "r300_tex.h"
 #include "r300_reg.h"
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index aa98a049aa4..e6fa57d439b 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -34,7 +34,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "shader/program.h"
 #include "shader/programopt.h"
 #include "shader/prog_instruction.h"
-#include "shader/prog_optimize.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_print.h"
 #include "shader/prog_statevars.h"
diff --git a/src/mesa/drivers/dri/r300/radeon_tex_copy.c b/src/mesa/drivers/dri/r300/radeon_tex_copy.c
new file mode 120000
index 00000000000..dfa5ba34e65
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_tex_copy.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/server/radeon_egl.c b/src/mesa/drivers/dri/r300/server/radeon_egl.c
deleted file mode 120000
index d7735a76438..00000000000
--- a/src/mesa/drivers/dri/r300/server/radeon_egl.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_egl.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile
index b90efce17a1..5d509415393 100644
--- a/src/mesa/drivers/dri/r600/Makefile
+++ b/src/mesa/drivers/dri/r600/Makefile
@@ -9,10 +9,6 @@ LIBNAME = r600_dri.so
 
 MINIGLX_SOURCES = server/radeon_dri.c
 
-ifeq ($(USING_EGL), 1)
-EGL_SOURCES = server/radeon_egl.c
-endif
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
@@ -39,7 +35,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_mipmap_tree.c \
 	radeon_span.c \
 	radeon_texture.c \
-	radeon_queryobj.c
+	radeon_queryobj.c \
+	radeon_tex_copy.c
 
 DRIVER_SOURCES = \
 		 radeon_screen.c \
@@ -60,7 +57,6 @@ DRIVER_SOURCES = \
 		 r600_tex.c      \
 		 r600_texstate.c      \
 		 r600_blit.c     \
-		 r600_texcopy.c  \
 		 r700_debug.c    \
 		 $(RADEON_COMMON_SOURCES) \
 		 $(EGL_SOURCES) \
@@ -68,9 +64,8 @@ DRIVER_SOURCES = \
 
 C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES)
 
-DRIVER_DEFINES = -DRADEON_R600 \
+DRIVER_DEFINES = -DRADEON_R600
 #	-DRADEON_BO_TRACK \
-	-Wall
 
 DRI_LIB_DEPS += $(RADEON_LDFLAGS)
 
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index de3a58706e6..d7cd59ade62 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -32,18 +32,73 @@
 #include "r600_blit_shaders.h"
 #include "r600_cmdbuf.h"
 
+/* common formats supported as both textures and render targets */
+static unsigned is_blit_supported(gl_format mesa_format)
+{
+    switch (mesa_format) {
+    case MESA_FORMAT_RGBA8888:
+    case MESA_FORMAT_SIGNED_RGBA8888:
+    case MESA_FORMAT_RGBA8888_REV:
+    case MESA_FORMAT_SIGNED_RGBA8888_REV:
+    case MESA_FORMAT_ARGB8888:
+    case MESA_FORMAT_XRGB8888:
+    case MESA_FORMAT_ARGB8888_REV:
+    case MESA_FORMAT_XRGB8888_REV:
+    case MESA_FORMAT_RGB565:
+    case MESA_FORMAT_RGB565_REV:
+    case MESA_FORMAT_ARGB4444:
+    case MESA_FORMAT_ARGB4444_REV:
+    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_ARGB1555_REV:
+    case MESA_FORMAT_AL88:
+    case MESA_FORMAT_AL88_REV:
+    case MESA_FORMAT_RGB332:
+    case MESA_FORMAT_A8:
+    case MESA_FORMAT_I8:
+    case MESA_FORMAT_CI8:
+    case MESA_FORMAT_L8:
+    case MESA_FORMAT_RGBA_FLOAT32:
+    case MESA_FORMAT_RGBA_FLOAT16:
+    case MESA_FORMAT_ALPHA_FLOAT32:
+    case MESA_FORMAT_ALPHA_FLOAT16:
+    case MESA_FORMAT_LUMINANCE_FLOAT32:
+    case MESA_FORMAT_LUMINANCE_FLOAT16:
+    case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
+    case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
+    case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
+    case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
+    case MESA_FORMAT_X8_Z24:
+    case MESA_FORMAT_S8_Z24:
+    case MESA_FORMAT_Z24_S8:
+    case MESA_FORMAT_Z16:
+    case MESA_FORMAT_Z32:
+    case MESA_FORMAT_SRGBA8:
+    case MESA_FORMAT_SLA8:
+    case MESA_FORMAT_SL8:
+	    break;
+    default:
+	    return 0;
+    }
+
+    /* ??? */
+    /* not sure blit to depth works or not yet */
+    if (_mesa_get_format_bits(mesa_format, GL_DEPTH_BITS) > 0)
+	    return 0;
+
+    return 1;
+}
+
 static inline void
 set_render_target(context_t *context, struct radeon_bo *bo, gl_format mesa_format,
-                  int pitch, int w, int h, intptr_t dst_offset)
+                  int nPitchInPixel, int w, int h, intptr_t dst_offset)
 {
     uint32_t cb_color0_base, cb_color0_size = 0, cb_color0_info = 0, cb_color0_view = 0;
-    int nPitchInPixel, id = 0;
-    uint32_t comp_swap, format, bpp = _mesa_get_format_bytes(mesa_format);
+    int id = 0;
+    uint32_t comp_swap, format;
     BATCH_LOCALS(&context->radeon);
 
     cb_color0_base = dst_offset / 256;
 
-    nPitchInPixel = pitch/bpp;
     SETfield(cb_color0_size, (nPitchInPixel / 8) - 1,
              PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
     SETfield(cb_color0_size, ((nPitchInPixel * h) / 64) - 1,
@@ -310,12 +365,31 @@ set_render_target(context_t *context, struct radeon_bo *bo, gl_format mesa_forma
 	    END_BATCH();
     }
 
-    BEGIN_BATCH_NO_AUTOSTATE(18);
+    /* Set CMASK & TILE buffer to the offset of color buffer as
+     * we don't use those this shouldn't cause any issue and we
+     * then have a valid cmd stream
+     */
+    BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+    R600_OUT_BATCH_REGSEQ(CB_COLOR0_TILE + (4 * id), 1);
+    R600_OUT_BATCH(cb_color0_base);
+    R600_OUT_BATCH_RELOC(0,
+			 bo,
+			 0,
+			 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
+    END_BATCH();
+    BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+    R600_OUT_BATCH_REGSEQ(CB_COLOR0_FRAG + (4 * id), 1);
+    R600_OUT_BATCH(cb_color0_base);
+    R600_OUT_BATCH_RELOC(0,
+			 bo,
+			 0,
+			 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
+    END_BATCH();
+
+    BEGIN_BATCH_NO_AUTOSTATE(12);
     R600_OUT_BATCH_REGVAL(CB_COLOR0_SIZE + (4 * id), cb_color0_size);
     R600_OUT_BATCH_REGVAL(CB_COLOR0_VIEW + (4 * id), cb_color0_view);
     R600_OUT_BATCH_REGVAL(CB_COLOR0_INFO + (4 * id), cb_color0_info);
-    R600_OUT_BATCH_REGVAL(CB_COLOR0_TILE + (4 * id), 0);
-    R600_OUT_BATCH_REGVAL(CB_COLOR0_FRAG + (4 * id), 0);
     R600_OUT_BATCH_REGVAL(CB_COLOR0_MASK + (4 * id), 0);
     END_BATCH();
 
@@ -481,11 +555,9 @@ set_vtx_resource(context_t *context)
 static inline void
 set_tex_resource(context_t * context,
 		 gl_format mesa_format, struct radeon_bo *bo, int w, int h,
-		 int pitch, intptr_t src_offset)
+		 int TexelPitch, intptr_t src_offset)
 {
     uint32_t sq_tex_resource0, sq_tex_resource1, sq_tex_resource2, sq_tex_resource4, sq_tex_resource6;
-    int bpp = _mesa_get_format_bytes(mesa_format);
-    int TexelPitch = pitch/bpp;
 
     sq_tex_resource0 = sq_tex_resource1 = sq_tex_resource2 = sq_tex_resource4 = sq_tex_resource6 = 0;
     BATCH_LOCALS(&context->radeon);
@@ -1484,37 +1556,41 @@ static GLboolean validate_buffers(context_t *rmesa,
     return GL_TRUE;
 }
 
-GLboolean r600_blit(context_t *context,
-                    struct radeon_bo *src_bo,
-                    intptr_t src_offset,
-                    gl_format src_mesaformat,
-                    unsigned src_pitch,
-                    unsigned src_width,
-                    unsigned src_height,
-                    unsigned src_x,
-                    unsigned src_y,
-                    struct radeon_bo *dst_bo,
-                    intptr_t dst_offset,
-                    gl_format dst_mesaformat,
-                    unsigned dst_pitch,
-                    unsigned dst_width,
-                    unsigned dst_height,
-                    unsigned dst_x,
-                    unsigned dst_y,
-                    unsigned w,
-                    unsigned h,
-                    unsigned flip_y)
+unsigned r600_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x,
+                   unsigned src_y,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x,
+                   unsigned dst_y,
+                   unsigned w,
+                   unsigned h,
+                   unsigned flip_y)
 {
+    context_t *context = R700_CONTEXT(ctx);
     int id = 0;
 
-    /* not sure blit to depth works or not yet */
-    if (_mesa_get_format_bits(src_mesaformat, GL_DEPTH_BITS) > 0)
-	    return GL_FALSE;
+    if (!is_blit_supported(dst_mesaformat))
+        return GL_FALSE;
 
     if (src_bo == dst_bo) {
         return GL_FALSE;
     }
 
+    if (src_offset % 256 || dst_offset % 256) {
+        return GL_FALSE;
+    }
+
     if (0) {
         fprintf(stderr, "src: width %d, height %d, pitch %d vs %d, format %s\n",
                 src_width, src_height, src_pitch,
@@ -1527,9 +1603,9 @@ GLboolean r600_blit(context_t *context,
     }
 
     /* Flush is needed to make sure that source buffer has correct data */
-    radeonFlush(context->radeon.glCtx);
+    radeonFlush(ctx);
 
-    rcommonEnsureCmdBufSpace(&context->radeon, 302, __FUNCTION__);
+    rcommonEnsureCmdBufSpace(&context->radeon, 304, __FUNCTION__);
 
     /* load shaders */
     load_shaders(context->radeon.glCtx);
@@ -1554,7 +1630,7 @@ GLboolean r600_blit(context_t *context,
     set_tex_sampler(context);
 
     /* dst */
-    /* 25 */
+    /* 27 */
     set_render_target(context, dst_bo, dst_mesaformat,
 		      dst_pitch, dst_width, dst_height, dst_offset);
     /* scissors */
@@ -1578,7 +1654,7 @@ GLboolean r600_blit(context_t *context,
     /* 5 */
     r700WaitForIdleClean(context);
 
-    radeonFlush(context->radeon.glCtx);
+    radeonFlush(ctx);
 
     return GL_TRUE;
 }
diff --git a/src/mesa/drivers/dri/r600/r600_blit.h b/src/mesa/drivers/dri/r600/r600_blit.h
index f30c13c288d..f280e23489e 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.h
+++ b/src/mesa/drivers/dri/r600/r600_blit.h
@@ -1,21 +1,21 @@
-GLboolean r600_blit(context_t *context,
-                    struct radeon_bo *src_bo,
-                    intptr_t src_offset,
-                    gl_format src_mesaformat,
-                    unsigned src_pitch,
-                    unsigned src_width,
-                    unsigned src_height,
-                    unsigned src_x_offset,
-                    unsigned src_y_offset,
-                    struct radeon_bo *dst_bo,
-                    intptr_t dst_offset,
-                    gl_format dst_mesaformat,
-                    unsigned dst_pitch,
-                    unsigned dst_width,
-                    unsigned dst_height,
-                    unsigned dst_x_offset,
-                    unsigned dst_y_offset,
-                    unsigned w,
-                    unsigned h,
-                    unsigned flip_y);
+unsigned r600_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned w,
+                   unsigned h,
+                   unsigned flip_y);
 
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index 55680fad32d..ab3c7723c9d 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -65,6 +65,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r600_emit.h"
 #include "radeon_bocs_wrapper.h"
 #include "radeon_queryobj.h"
+#include "r600_blit.h"
 
 #include "r700_state.h"
 #include "r700_ioctl.h"
@@ -240,16 +241,16 @@ static void r600_init_vtbl(radeonContextPtr radeon)
 	radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 	radeon->vtbl.fallback = r600_fallback;
 	radeon->vtbl.emit_query_finish = r600_emit_query_finish;
+	radeon->vtbl.blit = r600_blit;
 }
 
 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
 {
-	context_t *r600 = R700_CONTEXT(ctx);
-
-	ctx->Const.MaxTextureImageUnits =
-	    driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
-	ctx->Const.MaxTextureCoordUnits =
-	    driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
+	ctx->Const.MaxTextureImageUnits = 16;
+	/* 8 per clause on r6xx, 16 on r7xx
+	 * but I think mesa only supports 8 at the moment
+	 */
+	ctx->Const.MaxTextureCoordUnits = 8;
 	ctx->Const.MaxTextureUnits =
 	    MIN2(ctx->Const.MaxTextureImageUnits,
 		 ctx->Const.MaxTextureCoordUnits);
@@ -284,9 +285,8 @@ static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
 	ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
 	ctx->Const.FragmentProgram.MaxNativeParameters = 256;
 	ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
-	/* 8 per clause on r6xx, 16 on rv670/r7xx */
-	if ((screen->chip_family == CHIP_FAMILY_RV670) ||
-	    (screen->chip_family >= CHIP_FAMILY_RV770))
+	/* 8 per clause on r6xx, 16 on r7xx */
+	if (screen->chip_family >= CHIP_FAMILY_RV770)
 		ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
 	else
 		ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
@@ -378,16 +378,12 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
 	_mesa_init_driver_functions(&functions);
 
 	r700InitStateFuncs(&functions);
-	r600InitTextureFuncs(&functions);
+	r600InitTextureFuncs(&r600->radeon, &functions);
 	r700InitShaderFuncs(&functions);
 	radeonInitQueryObjFunctions(&functions);
 	r700InitIoctlFuncs(&functions);
 	radeonInitBufferObjectFuncs(&functions);
 
-	if (r600->radeon.radeonScreen->kernel_mm) {
-                r600_init_texcopy_functions(&functions);
-        }
-	
 	if (!radeonInitContext(&r600->radeon, &functions,
 			       glVisual, driContextPriv,
 			       sharedContextPrivate)) {
diff --git a/src/mesa/drivers/dri/r600/r600_context.h b/src/mesa/drivers/dri/r600/r600_context.h
index 1f7cd4096bf..72c8c869b70 100644
--- a/src/mesa/drivers/dri/r600/r600_context.h
+++ b/src/mesa/drivers/dri/r600/r600_context.h
@@ -185,7 +185,6 @@ extern void r700WaitForIdleClean(context_t *context);
 extern void r700Start3D(context_t *context);
 extern void r600InitAtoms(context_t *context);
 extern void r700InitDraw(GLcontext *ctx);
-extern void r600_init_texcopy_functions(struct dd_function_table *table);
 
 #define RADEON_D_CAPTURE 0
 #define RADEON_D_PLAYBACK 1
diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c
index f745fe3e8a6..71dfd7e0591 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.c
+++ b/src/mesa/drivers/dri/r600/r600_tex.c
@@ -396,7 +396,7 @@ static struct gl_texture_object *r600NewTextureObject(GLcontext * ctx,
 	return &t->base;
 }
 
-void r600InitTextureFuncs(struct dd_function_table *functions)
+void r600InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 	/* Note: we only plug in the functions we implement in the driver
 	 * since _mesa_init_driver_functions() was already called.
@@ -424,6 +424,11 @@ void r600InitTextureFuncs(struct dd_function_table *functions)
 	functions->CompressedTexImage2D = radeonCompressedTexImage2D;
 	functions->CompressedTexSubImage2D = radeonCompressedTexSubImage2D;
 
+	if (radeon->radeonScreen->kernel_mm) {
+		functions->CopyTexImage2D = radeonCopyTexImage2D;
+		functions->CopyTexSubImage2D = radeonCopyTexSubImage2D;
+	}
+
 	functions->GenerateMipmap = radeonGenerateMipmap;
 
 	driInitTextureFormats();
diff --git a/src/mesa/drivers/dri/r600/r600_tex.h b/src/mesa/drivers/dri/r600/r600_tex.h
index fb0e1a023e1..1d75a2ecd69 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.h
+++ b/src/mesa/drivers/dri/r600/r600_tex.h
@@ -42,7 +42,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 /* Texel pitch is 8 alignment. */
 #define R700_TEXEL_PITCH_ALIGNMENT_MASK 0x7
 
-#define R700_MAX_TEXTURE_UNITS 8 /* TODO : should be 16, lets make it work, review later */
+#define R700_MAX_TEXTURE_UNITS 16
 
 extern void r600SetDepthTexMode(struct gl_texture_object *tObj);
 
@@ -58,6 +58,6 @@ extern void r600SetTexOffset(__DRIcontext *pDRICtx, GLint texname,
 
 extern GLboolean r600ValidateBuffers(GLcontext * ctx);
 
-extern void r600InitTextureFuncs(struct dd_function_table *functions);
+extern void r600InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions);
 
 #endif				/* __r600_TEX_H__ */
diff --git a/src/mesa/drivers/dri/r600/r600_texcopy.c b/src/mesa/drivers/dri/r600/r600_texcopy.c
deleted file mode 100644
index 287a82ea8f3..00000000000
--- a/src/mesa/drivers/dri/r600/r600_texcopy.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * Copyright (C) 2009 Maciej Cencora <[email protected]>
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "radeon_common.h"
-#include "r600_context.h"
-
-#include "main/image.h"
-#include "main/teximage.h"
-#include "main/texstate.h"
-#include "drivers/common/meta.h"
-
-#include "radeon_mipmap_tree.h"
-#include "r600_blit.h"
-#include <main/debug.h>
-
-// TODO:
-// need to pass correct pitch for small dst textures!
-static GLboolean
-do_copy_texsubimage(GLcontext *ctx,
-                    GLenum target, GLint level,
-                    struct radeon_tex_obj *tobj,
-                    radeon_texture_image *timg,
-                    GLint dstx, GLint dsty,
-                    GLint x, GLint y,
-                    GLsizei width, GLsizei height)
-{
-    context_t *context = R700_CONTEXT(ctx);
-    struct radeon_renderbuffer *rrb;
-
-    if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
-        rrb = radeon_get_depthbuffer(&context->radeon);
-    } else {
-        rrb = radeon_get_colorbuffer(&context->radeon);
-    }
-
-    if (!timg->mt) {
-        radeon_validate_texture_miptree(ctx, &tobj->base);
-    }
-
-    assert(rrb && rrb->bo);
-    assert(timg->mt->bo);
-    assert(timg->base.Width >= dstx + width);
-    assert(timg->base.Height >= dsty + height);
-
-    intptr_t src_offset = rrb->draw_offset;
-    intptr_t dst_offset = radeon_miptree_image_offset(timg->mt, _mesa_tex_target_to_face(target), level);
-
-    if (src_offset % 256 || dst_offset % 256) {
-        return GL_FALSE;
-    }
-
-    if (0) {
-        fprintf(stderr, "%s: copying to face %d, level %d\n",
-                __FUNCTION__, _mesa_tex_target_to_face(target), level);
-        fprintf(stderr, "to: x %d, y %d, offset %d\n", dstx, dsty, (uint32_t) dst_offset);
-        fprintf(stderr, "from (%dx%d) width %d, height %d, offset %d, pitch %d\n",
-                x, y, rrb->base.Width, rrb->base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp);
-        fprintf(stderr, "src size %d, dst size %d\n", rrb->bo->size, timg->mt->bo->size);
-
-    }
-
-
-    /* blit from src buffer to texture */
-    return r600_blit(context, rrb->bo, src_offset, rrb->base.Format, rrb->pitch,
-                     rrb->base.Width, rrb->base.Height, x, y,
-                     timg->mt->bo, dst_offset, timg->base.TexFormat,
-                     timg->mt->levels[level].rowstride, timg->base.Width, timg->base.Height,
-                     dstx, dsty, width, height, 1);
-}
-
-static void
-r600CopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
-                   GLenum internalFormat,
-                   GLint x, GLint y, GLsizei width, GLsizei height,
-                   GLint border)
-{
-    struct gl_texture_unit *texUnit = _mesa_get_current_tex_unit(ctx);
-    struct gl_texture_object *texObj =
-        _mesa_select_tex_object(ctx, texUnit, target);
-    struct gl_texture_image *texImage =
-        _mesa_select_tex_image(ctx, texObj, target, level);
-    int srcx, srcy, dstx, dsty;
-
-    if (border)
-        goto fail;
-
-    /* Setup or redefine the texture object, mipmap tree and texture
-     * image.  Don't populate yet.
-     */
-    ctx->Driver.TexImage2D(ctx, target, level, internalFormat,
-                           width, height, border,
-                           GL_RGBA, GL_UNSIGNED_BYTE, NULL,
-                           &ctx->DefaultPacking, texObj, texImage);
-
-    srcx = x;
-    srcy = y;
-    dstx = 0;
-    dsty = 0;
-    if (!_mesa_clip_copytexsubimage(ctx,
-                                    &dstx, &dsty,
-                                    &srcx, &srcy,
-                                    &width, &height)) {
-        return;
-    }
-
-    if (!do_copy_texsubimage(ctx, target, level,
-                             radeon_tex_obj(texObj), (radeon_texture_image *)texImage,
-                             0, 0, x, y, width, height)) {
-        goto fail;
-    }
-
-    return;
-
-fail:
-    _mesa_meta_CopyTexImage2D(ctx, target, level, internalFormat, x, y,
-                              width, height, border);
-}
-
-static void
-r600CopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
-                      GLint xoffset, GLint yoffset,
-                      GLint x, GLint y,
-                      GLsizei width, GLsizei height)
-{
-    struct gl_texture_unit *texUnit = _mesa_get_current_tex_unit(ctx);
-    struct gl_texture_object *texObj = _mesa_select_tex_object(ctx, texUnit, target);
-    struct gl_texture_image *texImage = _mesa_select_tex_image(ctx, texObj, target, level);
-
-    if (!do_copy_texsubimage(ctx, target, level,
-                             radeon_tex_obj(texObj), (radeon_texture_image *)texImage,
-                             xoffset, yoffset, x, y, width, height)) {
-
-       //DEBUG_FALLBACKS
-
-        _mesa_meta_CopyTexSubImage2D(ctx, target, level,
-                                     xoffset, yoffset, x, y, width, height);
-    }
-}
-
-
-void r600_init_texcopy_functions(struct dd_function_table *table)
-{
-    table->CopyTexImage2D = r600CopyTexImage2D;
-    table->CopyTexSubImage2D = r600CopyTexSubImage2D;
-}
diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c
index b8466bdd75e..3289d89c926 100644
--- a/src/mesa/drivers/dri/r600/r600_texstate.c
+++ b/src/mesa/drivers/dri/r600/r600_texstate.c
@@ -85,6 +85,7 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa
 	CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
 	CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
 	CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+	CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
 
 	SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
 		 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
@@ -95,6 +96,11 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa
 	SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
 		 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
 
+	CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
+	SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL,
+		 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+		 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
+
 	switch (mesa_format) /* This is mesa format. */
 	{
 	case MESA_FORMAT_RGBA8888:
@@ -158,6 +164,32 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa
 		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
 			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
 		break;
+	case MESA_FORMAT_XRGB8888:
+		SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
+			 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+		break;
+	case MESA_FORMAT_XRGB8888_REV:
+		SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
+			 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
+
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
+		SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
+			 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
+		break;
 	case MESA_FORMAT_ARGB8888_REV:
 		SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
 			 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
@@ -515,6 +547,10 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa
 	case MESA_FORMAT_Z24_S8:
 	case MESA_FORMAT_Z32:
 	case MESA_FORMAT_S8:
+		SETbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
+		SETfield(t->SQ_TEX_RESOURCE0, ARRAY_1D_TILED_THIN1,
+			 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
+			 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
 		switch (mesa_format) {
 		case MESA_FORMAT_Z16:
 			SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
@@ -651,6 +687,12 @@ static GLuint r600_translate_shadow_func(GLenum func)
    }
 }
 
+static INLINE uint32_t
+S_FIXED(float value, uint32_t frac_bits)
+{
+   return value * (1 << frac_bits);
+}
+
 void r600SetDepthTexMode(struct gl_texture_object *tObj)
 {
 	radeonTexObjPtr t;
@@ -670,8 +712,9 @@ void r600SetDepthTexMode(struct gl_texture_object *tObj)
  * \param rmesa Context pointer
  * \param t the r300 texture object
  */
-static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *texObj)
+static void setup_hardware_state(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
 {
+	context_t *rmesa = R700_CONTEXT(ctx);
 	radeonTexObj *t = radeon_tex_obj(texObj);
 	const struct gl_texture_image *firstImage;
 	GLuint uTexelPitch, row_align;
@@ -733,11 +776,21 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
 
 	t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
 
-	if ((t->maxLod - t->minLod) > 0) {
-		t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
-		SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
-		SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
-	}
+	t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
+
+	SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
+	SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
+
+	SETfield(t->SQ_TEX_SAMPLER1,
+		S_FIXED(CLAMP(t->base.MinLod - t->minLod, 0, 15), 6),
+		MIN_LOD_shift, MIN_LOD_mask);
+	SETfield(t->SQ_TEX_SAMPLER1,
+		S_FIXED(CLAMP(t->base.MaxLod - t->minLod, 0, 15), 6),
+		MAX_LOD_shift, MAX_LOD_mask);
+	SETfield(t->SQ_TEX_SAMPLER1,
+		S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.LodBias, -16, 16), 6),
+		SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
+
 	if(texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
 	{
 		SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
@@ -754,9 +807,8 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex
  *
  * Mostly this means populating the texture object's mipmap tree.
  */
-static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj)
+static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
 {
-	context_t *rmesa = R700_CONTEXT(ctx);
 	radeonTexObj *t = radeon_tex_obj(texObj);
 
 	if (!radeon_validate_texture_miptree(ctx, texObj))
@@ -764,7 +816,7 @@ static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object
 
 	/* Configure the hardware registers (more precisely, the cached version
 	 * of the hardware registers). */
-	setup_hardware_state(rmesa, texObj);
+	setup_hardware_state(ctx, texObj, unit);
 
 	t->validated = GL_TRUE;
 	return GL_TRUE;
@@ -805,7 +857,7 @@ GLboolean r600ValidateBuffers(GLcontext * ctx)
 		if (!ctx->Texture.Unit[i]._ReallyEnabled)
 			continue;
 
-		if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current)) {
+		if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
 			radeon_warning("failed to validate texture for unit %d.\n", i);
 		}
 		t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 0ff16b4dddc..89adb77bf53 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -4469,7 +4469,7 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
 	}
 	pAsm->D2.dst2.SaturateMode = 1;
 
-	pAsm->S[0].src.rtype = pAsm->D.dst.rtype;
+	pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 	pAsm->S[0].src.reg = pAsm->D.dst.reg;
 	noswizzle_PVSSRC(&(pAsm->S[0].src));
 	noneg_PVSSRC(&(pAsm->S[0].src));
@@ -4491,20 +4491,21 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
 
 GLboolean assemble_XPD(r700_AssemblerBase *pAsm) 
 {
-    BITS tmp;
+    BITS tmp1;
+    BITS tmp2 = 0;
 
     if( GL_FALSE == checkop2(pAsm) )
     {
 	    return GL_FALSE;
     }
 
-    tmp = gethelpr(pAsm);
+    tmp1 = gethelpr(pAsm);
 
     pAsm->D.dst.opcode = SQ_OP2_INST_MUL;
 
     setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
     pAsm->D.dst.rtype = DST_REG_TEMPORARY;
-    pAsm->D.dst.reg   = tmp;
+    pAsm->D.dst.reg   = tmp1;
     nomask_PVSDST(&(pAsm->D.dst));
   
     if( GL_FALSE == assemble_src(pAsm, 0, -1) )
@@ -4530,11 +4531,11 @@ GLboolean assemble_XPD(r700_AssemblerBase *pAsm)
 
     if(0xF != pAsm->pILInst[pAsm->uiCurInst].DstReg.WriteMask)
     {
-        tmp = gethelpr(pAsm);
+        tmp2 = gethelpr(pAsm);
 
         setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
         pAsm->D.dst.rtype = DST_REG_TEMPORARY;
-        pAsm->D.dst.reg   = tmp;
+        pAsm->D.dst.reg   = tmp2;
 
         nomask_PVSDST(&(pAsm->D.dst));
     }
@@ -4562,7 +4563,7 @@ GLboolean assemble_XPD(r700_AssemblerBase *pAsm)
     // result1 + (neg) result0
     setaddrmode_PVSSRC(&(pAsm->S[2].src),ADDR_ABSOLUTE);
     pAsm->S[2].src.rtype = SRC_REG_TEMPORARY;
-    pAsm->S[2].src.reg   = tmp;
+    pAsm->S[2].src.reg   = tmp1;
 
     neg_PVSSRC(&(pAsm->S[2].src));
     noswizzle_PVSSRC(&(pAsm->S[2].src));
@@ -4585,7 +4586,7 @@ GLboolean assemble_XPD(r700_AssemblerBase *pAsm)
         // Use tmp as source
         setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
         pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
-        pAsm->S[0].src.reg   = tmp;
+        pAsm->S[0].src.reg   = tmp2;
 
         noneg_PVSSRC(&(pAsm->S[0].src));
         noswizzle_PVSSRC(&(pAsm->S[0].src));
@@ -5090,15 +5091,15 @@ void add_return_inst(r700_AssemblerBase *pAsm)
 {
     if(GL_FALSE == add_cf_instruction(pAsm) )
     {
-        return GL_FALSE;
+        return;
     }
     //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1;
     pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 0;
-    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0; 
+    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;
     pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE;
 
     pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0;
-    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; 
+    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
     pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_RETURN;
     pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0;
 
@@ -5302,7 +5303,7 @@ GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
 
 GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue)
 {
-    GLfloat fLiteral[2] = {0.1, 0.0};
+    /*GLfloat fLiteral[2] = {0.1, 0.0};*/
 
     pAsm->D.dst.opcode   = SQ_OP2_INST_MOV;
     pAsm->D.dst.op3      = 0;
@@ -5353,7 +5354,7 @@ GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue)
 
 GLboolean testFlag(r700_AssemblerBase *pAsm)
 {
-    GLfloat fLiteral[2] = {0.1, 0.0};
+    /*GLfloat fLiteral[2] = {0.1, 0.0};*/
 
     //Test flag
     GLuint tmp = gethelpr(pAsm);
@@ -6123,7 +6124,7 @@ GLboolean callPreSub(r700_AssemblerBase* pAsm,
 
     R700ControlFlowGenericClause* prelude_cf_ptr = NULL;
 
-    /* copy srcs to presub inputs */  
+    /* copy srcs to presub inputs */
     pAsm->alu_x_opcode = SQ_CF_INST_ALU;
     for(i=0; i<uNumValidSrc; i++)
     {
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h
index 56baf5b0d91..0064d0814f3 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.h
+++ b/src/mesa/drivers/dri/r600/r700_assembler.h
@@ -619,6 +619,7 @@ GLboolean assemble_RCP(r700_AssemblerBase *pAsm);
 GLboolean assemble_RSQ(r700_AssemblerBase *pAsm);
 GLboolean assemble_SCS(r700_AssemblerBase *pAsm);
 GLboolean assemble_SGE(r700_AssemblerBase *pAsm);
+GLboolean assemble_CONT(r700_AssemblerBase *pAsm);
 
 GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode);
 GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode); 
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 3bc2d2ba02b..ef25cd93fe4 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -303,14 +303,13 @@ static void r700SetRenderTarget(context_t *context, int id)
     R600_STATECHANGE(context, cb_target);
 
     /* color buffer */
-    r700->render_target[id].CB_COLOR0_BASE.u32All = context->radeon.state.color.draw_offset;
+    r700->render_target[id].CB_COLOR0_BASE.u32All = context->radeon.state.color.draw_offset / 256;
 
     nPitchInPixel = rrb->pitch/rrb->cpp;
     SETfield(r700->render_target[id].CB_COLOR0_SIZE.u32All, (nPitchInPixel/8)-1,
              PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
     SETfield(r700->render_target[id].CB_COLOR0_SIZE.u32All, ( (nPitchInPixel * context->radeon.radeonScreen->driScreen->fbHeight)/64 )-1,
              SLICE_TILE_MAX_shift, SLICE_TILE_MAX_mask);
-    r700->render_target[id].CB_COLOR0_BASE.u32All = 0;
     SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ENDIAN_NONE, ENDIAN_shift, ENDIAN_mask);
     SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_LINEAR_GENERAL,
              CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
@@ -453,13 +452,31 @@ static void r700SendRenderTargetState(GLcontext *ctx, struct radeon_state_atom *
 		R600_OUT_BATCH((2 << id));
 		END_BATCH();
 	}
+	/* Set CMASK & TILE buffer to the offset of color buffer as
+	 * we don't use those this shouldn't cause any issue and we
+	 * then have a valid cmd stream
+	 */
+	BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+	R600_OUT_BATCH_REGSEQ(CB_COLOR0_TILE + (4 * id), 1);
+	R600_OUT_BATCH(r700->render_target[id].CB_COLOR0_TILE.u32All);
+	R600_OUT_BATCH_RELOC(r700->render_target[id].CB_COLOR0_BASE.u32All,
+			     rrb->bo,
+			     r700->render_target[id].CB_COLOR0_BASE.u32All,
+			     0, RADEON_GEM_DOMAIN_VRAM, 0);
+	END_BATCH();
+	BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+	R600_OUT_BATCH_REGSEQ(CB_COLOR0_FRAG + (4 * id), 1);
+	R600_OUT_BATCH(r700->render_target[id].CB_COLOR0_FRAG.u32All);
+	R600_OUT_BATCH_RELOC(r700->render_target[id].CB_COLOR0_BASE.u32All,
+			     rrb->bo,
+			     r700->render_target[id].CB_COLOR0_BASE.u32All,
+			     0, RADEON_GEM_DOMAIN_VRAM, 0);
+        END_BATCH();
 
-        BEGIN_BATCH_NO_AUTOSTATE(18);
+        BEGIN_BATCH_NO_AUTOSTATE(12);
 	R600_OUT_BATCH_REGVAL(CB_COLOR0_SIZE + (4 * id), r700->render_target[id].CB_COLOR0_SIZE.u32All);
 	R600_OUT_BATCH_REGVAL(CB_COLOR0_VIEW + (4 * id), r700->render_target[id].CB_COLOR0_VIEW.u32All);
 	R600_OUT_BATCH_REGVAL(CB_COLOR0_INFO + (4 * id), r700->render_target[id].CB_COLOR0_INFO.u32All);
-	R600_OUT_BATCH_REGVAL(CB_COLOR0_TILE + (4 * id), r700->render_target[id].CB_COLOR0_TILE.u32All);
-	R600_OUT_BATCH_REGVAL(CB_COLOR0_FRAG + (4 * id), r700->render_target[id].CB_COLOR0_FRAG.u32All);
 	R600_OUT_BATCH_REGVAL(CB_COLOR0_MASK + (4 * id), r700->render_target[id].CB_COLOR0_MASK.u32All);
         END_BATCH();
 
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index eab27cbd842..3a6210c53ac 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -422,7 +422,7 @@ static void r700RunRenderPrimitiveImmediate(GLcontext * ctx, int start, int end,
 }
 
 /* start 3d, idle, cb/db flush */
-#define PRE_EMIT_STATE_BUFSZ 10 + 5 + 14
+#define PRE_EMIT_STATE_BUFSZ 10 + 5 + 18
 
 static GLuint r700PredictRenderSize(GLcontext* ctx,
 				    const struct _mesa_prim *prim,
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 3c8cb579f9b..20e8afefbaa 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -59,6 +59,7 @@ static void r700SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state);
 static void r700UpdatePolygonMode(GLcontext * ctx);
 static void r700SetPolygonOffsetState(GLcontext * ctx, GLboolean state);
 static void r700SetStencilState(GLcontext * ctx, GLboolean state);
+static void r700UpdateWindow(GLcontext * ctx, int id);
 
 void r700UpdateShaders(GLcontext * ctx)
 {
@@ -780,6 +781,9 @@ static void r700Enable(GLcontext * ctx, GLenum cap, GLboolean state) //---------
 	case GL_LINE_STIPPLE:
 		r700UpdateLineStipple(ctx);
 		break;
+	case GL_DEPTH_CLAMP:
+		r700UpdateWindow(ctx, 0);
+		break;
 	default:
 		break;
 	}
@@ -1576,9 +1580,9 @@ static void r700InitSQConfig(GLcontext * ctx)
     SETbit(r700->sq_config.SQ_CONFIG.u32All, DX9_CONSTS_bit);
     SETbit(r700->sq_config.SQ_CONFIG.u32All, ALU_INST_PREFER_VECTOR_bit);
     SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, PS_PRIO_shift, PS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, VS_PRIO_shift, VS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, GS_PRIO_shift, GS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, ES_PRIO_shift, ES_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, vs_prio, VS_PRIO_shift, VS_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, gs_prio, GS_PRIO_shift, GS_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, es_prio, ES_PRIO_shift, ES_PRIO_mask);
 
     r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All = 0;
     SETfield(r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All, num_ps_gprs, NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
diff --git a/src/mesa/drivers/dri/r600/radeon_tex_copy.c b/src/mesa/drivers/dri/r600/radeon_tex_copy.c
new file mode 120000
index 00000000000..dfa5ba34e65
--- /dev/null
+++ b/src/mesa/drivers/dri/r600/radeon_tex_copy.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/server/radeon_egl.c b/src/mesa/drivers/dri/r600/server/radeon_egl.c
deleted file mode 120000
index d7735a76438..00000000000
--- a/src/mesa/drivers/dri/r600/server/radeon_egl.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_egl.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index 2b2f2c4aa7a..a54ea16ec63 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -26,7 +26,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_mipmap_tree.c \
 	radeon_queryobj.c \
 	radeon_span.c \
-	radeon_texture.c
+	radeon_texture.c \
+	radeon_tex_copy.c
 
 DRIVER_SOURCES = \
 	radeon_context.c \
@@ -40,6 +41,7 @@ DRIVER_SOURCES = \
 	radeon_swtcl.c \
 	radeon_maos.c \
 	radeon_sanity.c \
+	radeon_blit.c \
 	$(RADEON_COMMON_SOURCES)
 
 C_SOURCES = \
@@ -47,7 +49,7 @@ C_SOURCES = \
 	$(DRIVER_SOURCES) \
 	$(CS_SOURCES)
 
-DRIVER_DEFINES = -DRADEON_R100 -Wall
+DRIVER_DEFINES = -DRADEON_R100
 
 DRI_LIB_DEPS += $(RADEON_LDFLAGS)
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
new file mode 100644
index 00000000000..0df4fbb33c5
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -0,0 +1,403 @@
+/*
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "radeon_common.h"
+#include "radeon_context.h"
+#include "radeon_blit.h"
+
+static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
+                                  int reg, int count)
+{
+    if (count)
+	    return CP_PACKET0(reg, count - 1);
+    return CP_PACKET2;
+}
+
+/* common formats supported as both textures and render targets */
+static unsigned is_blit_supported(gl_format mesa_format)
+{
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+    case MESA_FORMAT_XRGB8888:
+    case MESA_FORMAT_RGB565:
+    case MESA_FORMAT_ARGB4444:
+    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_A8:
+	    break;
+    default:
+	    return 0;
+    }
+
+    /* ??? */
+    if (_mesa_get_format_bits(mesa_format, GL_DEPTH_BITS) > 0)
+	    return 0;
+
+    return 1;
+}
+
+static inline void emit_vtx_state(struct r100_context *r100)
+{
+    BATCH_LOCALS(&r100->radeon);
+
+    BEGIN_BATCH(8);
+    if (r100->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
+	    OUT_BATCH_REGVAL(RADEON_SE_CNTL_STATUS, 0);
+    } else {
+	    OUT_BATCH_REGVAL(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
+
+    }
+    OUT_BATCH_REGVAL(RADEON_SE_COORD_FMT, (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
+					   RADEON_TEX1_W_ROUTING_USE_W0));
+    OUT_BATCH_REGVAL(RADEON_SE_VTX_FMT, RADEON_SE_VTX_FMT_XY | RADEON_SE_VTX_FMT_ST0);
+    OUT_BATCH_REGVAL(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD |
+				      RADEON_BFACE_SOLID |
+				      RADEON_FFACE_SOLID |
+				      RADEON_VTX_PIX_CENTER_OGL |
+				      RADEON_ROUND_MODE_ROUND |
+				      RADEON_ROUND_PREC_4TH_PIX));
+    END_BATCH();
+}
+
+static void inline emit_tx_setup(struct r100_context *r100,
+				 gl_format mesa_format,
+				 struct radeon_bo *bo,
+				 intptr_t offset,
+				 unsigned width,
+				 unsigned height,
+				 unsigned pitch)
+{
+    uint32_t txformat = RADEON_TXFORMAT_NON_POWER2;
+    BATCH_LOCALS(&r100->radeon);
+
+    assert(width <= 2047);
+    assert(height <= 2047);
+    assert(offset % 32 == 0);
+
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+	    txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_XRGB8888:
+	    txformat |= RADEON_TXFORMAT_ARGB8888;
+	    break;
+    case MESA_FORMAT_RGB565:
+	    txformat |= RADEON_TXFORMAT_RGB565;
+	    break;
+    case MESA_FORMAT_ARGB4444:
+	    txformat |= RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_ARGB1555:
+	    txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    case MESA_FORMAT_A8:
+	    txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+	    break;
+    default:
+	    break;
+    }
+
+    BEGIN_BATCH(18);
+    OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
+    OUT_BATCH_REGVAL(RADEON_PP_TXCBLEND_0, (RADEON_COLOR_ARG_A_ZERO |
+					    RADEON_COLOR_ARG_B_ZERO |
+					    RADEON_COLOR_ARG_C_T0_COLOR |
+					    RADEON_BLEND_CTL_ADD |
+					    RADEON_CLAMP_TX));
+    OUT_BATCH_REGVAL(RADEON_PP_TXABLEND_0, (RADEON_ALPHA_ARG_A_ZERO |
+					    RADEON_ALPHA_ARG_B_ZERO |
+					    RADEON_ALPHA_ARG_C_T0_ALPHA |
+					    RADEON_BLEND_CTL_ADD |
+					    RADEON_CLAMP_TX));
+    OUT_BATCH_REGVAL(RADEON_PP_TXFILTER_0, (RADEON_CLAMP_S_CLAMP_LAST |
+					    RADEON_CLAMP_T_CLAMP_LAST |
+					    RADEON_MAG_FILTER_NEAREST |
+					    RADEON_MIN_FILTER_NEAREST));
+    OUT_BATCH_REGVAL(RADEON_PP_TXFORMAT_0, txformat);
+    OUT_BATCH_REGVAL(RADEON_PP_TEX_SIZE_0, ((width - 1) |
+					    ((height - 1) << RADEON_TEX_VSIZE_SHIFT)));
+    OUT_BATCH_REGVAL(RADEON_PP_TEX_PITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32);
+
+    OUT_BATCH_REGSEQ(RADEON_PP_TXOFFSET_0, 1);
+    OUT_BATCH_RELOC(0, bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
+
+    END_BATCH();
+}
+
+static inline void emit_cb_setup(struct r100_context *r100,
+				 struct radeon_bo *bo,
+				 intptr_t offset,
+				 gl_format mesa_format,
+				 unsigned pitch,
+				 unsigned width,
+				 unsigned height)
+{
+    uint32_t dst_pitch = pitch;
+    uint32_t dst_format = 0;
+    BATCH_LOCALS(&r100->radeon);
+
+    /* XXX others?  BE/LE? */
+    switch (mesa_format) {
+    case MESA_FORMAT_ARGB8888:
+    case MESA_FORMAT_XRGB8888:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB8888;
+	    break;
+    case MESA_FORMAT_RGB565:
+	    dst_format = RADEON_COLOR_FORMAT_RGB565;
+	    break;
+    case MESA_FORMAT_ARGB4444:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB4444;
+	    break;
+    case MESA_FORMAT_ARGB1555:
+	    dst_format = RADEON_COLOR_FORMAT_ARGB1555;
+	    break;
+    case MESA_FORMAT_A8:
+	    dst_format = RADEON_COLOR_FORMAT_RGB8;
+	    break;
+    default:
+	    break;
+    }
+
+    BEGIN_BATCH_NO_AUTOSTATE(18);
+    OUT_BATCH_REGVAL(RADEON_RE_TOP_LEFT, 0);
+    OUT_BATCH_REGVAL(RADEON_RE_WIDTH_HEIGHT, ((width << RADEON_RE_WIDTH_SHIFT) |
+					      (height << RADEON_RE_HEIGHT_SHIFT)));
+    OUT_BATCH_REGVAL(RADEON_RB3D_PLANEMASK, 0xffffffff);
+    OUT_BATCH_REGVAL(RADEON_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
+    OUT_BATCH_REGVAL(RADEON_RB3D_CNTL, dst_format);
+
+    OUT_BATCH_REGSEQ(RADEON_RB3D_COLOROFFSET, 1);
+    OUT_BATCH_RELOC(0, bo, 0, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0);
+    OUT_BATCH_REGSEQ(RADEON_RB3D_COLORPITCH, 1);
+    OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0);
+
+    END_BATCH();
+}
+
+static GLboolean validate_buffers(struct r100_context *r100,
+                                  struct radeon_bo *src_bo,
+                                  struct radeon_bo *dst_bo)
+{
+    int ret;
+    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
+                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+
+    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
+                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+
+    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
+                                        first_elem(&r100->radeon.dma.reserved)->bo,
+                                        RADEON_GEM_DOMAIN_GTT, 0);
+    if (ret)
+        return GL_FALSE;
+
+    return GL_TRUE;
+}
+
+/**
+ * Calculate texcoords for given image region.
+ * Output values are [minx, maxx, miny, maxy]
+ */
+static inline void calc_tex_coords(float img_width, float img_height,
+				   float x, float y,
+				   float reg_width, float reg_height,
+				   unsigned flip_y, float *buf)
+{
+    buf[0] = x / img_width;
+    buf[1] = buf[0] + reg_width / img_width;
+    buf[2] = y / img_height;
+    buf[3] = buf[2] + reg_height / img_height;
+    if (flip_y)
+    {
+        buf[2] = 1.0 - buf[2];
+        buf[3] = 1.0 - buf[3];
+    }
+}
+
+static inline void emit_draw_packet(struct r100_context *r100,
+				    unsigned src_width, unsigned src_height,
+				    unsigned src_x_offset, unsigned src_y_offset,
+				    unsigned dst_x_offset, unsigned dst_y_offset,
+				    unsigned reg_width, unsigned reg_height,
+				    unsigned flip_y)
+{
+    float texcoords[4];
+    float verts[12];
+    BATCH_LOCALS(&r100->radeon);
+
+    calc_tex_coords(src_width, src_height,
+                    src_x_offset, src_y_offset,
+                    reg_width, reg_height,
+                    flip_y, texcoords);
+
+    verts[0] = dst_x_offset;
+    verts[1] = dst_y_offset + reg_height;
+    verts[2] = texcoords[0];
+    verts[3] = texcoords[3];
+
+    verts[4] = dst_x_offset + reg_width;
+    verts[5] = dst_y_offset + reg_height;
+    verts[6] = texcoords[1];
+    verts[7] = texcoords[3];
+
+    verts[8] = dst_x_offset + reg_width;
+    verts[9] = dst_y_offset;
+    verts[10] = texcoords[1];
+    verts[11] = texcoords[2];
+
+    BEGIN_BATCH(15);
+    OUT_BATCH(RADEON_CP_PACKET3_3D_DRAW_IMMD | (13 << 16));
+    OUT_BATCH(RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_ST0);
+    OUT_BATCH(RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+	      RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST |
+	      RADEON_CP_VC_CNTL_MAOS_ENABLE |
+	      RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
+              (3 << 16));
+    OUT_BATCH_TABLE(verts, 12);
+    END_BATCH();
+}
+
+/**
+ * Copy a region of [@a width x @a height] pixels from source buffer
+ * to destination buffer.
+ * @param[in] r100 r100 context
+ * @param[in] src_bo source radeon buffer object
+ * @param[in] src_offset offset of the source image in the @a src_bo
+ * @param[in] src_mesaformat source image format
+ * @param[in] src_pitch aligned source image width
+ * @param[in] src_width source image width
+ * @param[in] src_height source image height
+ * @param[in] src_x_offset x offset in the source image
+ * @param[in] src_y_offset y offset in the source image
+ * @param[in] dst_bo destination radeon buffer object
+ * @param[in] dst_offset offset of the destination image in the @a dst_bo
+ * @param[in] dst_mesaformat destination image format
+ * @param[in] dst_pitch aligned destination image width
+ * @param[in] dst_width destination image width
+ * @param[in] dst_height destination image height
+ * @param[in] dst_x_offset x offset in the destination image
+ * @param[in] dst_y_offset y offset in the destination image
+ * @param[in] width region width
+ * @param[in] height region height
+ * @param[in] flip_y set if y coords of the source image need to be flipped
+ */
+unsigned r100_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned reg_width,
+                   unsigned reg_height,
+                   unsigned flip_y)
+{
+    struct r100_context *r100 = R100_CONTEXT(ctx);
+
+    if (!is_blit_supported(dst_mesaformat))
+        return GL_FALSE;
+
+    /* Make sure that colorbuffer has even width - hw limitation */
+    if (dst_pitch % 2 > 0)
+        ++dst_pitch;
+
+    /* Rendering to small buffer doesn't work.
+     * Looks like a hw limitation.
+     */
+    if (dst_pitch < 32)
+        return GL_FALSE;
+
+    /* Need to clamp the region size to make sure
+     * we don't read outside of the source buffer
+     * or write outside of the destination buffer.
+     */
+    if (reg_width + src_x_offset > src_width)
+        reg_width = src_width - src_x_offset;
+    if (reg_height + src_y_offset > src_height)
+        reg_height = src_height - src_y_offset;
+    if (reg_width + dst_x_offset > dst_width)
+        reg_width = dst_width - dst_x_offset;
+    if (reg_height + dst_y_offset > dst_height)
+        reg_height = dst_height - dst_y_offset;
+
+    if (src_bo == dst_bo) {
+        return GL_FALSE;
+    }
+
+    if (src_offset % 32 || dst_offset % 32) {
+        return GL_FALSE;
+    }
+
+    if (0) {
+        fprintf(stderr, "src: size [%d x %d], pitch %d, "
+                "offset [%d x %d], format %s, bo %p\n",
+                src_width, src_height, src_pitch,
+                src_x_offset, src_y_offset,
+                _mesa_get_format_name(src_mesaformat),
+                src_bo);
+        fprintf(stderr, "dst: pitch %d, offset[%d x %d], format %s, bo %p\n",
+                dst_pitch, dst_x_offset, dst_y_offset,
+                _mesa_get_format_name(dst_mesaformat), dst_bo);
+        fprintf(stderr, "region: %d x %d\n", reg_width, reg_height);
+    }
+
+    /* Flush is needed to make sure that source buffer has correct data */
+    radeonFlush(ctx);
+
+    rcommonEnsureCmdBufSpace(&r100->radeon, 59, __FUNCTION__);
+
+    if (!validate_buffers(r100, src_bo, dst_bo))
+        return GL_FALSE;
+
+    /* 8 */
+    emit_vtx_state(r100);
+    /* 18 */
+    emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
+    /* 18 */
+    emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
+    /* 15 */
+    emit_draw_packet(r100, src_width, src_height,
+                     src_x_offset, src_y_offset,
+                     dst_x_offset, dst_y_offset,
+                     reg_width, reg_height,
+                     flip_y);
+
+    radeonFlush(ctx);
+
+    return GL_TRUE;
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.h b/src/mesa/drivers/dri/radeon/radeon_blit.h
new file mode 100644
index 00000000000..d36366ff791
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef RADEON_BLIT_H
+#define RADEON_BLIT_H
+
+void r100_blit_init(struct r100_context *r100);
+
+unsigned r100_blit(GLcontext *ctx,
+                   struct radeon_bo *src_bo,
+                   intptr_t src_offset,
+                   gl_format src_mesaformat,
+                   unsigned src_pitch,
+                   unsigned src_width,
+                   unsigned src_height,
+                   unsigned src_x_offset,
+                   unsigned src_y_offset,
+                   struct radeon_bo *dst_bo,
+                   intptr_t dst_offset,
+                   gl_format dst_mesaformat,
+                   unsigned dst_pitch,
+                   unsigned dst_width,
+                   unsigned dst_height,
+                   unsigned dst_x_offset,
+                   unsigned dst_y_offset,
+                   unsigned width,
+                   unsigned height,
+                   unsigned flip_y);
+
+#endif // RADEON_BLIT_H
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index e0b853bc97d..79f3ff7da65 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -1036,10 +1036,11 @@ static INLINE void radeon_emit_atom(radeonContextPtr radeon, struct radeon_state
 			OUT_BATCH_TABLE(atom->cmd, dwords);
 			END_BATCH();
 		}
+		atom->dirty = GL_FALSE;
+
 	} else {
 		radeon_print(RADEON_STATE, RADEON_VERBOSE, "  skip state %s\n", atom->name);
 	}
-	atom->dirty = GL_FALSE;
 
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ab79d2dc0f2..e397ee8c226 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -518,6 +518,26 @@ struct radeon_context {
 	   void (*free_context)(GLcontext *ctx);
 	   void (*emit_query_finish)(radeonContextPtr radeon);
 	   void (*update_scissor)(GLcontext *ctx);
+	   unsigned (*blit)(GLcontext *ctx,
+                        struct radeon_bo *src_bo,
+                        intptr_t src_offset,
+                        gl_format src_mesaformat,
+                        unsigned src_pitch,
+                        unsigned src_width,
+                        unsigned src_height,
+                        unsigned src_x_offset,
+                        unsigned src_y_offset,
+                        struct radeon_bo *dst_bo,
+                        intptr_t dst_offset,
+                        gl_format dst_mesaformat,
+                        unsigned dst_pitch,
+                        unsigned dst_width,
+                        unsigned dst_height,
+                        unsigned dst_x_offset,
+                        unsigned dst_y_offset,
+                        unsigned reg_width,
+                        unsigned reg_height,
+                        unsigned flip_y);
    } vtbl;
 };
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 3cd305b0a25..6c08a90bbd6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -63,6 +63,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_tcl.h"
 #include "radeon_maos.h"
 #include "radeon_queryobj.h"
+#include "radeon_blit.h"
 
 #define need_GL_ARB_occlusion_query
 #define need_GL_EXT_blend_minmax
@@ -202,6 +203,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.fallback = radeonFallback;
    radeon->vtbl.free_context = r100_vtbl_free_context;
    radeon->vtbl.emit_query_finish = r100_emit_query_finish;
+   radeon->vtbl.blit = r100_blit;
 }
 
 /* Create the device specific context.
@@ -228,6 +230,7 @@ r100CreateContext( const __GLcontextModes *glVisual,
    if ( !rmesa )
       return GL_FALSE;
 
+   rmesa->radeon.radeonScreen = screen;
    r100_init_vtbl(&rmesa->radeon);
 
    /* init exp fog table data */
@@ -257,7 +260,7 @@ r100CreateContext( const __GLcontextModes *glVisual,
     * (the texture functions are especially important)
     */
    _mesa_init_driver_functions( &functions );
-   radeonInitTextureFuncs( &functions );
+   radeonInitTextureFuncs( &rmesa->radeon, &functions );
    radeonInitQueryObjFunctions(&functions);
 
    if (!radeonInitContext(&rmesa->radeon, &functions,
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index dfedc38bfd1..d84760bf74f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -453,7 +453,6 @@ struct r100_context {
 extern GLboolean r100CreateContext( const __GLcontextModes *glVisual,
 				    __DRIcontext *driContextPriv,
 				    void *sharedContextPrivate);
-  
 
 
 #endif				/* __RADEON_CONTEXT_H__ */
diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
index bf46eb8aaba..cc951a12cbc 100644
--- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
@@ -180,7 +180,6 @@ static int cs_begin(struct radeon_cs_int *cs,
 
     if (cs->cdw + ndw > cs->ndw) {
         uint32_t tmp, *ptr;
-	int num = (ndw > 0x3FF) ? ndw : 0x3FF;
 
         tmp = (cs->cdw + ndw + 0x3ff) & (~0x3ff);
         ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 7b1f84a7154..e780b9eef1b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -531,10 +531,9 @@ radeon_render_texture(GLcontext * ctx,
                                             att->TextureLevel);
 
    if (att->Texture->Target == GL_TEXTURE_3D) {
-      GLuint offsets[6];
-      radeon_miptree_depth_offsets(radeon_image->mt, att->TextureLevel,
-				   offsets);
-      imageOffset += offsets[att->Zoffset];
+      imageOffset += radeon_image->mt->levels[att->TextureLevel].rowstride *
+                     radeon_image->mt->levels[att->TextureLevel].height *
+                     att->Zoffset;
    }
 
    /* store that offset in the region, along with the correct pitch for
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index a9d50c5d078..afe3d9f12e2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -46,7 +46,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/shaders.h"
 #include "main/texstate.h"
 #include "main/varray.h"
-#include "glapi/dispatch.h"
 #include "swrast/swrast.h"
 #include "main/stencil.h"
 #include "main/matrix.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_lighting.c b/src/mesa/drivers/dri/radeon/radeon_lighting.c
deleted file mode 100644
index ba444f2b100..00000000000
--- a/src/mesa/drivers/dri/radeon/radeon_lighting.c
+++ /dev/null
@@ -1,681 +0,0 @@
-/*
- * Copyright 2000, 2001 VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Gareth Hughes <[email protected]>
- *    Keith Whitwell <[email protected]>
- */
-
-#include "main/glheader.h"
-#include "main/imports.h"
-#include "api_arrayelt.h"
-/* #include "mmath.h" */
-#include "main/enums.h"
-#include "colormac.h"
-
-
-#include "radeon_context.h"
-#include "radeon_ioctl.h"
-#include "radeon_state.h"
-#include "radeon_tcl.h"
-#include "radeon_tex.h"
-#include "radeon_vtxfmt.h"
-
-
-
-/* =============================================================
- * Materials
- */
-
-
-/* Update on colormaterial, material emmissive/ambient, 
- * lightmodel.globalambient
- */
-void update_global_ambient( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   float *fcmd = (float *)RADEON_DB_STATE( glt );
-
-   /* Need to do more if both emmissive & ambient are PREMULT:
-    */
-   if ((rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &
-       ((3 << RADEON_EMISSIVE_SOURCE_SHIFT) |
-	(3 << RADEON_AMBIENT_SOURCE_SHIFT))) == 0) 
-   {
-      COPY_3V( &fcmd[GLT_RED], 
-	       ctx->Light.Material[0].Emission);
-      ACC_SCALE_3V( &fcmd[GLT_RED],
-		   ctx->Light.Model.Ambient,
-		   ctx->Light.Material[0].Ambient);
-   } 
-   else
-   {
-      COPY_3V( &fcmd[GLT_RED], ctx->Light.Model.Ambient );
-   }
-   
-   RADEON_DB_STATECHANGE(rmesa, &rmesa->hw.glt);
-}
-
-/* Update on change to 
- *    - light[p].colors
- *    - light[p].enabled
- *    - material,
- *    - colormaterial enabled
- *    - colormaterial bitmask
- */
-void update_light_colors( GLcontext *ctx, GLuint p )
-{
-   struct gl_light *l = &ctx->Light.Light[p];
-
-/*     fprintf(stderr, "%s\n", __FUNCTION__); */
-
-   if (l->Enabled) {
-      radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-      float *fcmd = (float *)RADEON_DB_STATE( lit[p] );
-      GLuint bitmask = ctx->Light.ColorMaterialBitmask;
-      struct gl_material *mat = &ctx->Light.Material[0];
-
-      COPY_4V( &fcmd[LIT_AMBIENT_RED], l->Ambient );	 
-      COPY_4V( &fcmd[LIT_DIFFUSE_RED], l->Diffuse );
-      COPY_4V( &fcmd[LIT_SPECULAR_RED], l->Specular );
-      
-      if (!ctx->Light.ColorMaterialEnabled)
-	 bitmask = 0;
-
-      if ((bitmask & FRONT_AMBIENT_BIT) == 0) 
-	 SELF_SCALE_3V( &fcmd[LIT_AMBIENT_RED], mat->Ambient );
-
-      if ((bitmask & FRONT_DIFFUSE_BIT) == 0) 
-	 SELF_SCALE_3V( &fcmd[LIT_DIFFUSE_RED], mat->Diffuse );
-      
-      if ((bitmask & FRONT_SPECULAR_BIT) == 0) 
-	 SELF_SCALE_3V( &fcmd[LIT_SPECULAR_RED], mat->Specular );
-
-      RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
-   }
-}
-
-/* Also fallback for asym colormaterial mode in twoside lighting...
- */
-void check_twoside_fallback( GLcontext *ctx )
-{
-   GLboolean fallback = GL_FALSE;
-
-   if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) {
-      if (memcmp( &ctx->Light.Material[0],
-		  &ctx->Light.Material[1],
-		  sizeof(struct gl_material)) != 0)
-	 fallback = GL_TRUE;  
-      else if (ctx->Light.ColorMaterialEnabled &&
-	       (ctx->Light.ColorMaterialBitmask & BACK_MATERIAL_BITS) != 
-	       ((ctx->Light.ColorMaterialBitmask & FRONT_MATERIAL_BITS)<<1))
-	 fallback = GL_TRUE;
-   }
-
-   TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_LIGHT_TWOSIDE, fallback );
-}
-
-void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
-{
-   if (ctx->Light.ColorMaterialEnabled) {
-      radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-      GLuint light_model_ctl = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL];
-      GLuint mask = ctx->Light.ColorMaterialBitmask;
-
-      /* Default to PREMULT:
-       */
-      light_model_ctl &= ~((3 << RADEON_EMISSIVE_SOURCE_SHIFT) |
-			   (3 << RADEON_AMBIENT_SOURCE_SHIFT) |
-			   (3 << RADEON_DIFFUSE_SOURCE_SHIFT) |
-			   (3 << RADEON_SPECULAR_SOURCE_SHIFT)); 
-   
-      if (mask & FRONT_EMISSION_BIT) {
-	 light_model_ctl |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
-			     RADEON_EMISSIVE_SOURCE_SHIFT);
-      }
-
-      if (mask & FRONT_AMBIENT_BIT) {
-	 light_model_ctl |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
-			     RADEON_AMBIENT_SOURCE_SHIFT);
-      }
-	 
-      if (mask & FRONT_DIFFUSE_BIT) {
-	 light_model_ctl |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
-			     RADEON_DIFFUSE_SOURCE_SHIFT);
-      }
-   
-      if (mask & FRONT_SPECULAR_BIT) {
-	 light_model_ctl |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
-			     RADEON_SPECULAR_SOURCE_SHIFT);
-      }
-   
-      if (light_model_ctl != rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]) {
-	 GLuint p;
-
-	 RADEON_STATECHANGE( rmesa, tcl );
-	 rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] = light_model_ctl;      
-
-	 for (p = 0 ; p < MAX_LIGHTS; p++) 
-	    update_light_colors( ctx, p );
-	 update_global_ambient( ctx );
-      }
-   }
-   
-   check_twoside_fallback( ctx );
-}
-
-void radeonUpdateMaterial( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( mtl );
-   GLuint p;
-   GLuint mask = ~0;
-   
-   if (ctx->Light.ColorMaterialEnabled)
-      mask &= ~ctx->Light.ColorMaterialBitmask;
-
-   if (RADEON_DEBUG & RADEON_STATE)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-      
-   if (mask & FRONT_EMISSION_BIT) {
-      fcmd[MTL_EMMISSIVE_RED]   = ctx->Light.Material[0].Emission[0];
-      fcmd[MTL_EMMISSIVE_GREEN] = ctx->Light.Material[0].Emission[1];
-      fcmd[MTL_EMMISSIVE_BLUE]  = ctx->Light.Material[0].Emission[2];
-      fcmd[MTL_EMMISSIVE_ALPHA] = ctx->Light.Material[0].Emission[3];
-   }
-   if (mask & FRONT_AMBIENT_BIT) {
-      fcmd[MTL_AMBIENT_RED]     = ctx->Light.Material[0].Ambient[0];
-      fcmd[MTL_AMBIENT_GREEN]   = ctx->Light.Material[0].Ambient[1];
-      fcmd[MTL_AMBIENT_BLUE]    = ctx->Light.Material[0].Ambient[2];
-      fcmd[MTL_AMBIENT_ALPHA]   = ctx->Light.Material[0].Ambient[3];
-   }
-   if (mask & FRONT_DIFFUSE_BIT) {
-      fcmd[MTL_DIFFUSE_RED]     = ctx->Light.Material[0].Diffuse[0];
-      fcmd[MTL_DIFFUSE_GREEN]   = ctx->Light.Material[0].Diffuse[1];
-      fcmd[MTL_DIFFUSE_BLUE]    = ctx->Light.Material[0].Diffuse[2];
-      fcmd[MTL_DIFFUSE_ALPHA]   = ctx->Light.Material[0].Diffuse[3];
-   }
-   if (mask & FRONT_SPECULAR_BIT) {
-      fcmd[MTL_SPECULAR_RED]    = ctx->Light.Material[0].Specular[0];
-      fcmd[MTL_SPECULAR_GREEN]  = ctx->Light.Material[0].Specular[1];
-      fcmd[MTL_SPECULAR_BLUE]   = ctx->Light.Material[0].Specular[2];
-      fcmd[MTL_SPECULAR_ALPHA]  = ctx->Light.Material[0].Specular[3];
-   }
-   if (mask & FRONT_SHININESS_BIT) {
-      fcmd[MTL_SHININESS]       = ctx->Light.Material[0].Shininess;
-   }
-
-   if (RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mtl )) {
-      for (p = 0 ; p < MAX_LIGHTS; p++) 
-	 update_light_colors( ctx, p );
-
-      check_twoside_fallback( ctx );
-      update_global_ambient( ctx );
-   }
-   else if (RADEON_DEBUG & (RADEON_PRIMS|DEBUG_STATE))
-      fprintf(stderr, "%s: Elided noop material call\n", __FUNCTION__);
-}
-
-/* _NEW_LIGHT
- * _NEW_MODELVIEW
- * _MESA_NEW_NEED_EYE_COORDS
- *
- * Uses derived state from mesa:
- *       _VP_inf_norm
- *       _h_inf_norm
- *       _Position
- *       _NormSpotDirection
- *       _ModelViewInvScale
- *       _NeedEyeCoords
- *       _EyeZDir
- *
- * which are calculated in light.c and are correct for the current
- * lighting space (model or eye), hence dependencies on _NEW_MODELVIEW
- * and _MESA_NEW_NEED_EYE_COORDS.  
- */
-void radeonUpdateLighting( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-
-   /* Have to check these, or have an automatic shortcircuit mechanism
-    * to remove noop statechanges. (Or just do a better job on the
-    * front end).
-    */
-   {
-      GLuint tmp = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL];
-
-      if (ctx->_NeedEyeCoords)
-	 tmp &= ~RADEON_LIGHT_IN_MODELSPACE;
-      else
-	 tmp |= RADEON_LIGHT_IN_MODELSPACE;
-      
-
-      /* Leave this test disabled: (unexplained q3 lockup) (even with
-         new packets)
-      */
-      if (tmp != rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]) 
-      {
-	 RADEON_STATECHANGE( rmesa, tcl );
-	 rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] = tmp;
-      }
-   }
-
-   {
-      GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( eye );
-      fcmd[EYE_X] = ctx->_EyeZDir[0];
-      fcmd[EYE_Y] = ctx->_EyeZDir[1];
-      fcmd[EYE_Z] = - ctx->_EyeZDir[2];
-      fcmd[EYE_RESCALE_FACTOR] = ctx->_ModelViewInvScale;
-      RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.eye );
-   }
-
-
-/*     RADEON_STATECHANGE( rmesa, glt ); */
-
-   if (ctx->Light.Enabled) {
-      GLint p;
-      for (p = 0 ; p < MAX_LIGHTS; p++) {
-	 if (ctx->Light.Light[p].Enabled) {
-	    struct gl_light *l = &ctx->Light.Light[p];
-	    GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] );
-	    
-	    if (l->EyePosition[3] == 0.0) {
-	       COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); 
-	       COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); 
-	       fcmd[LIT_POSITION_W] = 0;
-	       fcmd[LIT_DIRECTION_W] = 0;
-	    } else {
-	       COPY_4V( &fcmd[LIT_POSITION_X], l->_Position );
-	       fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0];
-	       fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1];
-	       fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2];
-	       fcmd[LIT_DIRECTION_W] = 0;
-	    }
-
-	    RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
-	 }
-      }
-   }
-}
-
-
-void radeonLightfv( GLcontext *ctx, GLenum light,
-		    GLenum pname, const GLfloat *params )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   GLint p = light - GL_LIGHT0;
-   struct gl_light *l = &ctx->Light.Light[p];
-   GLfloat *fcmd = (GLfloat *)rmesa->hw.lit[p].cmd;
-   
-
-   switch (pname) {
-   case GL_AMBIENT:		
-   case GL_DIFFUSE:
-   case GL_SPECULAR:
-      update_light_colors( ctx, p );
-      break;
-
-   case GL_SPOT_DIRECTION: 
-      /* picked up in update_light */	
-      break;
-
-   case GL_POSITION: {
-      /* positions picked up in update_light, but can do flag here */	
-      GLuint flag = (p&1)? RADEON_LIGHT_1_IS_LOCAL : RADEON_LIGHT_0_IS_LOCAL;
-      GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2;
-
-      RADEON_STATECHANGE(rmesa, tcl);
-      if (l->EyePosition[3] != 0.0F)
-	 rmesa->hw.tcl.cmd[idx] |= flag;
-      else
-	 rmesa->hw.tcl.cmd[idx] &= ~flag;
-      break;
-   }
-
-   case GL_SPOT_EXPONENT:
-      RADEON_STATECHANGE(rmesa, lit[p]);
-      fcmd[LIT_SPOT_EXPONENT] = params[0];
-      break;
-
-   case GL_SPOT_CUTOFF: {
-      GLuint flag = (p&1) ? RADEON_LIGHT_1_IS_SPOT : RADEON_LIGHT_0_IS_SPOT;
-      GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2;
-
-      RADEON_STATECHANGE(rmesa, lit[p]);
-      fcmd[LIT_SPOT_CUTOFF] = l->_CosCutoff;
-
-      RADEON_STATECHANGE(rmesa, tcl);
-      if (l->SpotCutoff != 180.0F)
-	 rmesa->hw.tcl.cmd[idx] |= flag;
-      else
-	 rmesa->hw.tcl.cmd[idx] &= ~flag;
-      break;
-   }
-
-   case GL_CONSTANT_ATTENUATION:
-      RADEON_STATECHANGE(rmesa, lit[p]);
-      fcmd[LIT_ATTEN_CONST] = params[0];
-      break;
-   case GL_LINEAR_ATTENUATION:
-      RADEON_STATECHANGE(rmesa, lit[p]);
-      fcmd[LIT_ATTEN_LINEAR] = params[0];
-      break;
-   case GL_QUADRATIC_ATTENUATION:
-      RADEON_STATECHANGE(rmesa, lit[p]);
-      fcmd[LIT_ATTEN_QUADRATIC] = params[0];
-      break;
-   default:
-      return;
-   }
-
-}
-
-		  
-
-
-void radeonLightModelfv( GLcontext *ctx, GLenum pname,
-			 const GLfloat *param )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-
-   switch (pname) {
-      case GL_LIGHT_MODEL_AMBIENT: 
-	 update_global_ambient( ctx );
-	 break;
-
-      case GL_LIGHT_MODEL_LOCAL_VIEWER:
-	 RADEON_STATECHANGE( rmesa, tcl );
-	 if (ctx->Light.Model.LocalViewer)
-	    rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LOCAL_VIEWER;
-	 else
-	    rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_LOCAL_VIEWER;
-         break;
-
-      case GL_LIGHT_MODEL_TWO_SIDE:
-	 RADEON_STATECHANGE( rmesa, tcl );
-	 if (ctx->Light.Model.TwoSide)
-	    rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_LIGHT_TWOSIDE;
-	 else
-	    rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_LIGHT_TWOSIDE;
-
-	 check_twoside_fallback( ctx );
-
-#if _HAVE_SWTNL
-	 if (rmesa->TclFallback) {
-	    radeonChooseRenderState( ctx );
-	    radeonChooseVertexState( ctx );
-	 }
-#endif
-         break;
-
-      case GL_LIGHT_MODEL_COLOR_CONTROL:
-	 radeonUpdateSpecular(ctx);
-
-	 RADEON_STATECHANGE( rmesa, tcl );
-	 if (ctx->Light.Model.ColorControl == GL_SEPARATE_SPECULAR_COLOR) 
-	    rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= 
-	       ~RADEON_DIFFUSE_SPECULAR_COMBINE;
-	 else
-	    rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= 
-	       RADEON_DIFFUSE_SPECULAR_COMBINE;
-         break;
-
-      default:
-         break;
-   }
-}
-
-
-/* =============================================================
- * Fog
- */
-
-
-static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   union { int i; float f; } c, d;
-   GLchan col[4];
-
-   c.i = rmesa->hw.fog.cmd[FOG_C];
-   d.i = rmesa->hw.fog.cmd[FOG_D];
-
-   switch (pname) {
-   case GL_FOG_MODE:
-      if (!ctx->Fog.Enabled)
-	 return;
-      RADEON_STATECHANGE(rmesa, tcl);
-      rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_TCL_FOG_MASK;
-      switch (ctx->Fog.Mode) {
-      case GL_LINEAR:
-	 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_LINEAR;
-	 if (ctx->Fog.Start == ctx->Fog.End) {
-	    c.f = 1.0F;
-	    d.f = 1.0F;
-	 }
-	 else {
-	    c.f = ctx->Fog.End/(ctx->Fog.End-ctx->Fog.Start);
-	    d.f = 1.0/(ctx->Fog.End-ctx->Fog.Start);
-	 }
-	 break;
-      case GL_EXP:
-	 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP;
-	 c.f = 0.0;
-	 d.f = ctx->Fog.Density;
-	 break;
-      case GL_EXP2:
-	 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP2;
-	 c.f = 0.0;
-	 d.f = -(ctx->Fog.Density * ctx->Fog.Density);
-	 break;
-      default:
-	 return;
-      }
-      break;
-   case GL_FOG_DENSITY:
-      switch (ctx->Fog.Mode) {
-      case GL_EXP:
-	 c.f = 0.0;
-	 d.f = ctx->Fog.Density;
-	 break;
-      case GL_EXP2:
-	 c.f = 0.0;
-	 d.f = -(ctx->Fog.Density * ctx->Fog.Density);
-	 break;
-      default:
-	 break;
-      }
-      break;
-   case GL_FOG_START:
-   case GL_FOG_END:
-      if (ctx->Fog.Mode == GL_LINEAR) {
-	 if (ctx->Fog.Start == ctx->Fog.End) {
-	    c.f = 1.0F;
-	    d.f = 1.0F;
-	 } else {
-	    c.f = ctx->Fog.End/(ctx->Fog.End-ctx->Fog.Start);
-	    d.f = 1.0/(ctx->Fog.End-ctx->Fog.Start);
-	 }
-      }
-      break;
-   case GL_FOG_COLOR: 
-      RADEON_STATECHANGE( rmesa, ctx );
-      UNCLAMPED_FLOAT_TO_RGB_CHAN( col, ctx->Fog.Color );
-      rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] =
-	 radeonPackColor( 4, col[0], col[1], col[2], 0 );
-      break;
-   case GL_FOG_COORDINATE_SOURCE_EXT: 
-      /* What to do?
-       */
-      break;
-   default:
-      return;
-   }
-
-   if (c.i != rmesa->hw.fog.cmd[FOG_C] || d.i != rmesa->hw.fog.cmd[FOG_D]) {
-      RADEON_STATECHANGE( rmesa, fog );
-      rmesa->hw.fog.cmd[FOG_C] = c.i;
-      rmesa->hw.fog.cmd[FOG_D] = d.i;
-   }
-}
-
-/* Examine lighting and texture state to determine if separate specular
- * should be enabled.
- */
-void radeonUpdateSpecular( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   GLuint p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
-
-   if (NEED_SECONDARY_COLOR(ctx)) {
-      p |=  RADEON_SPECULAR_ENABLE;
-   } else {
-      p &= ~RADEON_SPECULAR_ENABLE;
-   }
-
-   if ( rmesa->hw.ctx.cmd[CTX_PP_CNTL] != p ) {
-      RADEON_STATECHANGE( rmesa, ctx );
-      rmesa->hw.ctx.cmd[CTX_PP_CNTL] = p;
-   }
-
-   /* Bizzare: have to leave lighting enabled to get fog.
-    */
-   RADEON_STATECHANGE( rmesa, tcl );
-   if ((ctx->Light.Enabled &&
-	ctx->Light.Model.ColorControl == GL_SEPARATE_SPECULAR_COLOR)) {
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_SPECULAR;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE;
-   }
-   else if (ctx->Fog.Enabled) {
-      if (ctx->Light.Enabled) {
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_SPECULAR;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_DIFFUSE;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-	 rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE;
-      } else {
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_SPECULAR;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_DIFFUSE;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
-	 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-	 rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE;
-      }
-   }
-   else if (ctx->Light.Enabled) {
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_SPECULAR;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE;
-   } else if (ctx->Fog.ColorSumEnabled ) {
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_SPECULAR;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_LIGHTING_ENABLE;
-   } else {
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_SPECULAR;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC;
-      rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE;
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_LIGHTING_ENABLE;
-   }
-
-#if _HAVE_SWTNL
-   /* Update vertex/render formats
-    */
-   if (rmesa->TclFallback) { 
-      radeonChooseRenderState( ctx );
-      radeonChooseVertexState( ctx );
-   }
-#endif
-}
-
-
-
-static void radeonLightingSpaceChange( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   GLboolean tmp;
-   RADEON_STATECHANGE( rmesa, tcl );
-
-   if (RADEON_DEBUG & RADEON_STATE)
-      fprintf(stderr, "%s %d\n", __FUNCTION__, ctx->_NeedEyeCoords);
-
-   if (ctx->_NeedEyeCoords)
-      tmp = ctx->Transform.RescaleNormals;
-   else
-      tmp = !ctx->Transform.RescaleNormals;
-
-   if ( tmp ) {
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |=  RADEON_RESCALE_NORMALS;
-   } else {
-      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_RESCALE_NORMALS;
-   }
-}
-
-void radeonInitLightStateFuncs( GLcontext *ctx )
-{
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   int i;
-
-   ctx->Driver.LightModelfv		= radeonLightModelfv; 
-   ctx->Driver.Lightfv			= radeonLightfv; 
-   ctx->Driver.Fogfv			= radeonFogfv;
-   ctx->Driver.LightingSpaceChange      = radeonLightingSpaceChange;
-
-   for (i = 0 ; i < 8; i++) {
-      struct gl_light *l = &ctx->Light.Light[i];
-      GLenum p = GL_LIGHT0 + i;
-      *(float *)&(rmesa->hw.lit[i].cmd[LIT_RANGE_CUTOFF]) = FLT_MAX;
-
-      ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient );
-      ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse );
-      ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular );
-      ctx->Driver.Lightfv( ctx, p, GL_POSITION, 0 );
-      ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, 0 );
-      ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent );
-      ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff );
-      ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION,
-			   &l->ConstantAttenuation );
-      ctx->Driver.Lightfv( ctx, p, GL_LINEAR_ATTENUATION, 
-			   &l->LinearAttenuation );
-      ctx->Driver.Lightfv( ctx, p, GL_QUADRATIC_ATTENUATION, 
-		     &l->QuadraticAttenuation );
-   }
-
-   ctx->Driver.LightModelfv( ctx, GL_LIGHT_MODEL_AMBIENT, 
-			     ctx->Light.Model.Ambient );
-
-   ctx->Driver.Fogfv( ctx, GL_FOG_MODE, 0 );
-   ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density );
-   ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start );
-   ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End );
-   ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color );
-   ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, 0 );
-}
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 033f26db2a1..a1a523931fb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -177,6 +177,12 @@ static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_
 
 		for(face = 0; face < mt->faces; face++)
 			compute_tex_image_offset(rmesa, mt, face, level, &curOffset);
+		/* r600 cube levels seems to be aligned to 8 faces but
+		 * we have separate register for 1'st level offset so add
+		 * 2 image alignment after 1'st mip level */
+		if(rmesa->radeonScreen->chip_family >= CHIP_FAMILY_R600 &&
+		   mt->target == GL_TEXTURE_CUBE_MAP && level >= 1)
+			curOffset += 2 * mt->levels[level].size;
 	}
 
 	/* Note the required size in memory */
@@ -380,25 +386,6 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t)
 		texImg->Depth, t->tile_bits);
 }
 
-/* Although we use the image_offset[] array to store relative offsets
- * to cube faces, Mesa doesn't know anything about this and expects
- * each cube face to be treated as a separate image.
- *
- * These functions present that view to mesa:
- */
-void
-radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
-{
-	if (mt->target != GL_TEXTURE_3D || mt->faces == 1) {
-		offsets[0] = 0;
-	} else {
-		int i;
-		for (i = 0; i < 6; i++) {
-			offsets[i] = mt->levels[level].faces[i].offset;
-		}
-	}
-}
-
 GLuint
 radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 			    GLuint face, GLuint level)
@@ -619,4 +606,4 @@ uint32_t get_base_teximage_offset(radeonTexObj *texObj)
 	} else {
 		return radeon_miptree_image_offset(texObj->mt, 0, texObj->minLod);
 	}
-}
\ No newline at end of file
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index a10649b5aea..c911688c1a5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -88,7 +88,5 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
-void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
-
 uint32_t get_base_teximage_offset(radeonTexObj *texObj);
 #endif /* __RADEON_MIPMAP_TREE_H_ */
diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
index 98117cdfc14..d0dcf0e431a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c
+++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
@@ -65,7 +65,7 @@ static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
 
 			}
 			radeon_print(RADEON_STATE, RADEON_TRACE,
-				     "%d start: %lx, end: %lx %ld\n", i, start, end, end - start);
+				     "%d start: %llx, end: %llx %lld\n", i, start, end, end - start);
 		}
 	} else {
 		for (i = 0; i < query->curr_offset/sizeof(uint32_t); ++i) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 14163f13af4..882ee5c194b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -434,7 +434,7 @@ radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
 
 
 
-void radeonInitTextureFuncs( struct dd_function_table *functions )
+void radeonInitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions )
 {
    functions->ChooseTextureFormat	= radeonChooseTextureFormat_mesa;
    functions->TexImage1D		= radeonTexImage1D;
@@ -455,6 +455,11 @@ void radeonInitTextureFuncs( struct dd_function_table *functions )
    functions->CompressedTexImage2D	= radeonCompressedTexImage2D;
    functions->CompressedTexSubImage2D	= radeonCompressedTexSubImage2D;
 
+   if (radeon->radeonScreen->kernel_mm) {
+      functions->CopyTexImage2D = radeonCopyTexImage2D;
+      functions->CopyTexSubImage2D = radeonCopyTexSubImage2D;
+   }
+
    functions->GenerateMipmap = radeonGenerateMipmap;
 
    functions->NewTextureImage = radeonNewTextureImage;
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.h b/src/mesa/drivers/dri/radeon/radeon_tex.h
index a4aaddc74fa..0113ffd3dac 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.h
@@ -52,6 +52,6 @@ extern int radeonUploadTexImages( r100ContextPtr rmesa, radeonTexObjPtr t,
 
 extern void radeonDestroyTexObj( r100ContextPtr rmesa, radeonTexObjPtr t );
 
-extern void radeonInitTextureFuncs( struct dd_function_table *functions );
+extern void radeonInitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions );
 
 #endif /* __RADEON_TEX_H__ */
diff --git a/src/mesa/drivers/dri/r300/r300_texcopy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index ebc9c05b8a8..44e144c80f5 100644
--- a/src/mesa/drivers/dri/r300/r300_texcopy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -26,7 +26,7 @@
  */
 
 #include "radeon_common.h"
-#include "r300_context.h"
+#include "radeon_texture.h"
 
 #include "main/image.h"
 #include "main/teximage.h"
@@ -34,11 +34,8 @@
 #include "drivers/common/meta.h"
 
 #include "radeon_mipmap_tree.h"
-#include "r300_blit.h"
 #include <main/debug.h>
 
-// TODO:
-// need to pass correct pitch for small dst textures!
 static GLboolean
 do_copy_texsubimage(GLcontext *ctx,
                     GLenum target, GLint level,
@@ -48,13 +45,13 @@ do_copy_texsubimage(GLcontext *ctx,
                     GLint x, GLint y,
                     GLsizei width, GLsizei height)
 {
-    struct r300_context *r300 = R300_CONTEXT(ctx);
+    radeonContextPtr radeon = RADEON_CONTEXT(ctx);
     struct radeon_renderbuffer *rrb;
 
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
-        rrb = radeon_get_depthbuffer(&r300->radeon);
+        rrb = radeon_get_depthbuffer(radeon);
     } else {
-        rrb = radeon_get_colorbuffer(&r300->radeon);
+        rrb = radeon_get_colorbuffer(radeon);
     }
 
     if (!timg->mt) {
@@ -69,10 +66,6 @@ do_copy_texsubimage(GLcontext *ctx,
     intptr_t src_offset = rrb->draw_offset;
     intptr_t dst_offset = radeon_miptree_image_offset(timg->mt, _mesa_tex_target_to_face(target), level);
 
-    if (src_offset % 32 || dst_offset % 32) {
-        return GL_FALSE;
-    }
-
     if (0) {
         fprintf(stderr, "%s: copying to face %d, level %d\n",
                 __FUNCTION__, _mesa_tex_target_to_face(target), level);
@@ -84,18 +77,19 @@ do_copy_texsubimage(GLcontext *ctx,
     }
 
     /* blit from src buffer to texture */
-    return r300_blit(r300, rrb->bo, src_offset, rrb->base.Format, rrb->pitch/rrb->cpp,
-                     rrb->base.Width, rrb->base.Height, x, y,
-                     timg->mt->bo, dst_offset, timg->base.TexFormat,
-                     timg->base.Width, timg->base.Width, timg->base.Height,
-                     dstx, dsty, width, height, 1);
+    return radeon->vtbl.blit(ctx, rrb->bo, src_offset, rrb->base.Format, rrb->pitch/rrb->cpp,
+                             rrb->base.Width, rrb->base.Height, x, y,
+                             timg->mt->bo, dst_offset, timg->base.TexFormat,
+                             timg->mt->levels[level].rowstride / _mesa_get_format_bytes(timg->base.TexFormat),
+                             timg->base.Width, timg->base.Height,
+                             dstx, dsty, width, height, 1);
 }
 
-static void
-r300CopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
-                   GLenum internalFormat,
-                   GLint x, GLint y, GLsizei width, GLsizei height,
-                   GLint border)
+void
+radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
+                     GLenum internalFormat,
+                     GLint x, GLint y, GLsizei width, GLsizei height,
+                     GLint border)
 {
     struct gl_texture_unit *texUnit = _mesa_get_current_tex_unit(ctx);
     struct gl_texture_object *texObj =
@@ -139,11 +133,11 @@ fail:
                               width, height, border);
 }
 
-static void
-r300CopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
-                      GLint xoffset, GLint yoffset,
-                      GLint x, GLint y,
-                      GLsizei width, GLsizei height)
+void
+radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
+                        GLint xoffset, GLint yoffset,
+                        GLint x, GLint y,
+                        GLsizei width, GLsizei height)
 {
     struct gl_texture_unit *texUnit = _mesa_get_current_tex_unit(ctx);
     struct gl_texture_object *texObj = _mesa_select_tex_object(ctx, texUnit, target);
@@ -159,10 +153,3 @@ r300CopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
                                      xoffset, yoffset, x, y, width, height);
     }
 }
-
-
-void r300_init_texcopy_functions(struct dd_function_table *table)
-{
-    table->CopyTexImage2D = r300CopyTexImage2D;
-    table->CopyTexSubImage2D = r300CopyTexSubImage2D;
-}
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 03178116c1a..4538e74eea1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -197,21 +197,6 @@ void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
 	radeon_bo_unmap(t->mt->bo);
 }
 
-GLuint radeon_face_for_target(GLenum target)
-{
-	switch (target) {
-	case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
-	case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
-	case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
-	case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
-	case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
-	case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
-		return (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
-	default:
-		return 0;
-	}
-}
-
 /**
  * Wraps Mesa's implementation to ensure that the base level image is mapped.
  *
@@ -248,8 +233,15 @@ static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
 
 void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj)
 {
-	GLuint face = radeon_face_for_target(target);
+	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
+	struct radeon_bo *bo;
+	GLuint face = _mesa_tex_target_to_face(target);
 	radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[face][texObj->BaseLevel]);
+	bo = !baseimage->mt ? baseimage->bo : baseimage->mt->bo;
+
+	if (bo && radeon_bo_is_referenced_by_cs(bo, rmesa->cmdbuf.cs)) {
+		radeon_firevertices(rmesa);
+	}
 
 	radeon_teximage_map(baseimage, GL_FALSE);
 	radeon_generate_mipmap(ctx, target, texObj);
@@ -710,7 +702,7 @@ static void radeon_teximage(
 	radeon_texture_image* image = get_radeon_texture_image(texImage);
 	GLint postConvWidth = width;
 	GLint postConvHeight = height;
-	GLuint face = radeon_face_for_target(target);
+	GLuint face = _mesa_tex_target_to_face(target);
 
 	{
 		struct radeon_bo *bo;
@@ -863,7 +855,7 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
 
 	if (RADEON_DEBUG & RADEON_TEXTURE) {
 		fprintf(stderr, "radeon_texsubimage%dd: texObj %p, texImage %p, face %d, level %d\n",
-				dims, texObj, texImage, radeon_face_for_target(target), level);
+				dims, texObj, texImage, _mesa_tex_target_to_face(target), level);
 	}
 
 	t->validated = GL_FALSE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.h b/src/mesa/drivers/dri/radeon/radeon_texture.h
index 906daf12d0a..f09dd652142 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.h
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.h
@@ -44,7 +44,6 @@ void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj);
 void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj);
 void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj);
 int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj);
-GLuint radeon_face_for_target(GLenum target);
 
 gl_format radeonChooseTextureFormat_mesa(GLcontext * ctx,
                                          GLint internalFormat,
@@ -126,4 +125,14 @@ void radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
 				 struct gl_texture_object *texObj,
 				 struct gl_texture_image *texImage);
 
+void radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
+			GLenum internalFormat,
+			GLint x, GLint y, GLsizei width, GLsizei height,
+			GLint border);
+
+void radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
+			GLint xoffset, GLint yoffset,
+			GLint x, GLint y,
+			GLsizei width, GLsizei height);
+
 #endif
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_egl.c b/src/mesa/drivers/dri/radeon/server/radeon_egl.c
deleted file mode 100644
index c16d66e4ece..00000000000
--- a/src/mesa/drivers/dri/radeon/server/radeon_egl.c
+++ /dev/null
@@ -1,1088 +0,0 @@
-/*
- * EGL driver for radeon_dri.so
- */
-#include <assert.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dirent.h>
-#include <errno.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <sys/ioctl.h>
-#include <sys/mman.h>
-
-#include "eglconfig.h"
-#include "eglcontext.h"
-#include "egldisplay.h"
-#include "egldriver.h"
-#include "eglglobals.h"
-#include "egllog.h"
-#include "eglmode.h"
-#include "eglscreen.h"
-#include "eglsurface.h"
-#include "egldri.h"
-
-#include "mtypes.h"
-#include "memops.h"
-#include "drm.h"
-#include "drm_sarea.h"
-#include "radeon_drm.h"
-#include "radeon_dri.h"
-#include "radeon.h"
-
-static size_t radeon_drm_page_size;
-
-/**
- * radeon driver-specific driver class derived from _EGLDriver
- */
-typedef struct radeon_driver
-{
-   _EGLDriver Base;  /* base class/object */
-   GLuint radeonStuff;
-} radeonDriver;
-
-static int
-RADEONSetParam(driDisplay  *disp, int param, int value)
-{
-   drm_radeon_setparam_t sp;
-   int ret;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if ((ret=drmCommandWrite(disp->drmFD, DRM_RADEON_SETPARAM, &sp, sizeof(sp)))) {
-     fprintf(stderr,"Set param failed\n", ret);
-      return -1;
-   }
-
-   return 0;
-}
-
-static int
-RADEONCheckDRMVersion(driDisplay *disp, RADEONInfoPtr info)
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(disp->drmFD);
-   if (version) {
-      int req_minor, req_patch;
-
-      /* Need 1.21.x for card type detection getparam
-       */
-      req_minor = 21;
-      req_patch = 0;
-
-      if (version->version_major != 1 ||
-          version->version_minor < req_minor ||
-          (version->version_minor == req_minor &&
-           version->version_patchlevel < req_patch)) {
-         /* Incompatible drm version */
-         fprintf(stderr,
-                 "[dri] RADEONDRIScreenInit failed because of a version "
-                 "mismatch.\n"
-                 "[dri] radeon.o kernel module version is %d.%d.%d "
-                 "but version 1.%d.%d or newer is needed.\n"
-                 "[dri] Disabling DRI.\n",
-                 version->version_major,
-                 version->version_minor,
-                 version->version_patchlevel,
-                 req_minor,
-                 req_patch);
-         drmFreeVersion(version);
-         return 0;
-      }
-
-      info->drmMinor = version->version_minor;
-      drmFreeVersion(version);
-   }
-
-   return 1;
-}
-
-
-/**
- * \brief Compute base 2 logarithm.
- *
- * \param val value.
- *
- * \return base 2 logarithm of \p val.
- */
-static int RADEONMinBits(int val)
-{
-   int  bits;
-
-   if (!val) return 1;
-   for (bits = 0; val; val >>= 1, ++bits);
-   return bits;
-}
-
-
-/* Initialize the PCI GART state.  Request memory for use in PCI space,
- * and initialize the Radeon registers to point to that memory.
- */
-static int RADEONDRIPciInit(driDisplay *disp, RADEONInfoPtr info)
-{
-    int  ret;
-    int  flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;
-    int            s, l;
-
-    ret = drmScatterGatherAlloc(disp->drmFD, info->gartSize*1024*1024,
-                                &info->gartMemHandle);
-    if (ret < 0) {
-        fprintf(stderr, "[pci] Out of memory (%d)\n", ret);
-        return 0;
-    }
-    fprintf(stderr,
-               "[pci] %d kB allocated with handle 0x%04lx\n",
-            info->gartSize*1024, (long) info->gartMemHandle);
-
-   info->gartOffset = 0;
-
-   /* Initialize the CP ring buffer data */
-   info->ringStart       = info->gartOffset;
-   info->ringMapSize     = info->ringSize*1024*1024 + radeon_drm_page_size;
-
-   info->ringReadOffset  = info->ringStart + info->ringMapSize;
-   info->ringReadMapSize = radeon_drm_page_size;
-
-   /* Reserve space for vertex/indirect buffers */
-   info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-   info->bufMapSize      = info->bufSize*1024*1024;
-
-   /* Reserve the rest for AGP textures */
-   info->gartTexStart     = info->bufStart + info->bufMapSize;
-   s = (info->gartSize*1024*1024 - info->gartTexStart);
-   l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-   info->gartTexMapSize   = (s >> l) << l;
-   info->log2GARTTexGran  = l;
-
-    if (drmAddMap(disp->drmFD, info->ringStart, info->ringMapSize,
-                  DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {
-        fprintf(stderr,
-                   "[pci] Could not add ring mapping\n");
-        return 0;
-    }
-    fprintf(stderr,
-               "[pci] ring handle = 0x%08lx\n", info->ringHandle);
-
-    if (drmAddMap(disp->drmFD, info->ringReadOffset, info->ringReadMapSize,
-                  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
-        fprintf(stderr,
-                   "[pci] Could not add ring read ptr mapping\n");
-        return 0;
-    }
-    fprintf(stderr,
-               "[pci] ring read ptr handle = 0x%08lx\n",
-               info->ringReadPtrHandle);
-
-    if (drmAddMap(disp->drmFD, info->bufStart, info->bufMapSize,
-                  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
-        fprintf(stderr,
-                   "[pci] Could not add vertex/indirect buffers mapping\n");
-        return 0;
-    }
-    fprintf(stderr,
-               "[pci] vertex/indirect buffers handle = 0x%08lx\n",
-               info->bufHandle);
-
-    if (drmAddMap(disp->drmFD, info->gartTexStart, info->gartTexMapSize,
-                  DRM_SCATTER_GATHER, 0, &info->gartTexHandle) < 0) {
-        fprintf(stderr,
-                   "[pci] Could not add GART texture map mapping\n");
-        return 0;
-    }
-    fprintf(stderr,
-               "[pci] GART texture map handle = 0x%08lx\n",
-               info->gartTexHandle);
-
-    return 1;
-}
-
-
-/**
- * \brief Initialize the AGP state
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- *
- * Acquires and enables the AGP device. Reserves memory in the AGP space for
- * the ring buffer, vertex buffers and textures. Initialize the Radeon
- * registers to point to that memory and add client mappings.
- */
-static int RADEONDRIAgpInit( driDisplay *disp, RADEONInfoPtr info)
-{
-   int            mode, ret;
-   int            s, l;
-   int agpmode = 1;
-
-   if (drmAgpAcquire(disp->drmFD) < 0) {
-      fprintf(stderr, "[gart] AGP not available\n");
-      return 0;
-   }
-
-   mode = drmAgpGetMode(disp->drmFD);	/* Default mode */
-   /* Disable fast write entirely - too many lockups.
-    */
-   mode &= ~RADEON_AGP_MODE_MASK;
-   switch (agpmode) {
-   case 4:          mode |= RADEON_AGP_4X_MODE;
-   case 2:          mode |= RADEON_AGP_2X_MODE;
-   case 1: default: mode |= RADEON_AGP_1X_MODE;
-   }
-
-   if (drmAgpEnable(disp->drmFD, mode) < 0) {
-      fprintf(stderr, "[gart] AGP not enabled\n");
-      drmAgpRelease(disp->drmFD);
-      return 0;
-   }
-
-#if 0
-   /* Workaround for some hardware bugs */
-   if (info->ChipFamily < CHIP_FAMILY_R200)
-      OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0000);
-#endif
-   info->gartOffset = 0;
-
-   if ((ret = drmAgpAlloc(disp->drmFD, info->gartSize*1024*1024, 0, NULL,
-                          &info->gartMemHandle)) < 0) {
-      fprintf(stderr, "[gart] Out of memory (%d)\n", ret);
-      drmAgpRelease(disp->drmFD);
-      return 0;
-   }
-   fprintf(stderr,
-           "[gart] %d kB allocated with handle 0x%08x\n",
-           info->gartSize*1024, (unsigned)info->gartMemHandle);
-
-   if (drmAgpBind(disp->drmFD,
-                  info->gartMemHandle, info->gartOffset) < 0) {
-      fprintf(stderr, "[gart] Could not bind\n");
-      drmAgpFree(disp->drmFD, info->gartMemHandle);
-      drmAgpRelease(disp->drmFD);
-      return 0;
-   }
-
-   /* Initialize the CP ring buffer data */
-   info->ringStart       = info->gartOffset;
-   info->ringMapSize     = info->ringSize*1024*1024 + radeon_drm_page_size;
-
-   info->ringReadOffset  = info->ringStart + info->ringMapSize;
-   info->ringReadMapSize = radeon_drm_page_size;
-
-   /* Reserve space for vertex/indirect buffers */
-   info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-   info->bufMapSize      = info->bufSize*1024*1024;
-
-   /* Reserve the rest for AGP textures */
-   info->gartTexStart     = info->bufStart + info->bufMapSize;
-   s = (info->gartSize*1024*1024 - info->gartTexStart);
-   l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-   info->gartTexMapSize   = (s >> l) << l;
-   info->log2GARTTexGran  = l;
-
-   if (drmAddMap(disp->drmFD, info->ringStart, info->ringMapSize,
-                 DRM_AGP, DRM_READ_ONLY, &info->ringHandle) < 0) {
-      fprintf(stderr, "[gart] Could not add ring mapping\n");
-      return 0;
-   }
-   fprintf(stderr, "[gart] ring handle = 0x%08lx\n", info->ringHandle);
-
-
-   if (drmAddMap(disp->drmFD, info->ringReadOffset, info->ringReadMapSize,
-                 DRM_AGP, DRM_READ_ONLY, &info->ringReadPtrHandle) < 0) {
-      fprintf(stderr,
-              "[gart] Could not add ring read ptr mapping\n");
-      return 0;
-   }
-
-   fprintf(stderr,
-           "[gart] ring read ptr handle = 0x%08lx\n",
-           info->ringReadPtrHandle);
-
-   if (drmAddMap(disp->drmFD, info->bufStart, info->bufMapSize,
-                 DRM_AGP, 0, &info->bufHandle) < 0) {
-      fprintf(stderr,
-              "[gart] Could not add vertex/indirect buffers mapping\n");
-      return 0;
-   }
-   fprintf(stderr,
-           "[gart] vertex/indirect buffers handle = 0x%08lx\n",
-           info->bufHandle);
-
-   if (drmAddMap(disp->drmFD, info->gartTexStart, info->gartTexMapSize,
-                 DRM_AGP, 0, &info->gartTexHandle) < 0) {
-      fprintf(stderr,
-              "[gart] Could not add AGP texture map mapping\n");
-      return 0;
-   }
-   fprintf(stderr,
-           "[gart] AGP texture map handle = 0x%08lx\n",
-           info->gartTexHandle);
-
-   return 1;
-}
-
-
-/**
- * Initialize all the memory-related fields of the RADEONInfo object.
- * This includes the various 'offset' and 'size' fields.
- */
-static int
-RADEONMemoryInit(driDisplay *disp, RADEONInfoPtr info)
-{
-   int        width_bytes = disp->virtualWidth * disp->cpp;
-   int        cpp         = disp->cpp;
-   int        bufferSize  = ((disp->virtualHeight * width_bytes
-                              + RADEON_BUFFER_ALIGN)
-                             & ~RADEON_BUFFER_ALIGN);
-   int        depthSize   = ((((disp->virtualHeight+15) & ~15) * width_bytes
-                              + RADEON_BUFFER_ALIGN)
-                             & ~RADEON_BUFFER_ALIGN);
-   int        l;
-   int        pcie_gart_table_size = 0;
-
-   info->frontOffset = 0;
-   info->frontPitch = disp->virtualWidth;
-
-   if (disp->card_type==RADEON_CARD_PCIE)
-     pcie_gart_table_size  = RADEON_PCIGART_TABLE_SIZE;
-
-   /* Front, back and depth buffers - everything else texture??
-    */
-   info->textureSize = disp->fbSize - pcie_gart_table_size - 2 * bufferSize - depthSize;
-
-   if (info->textureSize < 0)
-      return 0;
-
-   l = RADEONMinBits((info->textureSize-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-
-   /* Round the texture size up to the nearest whole number of
-    * texture regions.  Again, be greedy about this, don't
-    * round down.
-    */
-   info->log2TexGran = l;
-   info->textureSize = (info->textureSize >> l) << l;
-
-   /* Set a minimum usable local texture heap size.  This will fit
-    * two 256x256x32bpp textures.
-    */
-   if (info->textureSize < 512 * 1024) {
-      info->textureOffset = 0;
-      info->textureSize = 0;
-   }
-
-   /* Reserve space for textures */
-   info->textureOffset = ((disp->fbSize - pcie_gart_table_size - info->textureSize +
-                           RADEON_BUFFER_ALIGN) &
-                          ~RADEON_BUFFER_ALIGN);
-
-   /* Reserve space for the shared depth
-    * buffer.
-    */
-   info->depthOffset = ((info->textureOffset - depthSize +
-                         RADEON_BUFFER_ALIGN) &
-                        ~RADEON_BUFFER_ALIGN);
-   info->depthPitch = disp->virtualWidth;
-
-   info->backOffset = ((info->depthOffset - bufferSize +
-                        RADEON_BUFFER_ALIGN) &
-                       ~RADEON_BUFFER_ALIGN);
-   info->backPitch = disp->virtualWidth;
-
-   if (pcie_gart_table_size)
-     info->pcieGartTableOffset = disp->fbSize - pcie_gart_table_size;
-
-   fprintf(stderr,
-           "Will use back buffer at offset 0x%x, pitch %d\n",
-           info->backOffset, info->backPitch);
-   fprintf(stderr,
-           "Will use depth buffer at offset 0x%x, pitch %d\n",
-           info->depthOffset, info->depthPitch);
-   fprintf(stderr,
-           "Will use %d kb for textures at offset 0x%x\n",
-           info->textureSize/1024, info->textureOffset);
-   if (pcie_gart_table_size)
-   { 
-     fprintf(stderr,
-	     "Will use %d kb for PCIE GART Table at offset 0x%x\n",
-	     pcie_gart_table_size/1024, info->pcieGartTableOffset);
-   }
-
-   /* XXX I don't think these are needed. */
-#if 0
-   info->frontPitchOffset = (((info->frontPitch * cpp / 64) << 22) |
-                             (info->frontOffset >> 10));
-
-   info->backPitchOffset = (((info->backPitch * cpp / 64) << 22) |
-                            (info->backOffset >> 10));
-
-   info->depthPitchOffset = (((info->depthPitch * cpp / 64) << 22) |
-                             (info->depthOffset >> 10));
-#endif
-
-   if (pcie_gart_table_size)
-     RADEONSetParam(disp, RADEON_SETPARAM_PCIGART_LOCATION, info->pcieGartTableOffset);
-
-   return 1;
-}
-
-
-/**
- * \brief Initialize the kernel data structures and enable the CP engine.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * This function is a wrapper around the DRM_RADEON_CP_INIT command, passing
- * all the parameters in a drm_radeon_init_t structure.
- */
-static int RADEONDRIKernelInit( driDisplay *disp,
-                               RADEONInfoPtr info)
-{
-   int cpp = disp->bpp / 8;
-   drm_radeon_init_t  drmInfo;
-   int ret;
-
-   memset(&drmInfo, 0, sizeof(drmInfo));
-
-   if ( (info->ChipFamily >= CHIP_FAMILY_R300) )
-      drmInfo.func            = RADEON_INIT_R300_CP;
-   else if ( (info->ChipFamily == CHIP_FAMILY_R200) ||
-        (info->ChipFamily == CHIP_FAMILY_RV250) ||
-        (info->ChipFamily == CHIP_FAMILY_M9) ||
-        (info->ChipFamily == CHIP_FAMILY_RV280) )
-      drmInfo.func             = RADEON_INIT_R200_CP;
-   else
-      drmInfo.func             = RADEON_INIT_CP;
-
-   /* This is the struct passed to the kernel module for its initialization */
-   /* XXX problem here:
-    * The front/back/depth_offset/pitch fields may change depending upon
-    * which drawing surface we're using!!!  They can't be set just once
-    * during initialization.
-    * Looks like we'll need a new ioctl to update these fields for drawing
-    * to other surfaces...
-    */
-   drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
-   drmInfo.cp_mode             = RADEON_DEFAULT_CP_BM_MODE;
-   drmInfo.gart_size            = info->gartSize*1024*1024;
-   drmInfo.ring_size           = info->ringSize*1024*1024;
-   drmInfo.usec_timeout        = 1000;
-   drmInfo.fb_bpp              = disp->bpp;
-   drmInfo.depth_bpp           = disp->bpp;
-   drmInfo.front_offset        = info->frontOffset;
-   drmInfo.front_pitch         = info->frontPitch * cpp;
-   drmInfo.back_offset         = info->backOffset;
-   drmInfo.back_pitch          = info->backPitch * cpp;
-   drmInfo.depth_offset        = info->depthOffset;
-   drmInfo.depth_pitch         = info->depthPitch * cpp;
-   drmInfo.ring_offset         = info->ringHandle;
-   drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;
-   drmInfo.buffers_offset      = info->bufHandle;
-   drmInfo.gart_textures_offset = info->gartTexHandle;
-
-   ret = drmCommandWrite(disp->drmFD, DRM_RADEON_CP_INIT, &drmInfo,
-                         sizeof(drm_radeon_init_t));
-
-   return ret >= 0;
-}
-
-
-/**
- * \brief Add a map for the vertex buffers that will be accessed by any
- * DRI-based clients.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- *
- * Calls drmAddBufs() with the previously allocated vertex buffers.
- */
-static int RADEONDRIBufInit( driDisplay *disp, RADEONInfoPtr info )
-{
-   /* Initialize vertex buffers */
-   info->bufNumBufs = drmAddBufs(disp->drmFD,
-                                 info->bufMapSize / RADEON_BUFFER_SIZE,
-                                 RADEON_BUFFER_SIZE,
-				 (disp->card_type!=RADEON_CARD_AGP) ? DRM_SG_BUFFER : DRM_AGP_BUFFER,
-                                 info->bufStart);
-
-   if (info->bufNumBufs <= 0) {
-      fprintf(stderr,
-              "[drm] Could not create vertex/indirect buffers list\n");
-      return 0;
-   }
-   fprintf(stderr,
-           "[drm] Added %d %d byte vertex/indirect buffers\n",
-           info->bufNumBufs, RADEON_BUFFER_SIZE);
-
-   return 1;
-}
-
-
-/**
- * \brief Install an IRQ handler.
- *
- * \param disp display handle.
- * \param info driver private data.
- *
- * Attempts to install an IRQ handler via drmCtlInstHandler(), falling back to
- * IRQ-free operation on failure.
- */
-static void RADEONDRIIrqInit(driDisplay *disp, RADEONInfoPtr info)
-{
-   if ((drmCtlInstHandler(disp->drmFD, 0)) != 0)
-      fprintf(stderr, "[drm] failure adding irq handler, "
-                 "there is a device already using that irq\n"
-                 "[drm] falling back to irq-free operation\n");
-}
-
-
-/**
- * \brief Initialize the AGP heap.
- *
- * \param disp display handle.
- * \param info driver private data.
- *
- * This function is a wrapper around the DRM_RADEON_INIT_HEAP command, passing
- * all the parameters in a drm_radeon_mem_init_heap structure.
- */
-static void RADEONDRIAgpHeapInit(driDisplay *disp,
-                                 RADEONInfoPtr info)
-{
-   drm_radeon_mem_init_heap_t drmHeap;
-
-   /* Start up the simple memory manager for gart space */
-   drmHeap.region = RADEON_MEM_REGION_GART;
-   drmHeap.start  = 0;
-   drmHeap.size   = info->gartTexMapSize;
-
-   if (drmCommandWrite(disp->drmFD, DRM_RADEON_INIT_HEAP,
-                       &drmHeap, sizeof(drmHeap))) {
-      fprintf(stderr,
-              "[drm] Failed to initialized gart heap manager\n");
-   } else {
-      fprintf(stderr,
-              "[drm] Initialized kernel gart heap manager, %d\n",
-              info->gartTexMapSize);
-   }
-}
-
-static int RADEONGetCardType(driDisplay *disp, RADEONInfoPtr info)
-{
-   drm_radeon_getparam_t gp;  
-   int ret;
- 
-   gp.param = RADEON_PARAM_CARD_TYPE;
-   gp.value = &disp->card_type;
-
-   ret=drmCommandWriteRead(disp->drmFD, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
-   if (ret) {
-     fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_CARD_TYPE) : %d\n", ret);
-     return -1;
-   }
-
-   return disp->card_type;
-}
-
-/**
- * Called at the start of each server generation.
- *
- * \param disp display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * Performs static frame buffer allocation. Opens the DRM device and add maps
- * to the SAREA, framebuffer and MMIO regions. Fills in \p info with more
- * information. Creates a \e server context to grab the lock for the
- * initialization ioctls and calls the other initilization functions in this
- * file. Starts the CP engine via the DRM_RADEON_CP_START command.
- *
- * Setups a RADEONDRIRec structure to be passed to radeon_dri.so for its
- * initialization.
- */
-static int
-RADEONScreenInit( driDisplay *disp, RADEONInfoPtr info,
-                  RADEONDRIPtr pRADEONDRI)
-{
-   int i, err;
-
-   /* XXX this probably isn't needed here */
-   {
-      int  width_bytes = (disp->virtualWidth * disp->cpp);
-      int  maxy        = disp->fbSize / width_bytes;
-
-      if (maxy <= disp->virtualHeight * 3) {
-         _eglLog(_EGL_WARNING,
-                 "Static buffer allocation failed -- "
-                 "need at least %d kB video memory (have %d kB)\n",
-                 (disp->virtualWidth * disp->virtualHeight *
-                  disp->cpp * 3 + 1023) / 1024,
-                 disp->fbSize / 1024);
-         return 0;
-      }
-   }
-
-   /* Memory manager setup */
-   if (!RADEONMemoryInit(disp, info)) {
-      return 0;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(disp->drmFD, &disp->serverContext)) != 0) {
-      _eglLog(_EGL_WARNING, "%s: drmCreateContext failed %d\n",
-              __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(disp->drmFD, disp->pSAREA, disp->serverContext, 0);
-
-   /* Initialize the kernel data structures */
-   if (!RADEONDRIKernelInit(disp, info)) {
-      _eglLog(_EGL_WARNING, "RADEONDRIKernelInit failed\n");
-      DRM_UNLOCK(disp->drmFD, disp->pSAREA, disp->serverContext);
-      return 0;
-   }
-
-   /* Initialize the vertex buffers list */
-   if (!RADEONDRIBufInit(disp, info)) {
-      fprintf(stderr, "RADEONDRIBufInit failed\n");
-      DRM_UNLOCK(disp->drmFD, disp->pSAREA, disp->serverContext);
-      return 0;
-   }
-
-   /* Initialize IRQ */
-   RADEONDRIIrqInit(disp, info);
-
-   /* Initialize kernel gart memory manager */
-   RADEONDRIAgpHeapInit(disp, info);
-
-   /* Initialize the SAREA private data structure */
-   {
-      drm_radeon_sarea_t *pSAREAPriv;
-      pSAREAPriv = (drm_radeon_sarea_t *)(((char*)disp->pSAREA) +
-                                        sizeof(drm_sarea_t));
-      memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-      pSAREAPriv->pfState = info->page_flip_enable;
-   }
-
-   for ( i = 0;; i++ ) {
-      drmMapType type;
-      drmMapFlags flags;
-      drm_handle_t handle, offset;
-      drmSize size;
-      int rc, mtrr;
-
-      if ( ( rc = drmGetMap( disp->drmFD, i, &offset, &size, &type, &flags, &handle, &mtrr ) ) != 0 )
-         break;
-      if ( type == DRM_REGISTERS ) {
-         pRADEONDRI->registerHandle = offset;
-         pRADEONDRI->registerSize = size;
-         break;
-      }
-   }
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   drimemsetio((char *)disp->pFB + info->frontOffset,
-          0xEE,
-          info->frontPitch * disp->cpp * disp->virtualHeight );
-
-   drimemsetio((char *)disp->pFB + info->backOffset,
-          0x30,
-          info->backPitch * disp->cpp * disp->virtualHeight );
-
-
-   /* This is the struct passed to radeon_dri.so for its initialization */
-   pRADEONDRI->deviceID          = info->Chipset;
-   pRADEONDRI->width             = disp->virtualWidth;
-   pRADEONDRI->height            = disp->virtualHeight;
-   pRADEONDRI->depth             = disp->bpp; /* XXX: depth */
-   pRADEONDRI->bpp               = disp->bpp;
-   pRADEONDRI->IsPCI             = (disp->card_type != RADEON_CARD_AGP);;
-   pRADEONDRI->frontOffset       = info->frontOffset;
-   pRADEONDRI->frontPitch        = info->frontPitch;
-   pRADEONDRI->backOffset        = info->backOffset;
-   pRADEONDRI->backPitch         = info->backPitch;
-   pRADEONDRI->depthOffset       = info->depthOffset;
-   pRADEONDRI->depthPitch        = info->depthPitch;
-   pRADEONDRI->textureOffset     = info->textureOffset;
-   pRADEONDRI->textureSize       = info->textureSize;
-   pRADEONDRI->log2TexGran       = info->log2TexGran;
-   pRADEONDRI->statusHandle      = info->ringReadPtrHandle;
-   pRADEONDRI->statusSize        = info->ringReadMapSize;
-   pRADEONDRI->gartTexHandle      = info->gartTexHandle;
-   pRADEONDRI->gartTexMapSize     = info->gartTexMapSize;
-   pRADEONDRI->log2GARTTexGran    = info->log2GARTTexGran;
-   pRADEONDRI->gartTexOffset      = info->gartTexStart;
-   pRADEONDRI->sarea_priv_offset = sizeof(drm_sarea_t);
-
-   /* Don't release the lock now - let the VT switch handler do it. */
-
-   return 1;
-}
-
-
-/**
- * \brief Get Radeon chip family from chipset number.
- *
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * Called by radeonInitFBDev() to set RADEONInfoRec::ChipFamily
- * according to the value of RADEONInfoRec::Chipset.  Fails if the
- * chipset is unrecognized or not appropriate for this driver (i.e., not
- * an r100 style radeon)
- */
-static int get_chipfamily_from_chipset( RADEONInfoPtr info )
-{
-    switch (info->Chipset) {
-    case PCI_CHIP_RADEON_LY:
-    case PCI_CHIP_RADEON_LZ:
-        info->ChipFamily = CHIP_FAMILY_M6;
-        break;
-
-    case PCI_CHIP_RADEON_QY:
-    case PCI_CHIP_RADEON_QZ:
-        info->ChipFamily = CHIP_FAMILY_VE;
-        break;
-
-    case PCI_CHIP_R200_QL:
-    case PCI_CHIP_R200_QN:
-    case PCI_CHIP_R200_QO:
-    case PCI_CHIP_R200_Ql:
-    case PCI_CHIP_R200_BB:
-        info->ChipFamily = CHIP_FAMILY_R200;
-        break;
-
-    case PCI_CHIP_RV200_QW: /* RV200 desktop */
-    case PCI_CHIP_RV200_QX:
-        info->ChipFamily = CHIP_FAMILY_RV200;
-        break;
-
-    case PCI_CHIP_RADEON_LW:
-    case PCI_CHIP_RADEON_LX:
-        info->ChipFamily = CHIP_FAMILY_M7;
-        break;
-
-    case PCI_CHIP_RV250_Id:
-    case PCI_CHIP_RV250_Ie:
-    case PCI_CHIP_RV250_If:
-    case PCI_CHIP_RV250_Ig:
-        info->ChipFamily = CHIP_FAMILY_RV250;
-        break;
-
-    case PCI_CHIP_RV250_Ld:
-    case PCI_CHIP_RV250_Le:
-    case PCI_CHIP_RV250_Lf:
-    case PCI_CHIP_RV250_Lg:
-        info->ChipFamily = CHIP_FAMILY_M9;
-        break;
-
-    case PCI_CHIP_RV280_Y_:
-    case PCI_CHIP_RV280_Ya:
-    case PCI_CHIP_RV280_Yb:
-    case PCI_CHIP_RV280_Yc:
-        info->ChipFamily = CHIP_FAMILY_RV280;
-        break;
-
-    case PCI_CHIP_R300_ND:
-    case PCI_CHIP_R300_NE:
-    case PCI_CHIP_R300_NF:
-    case PCI_CHIP_R300_NG:
-        info->ChipFamily = CHIP_FAMILY_R300;
-        break;
-
-    case PCI_CHIP_RV370_5460:
-        info->ChipFamily = CHIP_FAMILY_RV380;
-	break;
-
-    default:
-        /* Original Radeon/7200 */
-        info->ChipFamily = CHIP_FAMILY_RADEON;
-    }
-
-    return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param disp display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p disp
- * and then calls RADEONScreenInit() for the screen initialization.
- *
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int radeonInitFBDev( driDisplay *disp, RADEONDRIPtr pRADEONDRI )
-{
-   int err;
-   RADEONInfoPtr info = calloc(1, sizeof(*info));
-
-   disp->driverPrivate = (void *)info;
-
-   info->gartFastWrite  = RADEON_DEFAULT_AGP_FAST_WRITE;
-   info->gartSize       = RADEON_DEFAULT_AGP_SIZE;
-   info->gartTexSize    = RADEON_DEFAULT_AGP_TEX_SIZE;
-   info->bufSize       = RADEON_DEFAULT_BUFFER_SIZE;
-   info->ringSize      = RADEON_DEFAULT_RING_SIZE;
-   info->page_flip_enable = RADEON_DEFAULT_PAGE_FLIP;
-
-   fprintf(stderr,
-           "Using %d MB AGP aperture\n", info->gartSize);
-   fprintf(stderr,
-           "Using %d MB for the ring buffer\n", info->ringSize);
-   fprintf(stderr,
-           "Using %d MB for vertex/indirect buffers\n", info->bufSize);
-   fprintf(stderr,
-           "Using %d MB for AGP textures\n", info->gartTexSize);
-   fprintf(stderr,
-           "page flipping %sabled\n", info->page_flip_enable?"en":"dis");
-
-   info->Chipset = disp->chipset;
-
-   if (!get_chipfamily_from_chipset( info )) {
-      fprintf(stderr, "Unknown or non-radeon chipset -- cannot continue\n");
-      fprintf(stderr, "==> Verify PCI BusID is correct in miniglx.conf\n");
-      return 0;
-   }
-#if 0
-   if (info->ChipFamily >= CHIP_FAMILY_R300) {
-      fprintf(stderr,
-              "Direct rendering not yet supported on "
-              "Radeon 9700 and newer cards\n");
-      return 0;
-   }
-#endif
-
-#if 00
-   /* don't seem to need this here */
-   info->frontPitch = disp->virtualWidth;
-#endif
-
-   /* Check the radeon DRM version */
-   if (!RADEONCheckDRMVersion(disp, info)) {
-      return 0;
-   }
-
-   if (RADEONGetCardType(disp, info)<0)
-      return 0;
-
-   if (disp->card_type!=RADEON_CARD_AGP) {
-      /* Initialize PCI */
-      if (!RADEONDRIPciInit(disp, info))
-         return 0;
-   }
-   else {
-      /* Initialize AGP */
-      if (!RADEONDRIAgpInit(disp, info))
-         return 0;
-   }
-
-   if (!RADEONScreenInit( disp, info, pRADEONDRI))
-      return 0;
-
-   /* Initialize and start the CP if required */
-   if ((err = drmCommandNone(disp->drmFD, DRM_RADEON_CP_START)) != 0) {
-      fprintf(stderr, "%s: CP start %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   return 1;
-}
-
-
-/**
- * Create list of all supported surface configs, attach list to the display.
- */
-static EGLBoolean
-radeonFillInConfigs(_EGLDisplay *disp, unsigned pixel_bits,
-                    unsigned depth_bits,
-                    unsigned stencil_bits, GLboolean have_back_buffer)
-{
-   _EGLConfig *configs;
-   _EGLConfig *c;
-   unsigned int i, num_configs;
-   unsigned int depth_buffer_factor;
-   unsigned int back_buffer_factor;
-   GLenum fb_format;
-   GLenum fb_type;
-
-   /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
-   * enough to add support.  Basically, if a context is created with an
-   * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
-   * will never be used.
-   */
-   static const GLenum back_buffer_modes[] = {
-            GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
-         };
-
-   uint8_t depth_bits_array[2];
-   uint8_t stencil_bits_array[2];
-
-   depth_bits_array[0] = depth_bits;
-   depth_bits_array[1] = depth_bits;
-
-   /* Just like with the accumulation buffer, always provide some modes
-   * with a stencil buffer.  It will be a sw fallback, but some apps won't
-   * care about that.
-   */
-   stencil_bits_array[0] = 0;
-   stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
-
-   depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
-   back_buffer_factor = (have_back_buffer) ? 2 : 1;
-
-   num_configs = depth_buffer_factor * back_buffer_factor * 2;
-
-   if (pixel_bits == 16) {
-      fb_format = GL_RGB;
-      fb_type = GL_UNSIGNED_SHORT_5_6_5;
-   } else {
-      fb_format = GL_RGBA;
-      fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
-   }
-
-   configs = calloc(sizeof(*configs), num_configs);
-   c = configs;
-   if (!_eglFillInConfigs(c, fb_format, fb_type,
-                          depth_bits_array, stencil_bits_array,
-                          depth_buffer_factor,
-                          back_buffer_modes, back_buffer_factor,
-                          GLX_TRUE_COLOR)) {
-      fprintf(stderr, "[%s:%u] Error creating FBConfig!\n",
-               __func__, __LINE__);
-      return EGL_FALSE;
-   }
-
-   /* Mark the visual as slow if there are "fake" stencil bits.
-   */
-   for (i = 0, c = configs; i < num_configs; i++, c++) {
-      int stencil = GET_CONFIG_ATTRIB(c, EGL_STENCIL_SIZE);
-      if ((stencil != 0)  && (stencil != stencil_bits)) {
-         SET_CONFIG_ATTRIB(c, EGL_CONFIG_CAVEAT, EGL_SLOW_CONFIG);
-      }
-   }
-
-   for (i = 0, c = configs; i < num_configs; i++, c++)
-      _eglAddConfig(disp, c);
-
-   free(configs);
-
-   return EGL_TRUE;
-}
-
-
-/**
- * Show the given surface on the named screen.
- * If surface is EGL_NO_SURFACE, disable the screen's output.
- */
-static EGLBoolean
-radeonShowScreenSurfaceMESA(_EGLDriver *drv, EGLDisplay dpy, EGLScreenMESA screen,
-                      EGLSurface surface, EGLModeMESA m)
-{
-   EGLBoolean b = _eglDRIShowScreenSurfaceMESA(drv, dpy, screen, surface, m);
-   return b;
-}
-
-
-/**
- * Called via eglInitialize() by user.
- */
-static EGLBoolean
-radeonInitialize(_EGLDriver *drv, EGLDisplay dpy, EGLint *major, EGLint *minor)
-{
-   __DRIframebuffer framebuffer;
-   driDisplay *display;
-
-   /* one-time init */
-   radeon_drm_page_size = getpagesize();
-
-   if (!_eglDRIInitialize(drv, dpy, major, minor))
-      return EGL_FALSE;
-
-   display = Lookup_driDisplay(dpy);
-
-   framebuffer.dev_priv_size = sizeof(RADEONDRIRec);
-   framebuffer.dev_priv = malloc(sizeof(RADEONDRIRec));
-
-   /* XXX we shouldn't hard-code values here! */
-   /* we won't know the screen surface size until the user calls
-    * eglCreateScreenSurfaceMESA().
-    */
-#if 0
-   display->virtualWidth = 1024;
-   display->virtualHeight = 768;
-#else
-   display->virtualWidth = 1280;
-   display->virtualHeight = 1024;
-#endif
-   display->bpp = 32;
-   display->cpp = 4;
-
-   if (!_eglDRIGetDisplayInfo(display))
-      return EGL_FALSE;
-
-   framebuffer.base = display->pFB;
-   framebuffer.width = display->virtualWidth;
-   framebuffer.height = display->virtualHeight;
-   framebuffer.stride = display->virtualWidth;
-   framebuffer.size = display->fbSize;
-   radeonInitFBDev( display, framebuffer.dev_priv );
-
-   if (!_eglDRICreateDisplay(display, &framebuffer))
-      return EGL_FALSE;
-
-   if (!_eglDRICreateScreens(display))
-      return EGL_FALSE;
-
-   /* create a variety of both 32 and 16-bit configurations */
-   radeonFillInConfigs(&display->Base, 32, 24, 8, GL_TRUE);
-   radeonFillInConfigs(&display->Base, 16, 16, 0, GL_TRUE);
-
-   drv->Initialized = EGL_TRUE;
-   return EGL_TRUE;
-}
-
-
-/**
- * The bootstrap function.  Return a new radeonDriver object and
- * plug in API functions.
- */
-_EGLDriver *
-_eglMain(_EGLDisplay *dpy)
-{
-   radeonDriver *radeon;
-
-   radeon = (radeonDriver *) calloc(1, sizeof(*radeon));
-   if (!radeon) {
-      return NULL;
-   }
-
-   /* First fill in the dispatch table with defaults */
-   _eglDRIInitDriverFallbacks(&radeon->Base);
-
-   /* then plug in our radeon-specific functions */
-   radeon->Base.API.Initialize = radeonInitialize;
-   radeon->Base.API.ShowScreenSurfaceMESA = radeonShowScreenSurfaceMESA;
-
-   return &radeon->Base;
-}
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_reg.h b/src/mesa/drivers/dri/radeon/server/radeon_reg.h
index e81d7fdcd0e..1b33de1edf7 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_reg.h
+++ b/src/mesa/drivers/dri/radeon/server/radeon_reg.h
@@ -1959,7 +1959,30 @@
 #define RADEON_SE_ZBIAS_FACTOR              0x1db0
 #define RADEON_SE_ZBIAS_CONSTANT            0x1db4
 
-
+#define RADEON_SE_VTX_FMT                   0x2080
+#       define RADEON_SE_VTX_FMT_XY         0x00000000
+#       define RADEON_SE_VTX_FMT_W0         0x00000001
+#       define RADEON_SE_VTX_FMT_FPCOLOR    0x00000002
+#       define RADEON_SE_VTX_FMT_FPALPHA    0x00000004
+#       define RADEON_SE_VTX_FMT_PKCOLOR    0x00000008
+#       define RADEON_SE_VTX_FMT_FPSPEC     0x00000010
+#       define RADEON_SE_VTX_FMT_FPFOG      0x00000020
+#       define RADEON_SE_VTX_FMT_PKSPEC     0x00000040
+#       define RADEON_SE_VTX_FMT_ST0        0x00000080
+#       define RADEON_SE_VTX_FMT_ST1        0x00000100
+#       define RADEON_SE_VTX_FMT_Q1         0x00000200
+#       define RADEON_SE_VTX_FMT_ST2        0x00000400
+#       define RADEON_SE_VTX_FMT_Q2         0x00000800
+#       define RADEON_SE_VTX_FMT_ST3        0x00001000
+#       define RADEON_SE_VTX_FMT_Q3         0x00002000
+#       define RADEON_SE_VTX_FMT_Q0         0x00004000
+#       define RADEON_SE_VTX_FMT_BLND_WEIGHT_CNT_MASK  0x00038000
+#       define RADEON_SE_VTX_FMT_N0         0x00040000
+#       define RADEON_SE_VTX_FMT_XY1        0x08000000
+#       define RADEON_SE_VTX_FMT_Z1         0x10000000
+#       define RADEON_SE_VTX_FMT_W1         0x20000000
+#       define RADEON_SE_VTX_FMT_N1         0x40000000
+#       define RADEON_SE_VTX_FMT_Z          0x80000000
 
 				/* Registers for CP and Microcode Engine */
 #define RADEON_CP_ME_RAM_ADDR               0x07d4
diff --git a/src/mesa/drivers/dri/savage/savagedd.c b/src/mesa/drivers/dri/savage/savagedd.c
index 32ca86de8ae..bbf49aec272 100644
--- a/src/mesa/drivers/dri/savage/savagedd.c
+++ b/src/mesa/drivers/dri/savage/savagedd.c
@@ -29,15 +29,11 @@
 #include <stdio.h>
 
 #include "main/mm.h"
-#include "swrast/swrast.h"
 
 #include "savagedd.h"
 #include "savagestate.h"
-#include "savagespan.h"
 #include "savagetex.h"
-#include "savagetris.h"
 #include "savagecontext.h"
-#include "main/extensions.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c
index d0b64e801a9..9e181ce3be9 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.c
+++ b/src/mesa/drivers/dri/savage/savageioctl.c
@@ -37,12 +37,10 @@
 
 #include "savagecontext.h"
 #include "savageioctl.h"
-#include "savage_bci.h"
 #include "savagestate.h"
 #include "savagespan.h"
 
 #include "drm.h"
-#include <sys/ioctl.h>
 #include <sys/timeb.h>
 
 #define DEPTH_SCALE_16 ((1<<16)-1)
diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c
index 8221edf3872..c369bb124c2 100644
--- a/src/mesa/drivers/dri/savage/savagerender.c
+++ b/src/mesa/drivers/dri/savage/savagerender.c
@@ -36,7 +36,6 @@
 #include "tnl/t_context.h"
 
 #include "savagecontext.h"
-#include "savagetris.h"
 #include "savagestate.h"
 #include "savageioctl.h"
 
diff --git a/src/mesa/drivers/dri/savage/savagespan.c b/src/mesa/drivers/dri/savage/savagespan.c
index 792e166d9c7..0913dd1278c 100644
--- a/src/mesa/drivers/dri/savage/savagespan.c
+++ b/src/mesa/drivers/dri/savage/savagespan.c
@@ -26,7 +26,6 @@
 #include "savagedd.h"
 #include "savagespan.h"
 #include "savageioctl.h"
-#include "savage_bci.h"
 #include "savage_3d_reg.h"
 #include "swrast/swrast.h"
 
diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c
index 97598f599e5..394be44eac5 100644
--- a/src/mesa/drivers/dri/savage/savagetex.c
+++ b/src/mesa/drivers/dri/savage/savagetex.c
@@ -33,8 +33,6 @@
 #include "main/simple_list.h"
 #include "main/enums.h"
 
-#include "swrast/swrast.h"
-
 #include "savagecontext.h"
 #include "savagetex.h"
 #include "savagetris.h"
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index 9a92541ef7e..a177a7d2b60 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -52,7 +52,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "savagestate.h"
 #include "savagetex.h"
 #include "savageioctl.h"
-#include "savage_bci.h"
 
 static void savageRasterPrimitive( GLcontext *ctx, GLuint prim );
 static void savageRenderPrimitive( GLcontext *ctx, GLenum prim );
diff --git a/src/mesa/drivers/dri/sis/sis6326_state.c b/src/mesa/drivers/dri/sis/sis6326_state.c
index 65d4c064660..52008c7ea32 100644
--- a/src/mesa/drivers/dri/sis/sis6326_state.c
+++ b/src/mesa/drivers/dri/sis/sis6326_state.c
@@ -34,14 +34,12 @@
 #include "sis_reg.h"
 
 #include "main/context.h"
-#include "main/enums.h"
 #include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
 #include "swrast_setup/swrast_setup.h"
 
-#include "tnl/t_pipeline.h"
 
 /* =============================================================
  * Alpha blending
diff --git a/src/mesa/drivers/dri/sis/sis_context.c b/src/mesa/drivers/dri/sis/sis_context.c
index 0944f4d8b4e..400681a04ab 100644
--- a/src/mesa/drivers/dri/sis/sis_context.c
+++ b/src/mesa/drivers/dri/sis/sis_context.c
@@ -43,8 +43,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_alloc.h"
 
 #include "main/imports.h"
-#include "main/matrix.h"
-#include "main/extensions.h"
 #include "utils.h"
 #include "main/framebuffer.h"
 
@@ -55,7 +53,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "vbo/vbo.h"
 
 #include "tnl/tnl.h"
-#include "tnl/t_pipeline.h"
 
 #define need_GL_EXT_fog_coord
 #define need_GL_EXT_secondary_color
diff --git a/src/mesa/drivers/dri/sis/sis_dd.c b/src/mesa/drivers/dri/sis/sis_dd.c
index 217d77557f3..fe4ade85920 100644
--- a/src/mesa/drivers/dri/sis/sis_dd.c
+++ b/src/mesa/drivers/dri/sis/sis_dd.c
@@ -40,9 +40,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_state.h"
 #include "sis_tris.h"
 
-#include "swrast/swrast.h"
 #include "main/formats.h"
-#include "main/framebuffer.h"
 #include "main/renderbuffer.h"
 
 #include "utils.h"
diff --git a/src/mesa/drivers/dri/sis/sis_fog.c b/src/mesa/drivers/dri/sis/sis_fog.c
index 517d5722e6a..6c774e010eb 100644
--- a/src/mesa/drivers/dri/sis/sis_fog.c
+++ b/src/mesa/drivers/dri/sis/sis_fog.c
@@ -33,7 +33,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "sis_context.h"
 #include "sis_state.h"
-#include "swrast/swrast.h"
 
 #include "main/macros.h"
 
diff --git a/src/mesa/drivers/dri/sis/sis_screen.c b/src/mesa/drivers/dri/sis/sis_screen.c
index d38b93ec9b8..cb7ed8a08bb 100644
--- a/src/mesa/drivers/dri/sis/sis_screen.c
+++ b/src/mesa/drivers/dri/sis/sis_screen.c
@@ -39,7 +39,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_context.h"
 #include "sis_dri.h"
 #include "sis_lock.h"
-#include "sis_span.h"
 
 #include "xmlpool.h"
 
diff --git a/src/mesa/drivers/dri/sis/sis_state.c b/src/mesa/drivers/dri/sis/sis_state.c
index 98e8d02fabe..a22195ccceb 100644
--- a/src/mesa/drivers/dri/sis/sis_state.c
+++ b/src/mesa/drivers/dri/sis/sis_state.c
@@ -35,17 +35,13 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_state.h"
 #include "sis_tris.h"
 #include "sis_lock.h"
-#include "sis_tex.h"
 
 #include "main/context.h"
-#include "main/enums.h"
-#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
 #include "swrast_setup/swrast_setup.h"
 
-#include "tnl/t_pipeline.h"
 
 /* =============================================================
  * Alpha blending
diff --git a/src/mesa/drivers/dri/sis/sis_tex.c b/src/mesa/drivers/dri/sis/sis_tex.c
index 951c470dadf..31709c3af6e 100644
--- a/src/mesa/drivers/dri/sis/sis_tex.c
+++ b/src/mesa/drivers/dri/sis/sis_tex.c
@@ -31,7 +31,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast/swrast.h"
 #include "main/imports.h"
 #include "main/texstore.h"
-#include "main/teximage.h"
 #include "main/texobj.h"
 
 #include "sis_context.h"
diff --git a/src/mesa/drivers/dri/sis/sis_texstate.c b/src/mesa/drivers/dri/sis/sis_texstate.c
index 4c22a10cf7e..7b0eebd066f 100644
--- a/src/mesa/drivers/dri/sis/sis_texstate.c
+++ b/src/mesa/drivers/dri/sis/sis_texstate.c
@@ -38,7 +38,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/macros.h"
 
 #include "sis_context.h"
-#include "sis_state.h"
 #include "sis_tex.h"
 #include "sis_tris.h"
 #include "sis_alloc.h"
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index 4690274c3c0..4b41d78d82a 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -47,7 +47,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_state.h"
 #include "sis_lock.h"
 #include "sis_span.h"
-#include "sis_alloc.h"
 #include "sis_tex.h"
 
 /* 6326 and 300-series shared */
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_dd.c b/src/mesa/drivers/dri/tdfx/tdfx_dd.c
index ed8a3315492..2cbbeb81141 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_dd.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_dd.c
@@ -35,17 +35,10 @@
 #include "tdfx_context.h"
 #include "tdfx_dd.h"
 #include "tdfx_lock.h"
-#include "tdfx_vb.h"
 #include "tdfx_pixels.h"
 
 #include "utils.h"
 #include "main/context.h"
-#include "main/enums.h"
-#include "main/framebuffer.h"
-#include "swrast/swrast.h"
-#if defined(USE_X86_ASM)
-#include "x86/common_x86_asm.h"
-#endif
 
 
 #define DRIVER_DATE	"20061113"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_lock.c b/src/mesa/drivers/dri/tdfx/tdfx_lock.c
index 4f84240104a..f218e4ee576 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_lock.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_lock.c
@@ -38,7 +38,6 @@
 #include "tdfx_state.h"
 #include "tdfx_render.h"
 #include "tdfx_texman.h"
-#include "tdfx_tris.h"
 
 #include "drirenderbuffer.h"
 
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
index 65f0464f8a5..44496274188 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
@@ -38,7 +38,6 @@
 #include "tdfx_context.h"
 #include "tdfx_dd.h"
 #include "tdfx_lock.h"
-#include "tdfx_vb.h"
 #include "tdfx_pixels.h"
 #include "tdfx_render.h"
 
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_screen.c b/src/mesa/drivers/dri/tdfx/tdfx_screen.c
index 4422b5dec46..9f6b35faa28 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_screen.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_screen.c
@@ -36,9 +36,7 @@
 #include "tdfx_dri.h"
 #include "tdfx_context.h"
 #include "tdfx_lock.h"
-#include "tdfx_vb.h"
 #include "tdfx_span.h"
-#include "tdfx_tris.h"
 
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.c b/src/mesa/drivers/dri/tdfx/tdfx_state.c
index cdb61a0ce05..dcbc7647f29 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_state.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_state.c
@@ -40,8 +40,6 @@
 
 #include "main/mtypes.h"
 #include "main/colormac.h"
-#include "main/texstore.h"
-#include "main/teximage.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
@@ -51,11 +49,9 @@
 
 #include "tdfx_context.h"
 #include "tdfx_state.h"
-#include "tdfx_vb.h"
 #include "tdfx_tex.h"
 #include "tdfx_texman.h"
 #include "tdfx_texstate.h"
-#include "tdfx_tris.h"
 #include "tdfx_render.h"
 
 
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_texman.c b/src/mesa/drivers/dri/tdfx/tdfx_texman.c
index 35636ee5efb..726cc58a10b 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_texman.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_texman.c
@@ -35,7 +35,6 @@
  */
 
 #include "tdfx_context.h"
-#include "tdfx_tex.h"
 #include "tdfx_texman.h"
 #include "main/texobj.h"
 #include "main/hash.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_texstate.c b/src/mesa/drivers/dri/tdfx/tdfx_texstate.c
index 3f737878ed9..6658b4d0c3e 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_texstate.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_texstate.c
@@ -38,7 +38,6 @@
  */
 
 #include "tdfx_state.h"
-#include "tdfx_tex.h"
 #include "tdfx_texman.h"
 #include "tdfx_texstate.h"
 
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
index c200ba3255a..0f3c877a3e7 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
@@ -29,13 +29,8 @@
 #include "main/macros.h"
 #include "main/colormac.h"
 
-#include "math/m_translate.h"
-#include "swrast_setup/swrast_setup.h"
-
 #include "tdfx_context.h"
 #include "tdfx_vb.h"
-#include "tdfx_tris.h"
-#include "tdfx_state.h"
 #include "tdfx_render.h"
 
 static void copy_pv( GLcontext *ctx, GLuint edst, GLuint esrc )
diff --git a/src/mesa/drivers/dri/unichrome/via_context.c b/src/mesa/drivers/dri/unichrome/via_context.c
index d17a160271d..9da96bdd45a 100644
--- a/src/mesa/drivers/dri/unichrome/via_context.c
+++ b/src/mesa/drivers/dri/unichrome/via_context.c
@@ -33,10 +33,7 @@
 #include "main/glheader.h"
 #include "main/context.h"
 #include "main/formats.h"
-#include "main/matrix.h"
-#include "main/state.h"
 #include "main/simple_list.h"
-#include "main/extensions.h"
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
 
diff --git a/src/mesa/drivers/dri/unichrome/via_ioctl.c b/src/mesa/drivers/dri/unichrome/via_ioctl.c
index 8d4edfa3058..c9a31f3383c 100644
--- a/src/mesa/drivers/dri/unichrome/via_ioctl.c
+++ b/src/mesa/drivers/dri/unichrome/via_ioctl.c
@@ -34,7 +34,6 @@
 #include "via_context.h"
 #include "via_tris.h"
 #include "via_ioctl.h"
-#include "via_state.h"
 #include "via_fb.h"
 #include "via_3d_reg.h"
 
diff --git a/src/mesa/drivers/dri/unichrome/via_render.c b/src/mesa/drivers/dri/unichrome/via_render.c
index f676cc13c81..896c43db1b0 100644
--- a/src/mesa/drivers/dri/unichrome/via_render.c
+++ b/src/mesa/drivers/dri/unichrome/via_render.c
@@ -37,7 +37,6 @@
 
 #include "via_context.h"
 #include "via_tris.h"
-#include "via_state.h"
 #include "via_ioctl.h"
 
 /*
diff --git a/src/mesa/drivers/dri/unichrome/via_screen.c b/src/mesa/drivers/dri/unichrome/via_screen.c
index 2cfb98317da..8c91c937c68 100644
--- a/src/mesa/drivers/dri/unichrome/via_screen.c
+++ b/src/mesa/drivers/dri/unichrome/via_screen.c
@@ -30,17 +30,13 @@
 #include "main/context.h"
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
-#include "main/matrix.h"
 #include "main/simple_list.h"
 #include "vblank.h"
 
 #include "via_state.h"
 #include "via_tex.h"
 #include "via_span.h"
-#include "via_tris.h"
-#include "via_ioctl.h"
 #include "via_screen.h"
-#include "via_fb.h"
 #include "via_dri.h"
 
 #include "GL/internal/dri_interface.h"
diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c
index e6e5526d344..f7029b94928 100644
--- a/src/mesa/drivers/dri/unichrome/via_state.c
+++ b/src/mesa/drivers/dri/unichrome/via_state.c
@@ -35,7 +35,6 @@
 #include "via_context.h"
 #include "via_state.h"
 #include "via_tex.h"
-#include "via_tris.h"
 #include "via_ioctl.h"
 #include "via_3d_reg.h"
 
@@ -44,8 +43,6 @@
 #include "tnl/tnl.h"
 #include "swrast_setup/swrast_setup.h"
 
-#include "tnl/t_pipeline.h"
-
 
 static GLuint ROP[16] = {
     HC_HROP_BLACK,    /* GL_CLEAR           0                      	*/
diff --git a/src/mesa/drivers/dri/unichrome/via_tex.c b/src/mesa/drivers/dri/unichrome/via_tex.c
index 24924d26138..917f9754669 100644
--- a/src/mesa/drivers/dri/unichrome/via_tex.c
+++ b/src/mesa/drivers/dri/unichrome/via_tex.c
@@ -37,14 +37,12 @@
 #include "main/mipmap.h"
 #include "main/mm.h"
 #include "main/simple_list.h"
-#include "main/texcompress.h"
 #include "main/texobj.h"
 #include "main/texstore.h"
 
 #include "via_context.h"
 #include "via_fb.h"
 #include "via_tex.h"
-#include "via_state.h"
 #include "via_ioctl.h"
 #include "via_3d_reg.h"
 
diff --git a/src/mesa/drivers/dri/unichrome/via_texcombine.c b/src/mesa/drivers/dri/unichrome/via_texcombine.c
index b6468978486..f87ba071f3b 100644
--- a/src/mesa/drivers/dri/unichrome/via_texcombine.c
+++ b/src/mesa/drivers/dri/unichrome/via_texcombine.c
@@ -38,7 +38,6 @@
 #include "main/enums.h"
 
 #include "via_context.h"
-#include "via_state.h"
 #include "via_tex.h"
 #include "via_3d_reg.h"
 
diff --git a/src/mesa/drivers/windows/gdi/mesa.def b/src/mesa/drivers/windows/gdi/mesa.def
index 62f75d9541f..700e3334295 100644
--- a/src/mesa/drivers/windows/gdi/mesa.def
+++ b/src/mesa/drivers/windows/gdi/mesa.def
@@ -870,7 +870,6 @@ EXPORTS
 	_mesa_bzero
 	_mesa_calloc
 	_mesa_choose_tex_format
-	_mesa_compressed_texture_size
 	_mesa_create_framebuffer
 	_mesa_create_visual
 	_mesa_delete_array_object
@@ -932,6 +931,8 @@ EXPORTS
 	_mesa_update_framebuffer_visual
 	_mesa_use_program
 	_mesa_Viewport
+	_mesa_meta_init
+	_mesa_meta_free
 	_mesa_meta_CopyColorSubTable
 	_mesa_meta_CopyColorTable
 	_mesa_meta_CopyConvolutionFilter1D
@@ -941,7 +942,6 @@ EXPORTS
 	_mesa_meta_CopyTexSubImage1D
 	_mesa_meta_CopyTexSubImage2D
 	_mesa_meta_CopyTexSubImage3D
-	_mesa_wait_query
 	_swrast_Accum
 	_swrast_Bitmap
 	_swrast_BlitFramebuffer
diff --git a/src/mesa/drivers/windows/gdi/wmesa.c b/src/mesa/drivers/windows/gdi/wmesa.c
index 76c825a0904..ceeafd5f909 100644
--- a/src/mesa/drivers/windows/gdi/wmesa.c
+++ b/src/mesa/drivers/windows/gdi/wmesa.c
@@ -1286,9 +1286,6 @@ void wmesa_set_renderbuffer_funcs(struct gl_renderbuffer *rb, int pixelformat,
 	    rb->PutMonoValues = write_mono_rgba_pixels_16;
 	    rb->GetRow = read_rgba_span_16;
 	    rb->GetValues = read_rgba_pixels_16;
-            rb->RedBits = 5;
-            rb->GreenBits = 6;
-            rb->BlueBits = 5;
 	    break;
 	case PF_8R8G8B:
 		if (cColorBits == 24)
@@ -1300,9 +1297,6 @@ void wmesa_set_renderbuffer_funcs(struct gl_renderbuffer *rb, int pixelformat,
 		    rb->PutMonoValues = write_mono_rgba_pixels_24;
 		    rb->GetRow = read_rgba_span_24;
 		    rb->GetValues = read_rgba_pixels_24;
-	        rb->RedBits = 8;
-	        rb->GreenBits = 8;
-	        rb->BlueBits = 8;		
 		}
 		else
 		{
@@ -1313,9 +1307,6 @@ void wmesa_set_renderbuffer_funcs(struct gl_renderbuffer *rb, int pixelformat,
 	        rb->PutMonoValues = write_mono_rgba_pixels_32;
 	        rb->GetRow = read_rgba_span_32;
 	        rb->GetValues = read_rgba_pixels_32;
-            rb->RedBits = 8;
-            rb->GreenBits = 8;
-            rb->BlueBits = 8;
 		}
 	    break;
 	default:
@@ -1331,9 +1322,6 @@ void wmesa_set_renderbuffer_funcs(struct gl_renderbuffer *rb, int pixelformat,
 	rb->PutMonoValues = write_mono_rgba_pixels_front;
 	rb->GetRow = read_rgba_span_front;
 	rb->GetValues = read_rgba_pixels_front;
-        rb->RedBits = 8; /* XXX fix these (565?) */
-        rb->GreenBits = 8;
-        rb->BlueBits = 8;
     }
 }
 
diff --git a/src/mesa/drivers/x11/glxapi.c b/src/mesa/drivers/x11/glxapi.c
index a17c2c3ffc6..e11aff1a849 100644
--- a/src/mesa/drivers/x11/glxapi.c
+++ b/src/mesa/drivers/x11/glxapi.c
@@ -50,6 +50,37 @@ struct display_dispatch {
    struct display_dispatch *Next;
 };
 
+
+/**
+ * When GLX_INDIRECT_RENDERING is defined, some symbols are missing in
+ * libglapi.a.  We need to define them here.
+ */
+#ifdef GLX_INDIRECT_RENDERING
+
+#include "glapi/glapitable.h"
+#include "glapi/glapidispatch.h"
+
+#define KEYWORD1 PUBLIC
+
+#if defined(USE_MGL_NAMESPACE)
+#define NAME(func)  mgl##func
+#else
+#define NAME(func)  gl##func
+#endif
+
+#define DISPATCH(FUNC, ARGS, MESSAGE)		\
+   CALL_ ## FUNC(GET_DISPATCH(), ARGS);
+
+#define RETURN_DISPATCH(FUNC, ARGS, MESSAGE) 	\
+   return CALL_ ## FUNC(GET_DISPATCH(), ARGS);
+
+/* skip normal ones */
+#define _GLAPI_SKIP_NORMAL_ENTRY_POINTS
+#include "glapi/glapitemp.h"
+
+#endif /* GLX_INDIRECT_RENDERING */
+
+
 static struct display_dispatch *DispatchList = NULL;