diff options
| author | Topi Pohjolainen <[email protected]> | 2017-06-22 21:04:29 +0300 |
|---|---|---|
| committer | Topi Pohjolainen <[email protected]> | 2017-07-20 11:32:21 +0300 |
| commit | a844e6a8f40ce5c1c26f8110585cfc974bb16a8b (patch) | |
| tree | ecf89f99e5f9444ce48e9b6c9a2e422b5d794f25 /src/mesa/drivers | |
| parent | 8e1494f13993c5c1e260be4cd92398714de28e32 (diff) | |
i965: Prepare blit engine for isl based miptrees
v2: Do not concern cpp, pitch and tiling which are already
transitioned.
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Signed-off-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index a6f7aee32f7..4ffff76cc54 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -328,11 +328,17 @@ intel_miptree_blit(struct brw_context *brw, intel_miptree_access_raw(brw, src_mt, src_level, src_slice, false); intel_miptree_access_raw(brw, dst_mt, dst_level, dst_slice, true); - if (src_flip) - src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height; - - if (dst_flip) - dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height; + if (src_flip) { + const unsigned h0 = src_mt->surf.size > 0 ? + src_mt->surf.phys_level0_sa.height : src_mt->physical_height0; + src_y = minify(h0, src_level - src_mt->first_level) - src_y - height; + } + + if (dst_flip) { + const unsigned h0 = dst_mt->surf.size > 0 ? + dst_mt->surf.phys_level0_sa.height : dst_mt->physical_height0; + dst_y = minify(h0, dst_level - dst_mt->first_level) - dst_y - height; + } uint32_t src_image_x, src_image_y, dst_image_x, dst_image_y; intel_miptree_get_image_offset(src_mt, src_level, src_slice, |