diff options
author | Kenneth Graunke <[email protected]> | 2011-06-30 00:15:34 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2011-07-07 13:31:41 -0700 |
commit | 3de9405763ad4b9e78577699ec206be7dda03374 (patch) | |
tree | 50e780ccfe970dc7c408ef44b5b2c86e758050b6 /src/mesa/drivers | |
parent | 247e4c69ce6389805437256524d043019abfa6d1 (diff) |
i965: Remove unused structures for command packets.
We simply emit these using OUT_BATCH and bitshifting, as it results in
better compiled code than packed structures. Since our documentation
is public, it's not terribly useful to keep these around for reference.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_structs.h | 433 |
1 files changed, 0 insertions, 433 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index d40f8f7a5cc..e1947d5ea64 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -40,46 +40,6 @@ /** Number of message register file registers */ #define BRW_MAX_MRF 16 - -/* Command packets: - */ -struct header -{ - GLuint length:16; - GLuint opcode:16; -}; - - -union header_union -{ - struct header bits; - GLuint dword; -}; - -struct brw_3d_control -{ - struct - { - GLuint length:8; - GLuint notify_enable:1; - GLuint pad:3; - GLuint wc_flush_enable:1; - GLuint depth_stall_enable:1; - GLuint operation:2; - GLuint opcode:16; - } header; - - struct - { - GLuint pad:2; - GLuint dest_addr_type:1; - GLuint dest_addr:29; - } dest; - - GLuint dword2; - GLuint dword3; -}; - /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ @@ -88,297 +48,6 @@ struct brw_3d_control #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 -struct brw_mi_flush -{ - GLuint flags:4; - GLuint pad:12; - GLuint opcode:16; -}; - - -struct brw_binding_table_pointers -{ - struct header header; - GLuint vs; - GLuint gs; - GLuint clp; - GLuint sf; - GLuint wm; -}; - - -struct brw_blend_constant_color -{ - struct header header; - GLfloat blend_constant_color[4]; -}; - - -struct brw_depthbuffer -{ - union header_union header; - - union { - struct { - GLuint pitch:18; - GLuint format:3; - GLuint pad:2; - GLuint software_tiled_rendering_mode:2; - GLuint depth_offset_disable:1; - GLuint tile_walk:1; - GLuint tiled_surface:1; - GLuint pad2:1; - GLuint surface_type:3; - } bits; - GLuint dword; - } dword1; - - GLuint dword2_base_addr; - - union { - struct { - GLuint pad:1; - GLuint mipmap_layout:1; - GLuint lod:4; - GLuint width:13; - GLuint height:13; - } bits; - GLuint dword; - } dword3; - - union { - struct { - GLuint pad:10; - GLuint min_array_element:11; - GLuint depth:11; - } bits; - GLuint dword; - } dword4; -}; - -struct brw_depthbuffer_g4x -{ - union header_union header; - - union { - struct { - GLuint pitch:18; - GLuint format:3; - GLuint pad:2; - GLuint software_tiled_rendering_mode:2; - GLuint depth_offset_disable:1; - GLuint tile_walk:1; - GLuint tiled_surface:1; - GLuint pad2:1; - GLuint surface_type:3; - } bits; - GLuint dword; - } dword1; - - GLuint dword2_base_addr; - - union { - struct { - GLuint pad:1; - GLuint mipmap_layout:1; - GLuint lod:4; - GLuint width:13; - GLuint height:13; - } bits; - GLuint dword; - } dword3; - - union { - struct { - GLuint pad:10; - GLuint min_array_element:11; - GLuint depth:11; - } bits; - GLuint dword; - } dword4; - - union { - struct { - GLuint xoffset:16; - GLuint yoffset:16; - } bits; - GLuint dword; - } dword5; /* NEW in Integrated Graphics Device */ -}; - -struct brw_drawrect -{ - struct header header; - GLuint xmin:16; - GLuint ymin:16; - GLuint xmax:16; - GLuint ymax:16; - GLuint xorg:16; - GLuint yorg:16; -}; - -struct brw_indexbuffer -{ - union { - struct - { - GLuint length:8; - GLuint index_format:2; - GLuint cut_index_enable:1; - GLuint pad:5; - GLuint opcode:16; - } bits; - GLuint dword; - - } header; - - GLuint buffer_start; - GLuint buffer_end; -}; - -/* NEW in Integrated Graphics Device */ -struct brw_aa_line_parameters -{ - struct header header; - - struct { - GLuint aa_coverage_slope:8; - GLuint pad0:8; - GLuint aa_coverage_bias:8; - GLuint pad1:8; - } bits0; - - struct { - GLuint aa_coverage_endcap_slope:8; - GLuint pad0:8; - GLuint aa_coverage_endcap_bias:8; - GLuint pad1:8; - } bits1; -}; - -struct brw_line_stipple -{ - struct header header; - - struct - { - GLuint pattern:16; - GLuint pad:16; - } bits0; - - struct - { - GLuint repeat_count:9; - GLuint pad:7; - GLuint inverse_repeat_count:16; - } bits1; -}; - - -struct brw_pipelined_state_pointers -{ - struct header header; - - struct { - GLuint pad:5; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ - } vs; - - struct - { - GLuint enable:1; - GLuint pad:4; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ - } gs; - - struct - { - GLuint enable:1; - GLuint pad:4; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ - } clp; - - struct - { - GLuint pad:5; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ - } sf; - - struct - { - GLuint pad:5; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE */ - } wm; - - struct - { - GLuint pad:5; - GLuint offset:27; /* Offset from GENERAL_STATE_BASE. KW: check me! */ - } cc; -}; - - -struct brw_polygon_stipple_offset -{ - struct header header; - - struct { - GLuint y_offset:5; - GLuint pad:3; - GLuint x_offset:5; - GLuint pad0:19; - } bits0; -}; - - - -struct brw_polygon_stipple -{ - struct header header; - GLuint stipple[32]; -}; - - - -struct brw_pipeline_select -{ - struct - { - GLuint pipeline_select:1; - GLuint pad:15; - GLuint opcode:16; - } header; -}; - - -struct brw_pipe_control -{ - struct - { - GLuint length:8; - GLuint notify_enable:1; - GLuint texture_cache_flush_enable:1; - GLuint indirect_state_pointers_disable:1; - GLuint instruction_state_cache_flush_enable:1; - GLuint write_cache_flush_enable:1; - GLuint depth_stall_enable:1; - GLuint post_sync_operation:2; - - GLuint opcode:16; - } header; - - struct - { - GLuint pad:2; - GLuint dest_addr_type:1; - GLuint dest_addr:29; - } bits1; - - GLuint data0; - GLuint data1; -}; - - struct brw_urb_fence { struct @@ -411,102 +80,6 @@ struct brw_urb_fence } bits1; }; -struct brw_cs_urb_state -{ - struct header header; - - struct - { - GLuint nr_urb_entries:3; - GLuint pad:1; - GLuint urb_entry_size:5; - GLuint pad0:23; - } bits0; -}; - -struct brw_constant_buffer -{ - struct - { - GLuint length:8; - GLuint valid:1; - GLuint pad:7; - GLuint opcode:16; - } header; - - struct - { - GLuint buffer_length:6; - GLuint buffer_address:26; - } bits0; -}; - -struct brw_state_base_address -{ - struct header header; - - struct - { - GLuint modify_enable:1; - GLuint pad:4; - GLuint general_state_address:27; - } bits0; - - struct - { - GLuint modify_enable:1; - GLuint pad:4; - GLuint surface_state_address:27; - } bits1; - - struct - { - GLuint modify_enable:1; - GLuint pad:4; - GLuint indirect_object_state_address:27; - } bits2; - - struct - { - GLuint modify_enable:1; - GLuint pad:11; - GLuint general_state_upper_bound:20; - } bits3; - - struct - { - GLuint modify_enable:1; - GLuint pad:11; - GLuint indirect_object_state_upper_bound:20; - } bits4; -}; - -struct brw_state_prefetch -{ - struct header header; - - struct - { - GLuint prefetch_count:3; - GLuint pad:3; - GLuint prefetch_pointer:26; - } bits0; -}; - -struct brw_system_instruction_pointer -{ - struct header header; - - struct - { - GLuint pad:4; - GLuint system_instruction_pointer:28; - } bits0; -}; - - - - /* State structs for the various fixed function units: */ @@ -1310,12 +883,6 @@ struct brw_vertex_element_state #define BRW_VEP_MAX 18 -struct brw_vertex_element_packet { - struct header header; - struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ -}; - - struct brw_urb_immediate { GLuint opcode:4; GLuint offset:6; |