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authorDave Airlie <[email protected]>2009-02-02 12:26:22 +1000
committerDave Airlie <[email protected]>2009-02-02 12:26:22 +1000
commit75762a8219d7db0f7990eab73f953a6a4f9ee130 (patch)
tree2c6d79ecd4db02448ea4029b85a2ef3237bc56ed /src/mesa/drivers
parentf4dfafd50acdff994b16946773cbfbefdc172f3e (diff)
radeon: this code forgot to add dPriv x/y back to spans
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/radeon/common_misc.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/radeon/common_misc.c b/src/mesa/drivers/dri/radeon/common_misc.c
index 9044967ac05..bc84b67f001 100644
--- a/src/mesa/drivers/dri/radeon/common_misc.c
+++ b/src/mesa/drivers/dri/radeon/common_misc.c
@@ -199,7 +199,7 @@ void radeonUpdateScissor( GLcontext *ctx )
if ( rmesa->dri.drawable ) {
__DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
-
+
int x = ctx->Scissor.X;
int y = dPriv->h - ctx->Scissor.Y - ctx->Scissor.Height;
int w = ctx->Scissor.X + ctx->Scissor.Width - 1;
@@ -2118,11 +2118,15 @@ GLubyte *radeon_ptr32(const struct radeon_renderbuffer * rrb,
GLint x, GLint y)
{
GLubyte *ptr = rrb->bo->ptr;
+ const __DRIdrawablePrivate *dPriv = rrb->dPriv;
uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
GLint offset;
GLint nmacroblkpl;
GLint nmicroblkpl;
+ x += dPriv->x;
+ y += dPriv->y;
+
if (rrb->has_surface || !(rrb->bo->flags & mask)) {
offset = x * rrb->cpp + y * rrb->pitch;
} else {
@@ -2158,11 +2162,15 @@ GLubyte *radeon_ptr16(const struct radeon_renderbuffer * rrb,
GLint x, GLint y)
{
GLubyte *ptr = rrb->bo->ptr;
+ const __DRIdrawablePrivate *dPriv = rrb->dPriv;
uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
GLint offset;
GLint nmacroblkpl;
GLint nmicroblkpl;
+ x += dPriv->x;
+ y += dPriv->y;
+
if (rrb->has_surface || !(rrb->bo->flags & mask)) {
offset = x * rrb->cpp + y * rrb->pitch;
} else {
@@ -2198,6 +2206,7 @@ GLubyte *radeon_ptr(const struct radeon_renderbuffer * rrb,
GLint x, GLint y)
{
GLubyte *ptr = rrb->bo->ptr;
+ const __DRIdrawablePrivate *dPriv = rrb->dPriv;
uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
GLint offset;
GLint microblkxs;
@@ -2205,6 +2214,9 @@ GLubyte *radeon_ptr(const struct radeon_renderbuffer * rrb,
GLint nmacroblkpl;
GLint nmicroblkpl;
+ x += dPriv->x;
+ y += dPriv->y;
+
if (rrb->has_surface || !(rrb->bo->flags & mask)) {
offset = x * rrb->cpp + y * rrb->pitch;
} else {