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author | Matt Turner <[email protected]> | 2016-02-11 12:27:02 -0800 |
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committer | Matt Turner <[email protected]> | 2016-02-17 12:35:27 -0800 |
commit | 2f2c00c7279e7c43e520e21de1781f8cec263e92 (patch) | |
tree | d2a1d95b593bce622ba2a2f8c9c6d57196fa120e /src/mesa/drivers/x11/fakeglx.c | |
parent | 378d98f87e8048664309a66cb93ecf582e40d837 (diff) |
i965: Lower min/max after optimization on Gen4/5.
Gen4/5's SEL instruction cannot use conditional modifiers, so min/max
are implemented as CMP + SEL. Handling that after optimization lets us
CSE more.
On Ironlake:
total instructions in shared programs: 6426035 -> 6422753 (-0.05%)
instructions in affected programs: 326604 -> 323322 (-1.00%)
helped: 1411
total cycles in shared programs: 129184700 -> 129101586 (-0.06%)
cycles in affected programs: 18950290 -> 18867176 (-0.44%)
helped: 2419
HURT: 328
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa/drivers/x11/fakeglx.c')
0 files changed, 0 insertions, 0 deletions