diff options
author | Lionel Landwerlin <[email protected]> | 2017-06-15 14:47:12 +0100 |
---|---|---|
committer | Lionel Landwerlin <[email protected]> | 2017-06-19 22:11:00 +0100 |
commit | e5743ee014a82f228085dfcd5d653fcbd3d86fe4 (patch) | |
tree | a74990d1bbe3be88f021a6e9efbf564ca319a9e3 /src/mesa/drivers/dri | |
parent | a26f8d99a6e00315e00ddb0b05fbb4cb4532c7e1 (diff) |
i965: convert MI_REPORT_PERF_COUNT to genxml
Also make it available from gen7 only to gen7+.
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 11 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_performance_query.c | 33 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 18 |
3 files changed, 34 insertions, 28 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 2fb2cab9189..f4b5b8335fe 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -646,6 +646,17 @@ struct brw_context uint32_t width, uint32_t height, uint32_t tile_x, uint32_t tile_y); + /** + * Emit an MI_REPORT_PERF_COUNT command packet. + * + * This asks the GPU to write a report of the current OA counter values + * into @bo at the given offset and containing the given @report_id + * which we can cross-reference when parsing the report (gen7+ only). + */ + void (*emit_mi_report_perf_count)(struct brw_context *brw, + struct brw_bo *bo, + uint32_t offset_in_bytes, + uint32_t report_id); } vtbl; struct brw_bufmgr *bufmgr; diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index 1c9ddf52ea3..66128869f4f 100644 --- a/src/mesa/drivers/dri/i965/brw_performance_query.c +++ b/src/mesa/drivers/dri/i965/brw_performance_query.c @@ -468,29 +468,6 @@ snapshot_statistics_registers(struct brw_context *brw, } /** - * Emit an MI_REPORT_PERF_COUNT command packet. - * - * This asks the GPU to write a report of the current OA counter - * values into @bo at the given offset and containing the given - * @report_id which we can cross-reference when parsing the report. - */ -static void -emit_mi_report_perf_count(struct brw_context *brw, - struct brw_bo *bo, - uint32_t offset_in_bytes, - uint32_t report_id) -{ - assert(offset_in_bytes % 64 == 0); - - BEGIN_BATCH(3); - OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT); - OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset_in_bytes); - OUT_BATCH(report_id); - ADVANCE_BATCH(); -} - -/** * Add a query to the global list of "unaccumulated queries." * * Queries are tracked here until all the associated OA reports have @@ -1001,8 +978,8 @@ brw_begin_perf_query(struct gl_context *ctx, brw->perfquery.next_query_start_report_id += 2; /* Take a starting OA counter snapshot. */ - emit_mi_report_perf_count(brw, obj->oa.bo, 0, - obj->oa.begin_report_id); + brw->vtbl.emit_mi_report_perf_count(brw, obj->oa.bo, 0, + obj->oa.begin_report_id); ++brw->perfquery.n_active_oa_queries; /* No already-buffered samples can possibly be associated with this query @@ -1081,9 +1058,9 @@ brw_end_perf_query(struct gl_context *ctx, */ if (!obj->oa.results_accumulated) { /* Take an ending OA counter snapshot. */ - emit_mi_report_perf_count(brw, obj->oa.bo, - MI_RPC_BO_END_OFFSET_BYTES, - obj->oa.begin_report_id + 1); + brw->vtbl.emit_mi_report_perf_count(brw, obj->oa.bo, + MI_RPC_BO_END_OFFSET_BYTES, + obj->oa.begin_report_id + 1); } --brw->perfquery.n_active_oa_queries; diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index a5a9d51bde4..064880b8209 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -4201,6 +4201,22 @@ static const struct brw_tracked_state genX(vf_topology) = { /* ---------------------------------------------------------------------- */ +#if GEN_GEN >= 7 +static void +genX(emit_mi_report_perf_count)(struct brw_context *brw, + struct brw_bo *bo, + uint32_t offset_in_bytes, + uint32_t report_id) +{ + brw_batch_emit(brw, GENX(MI_REPORT_PERF_COUNT), mi_rpc) { + mi_rpc.MemoryAddress = instruction_bo(bo, offset_in_bytes); + mi_rpc.ReportID = report_id; + } +} +#endif + +/* ---------------------------------------------------------------------- */ + void genX(init_atoms)(struct brw_context *brw) { @@ -4536,5 +4552,7 @@ genX(init_atoms)(struct brw_context *brw) STATIC_ASSERT(ARRAY_SIZE(compute_atoms) <= ARRAY_SIZE(brw->compute_atoms)); brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE, compute_atoms, ARRAY_SIZE(compute_atoms)); + + brw->vtbl.emit_mi_report_perf_count = genX(emit_mi_report_perf_count); #endif } |