diff options
author | Eric Anholt <[email protected]> | 2012-12-05 15:24:07 -0800 |
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committer | Eric Anholt <[email protected]> | 2012-12-14 15:18:10 -0800 |
commit | 6255fc7426ce51b3bd1b28af45f4977fdcc37a55 (patch) | |
tree | 1a3eb8b24c819f016d1c929e45aa85caeea677e5 /src/mesa/drivers/dri | |
parent | 461a29783a28e579a9a5a236e5f47ffb6d18a328 (diff) |
i965/fs: Move the old gen4 bspec-based scheduling info to a helper func.
For gen7 everything changes, and we have actual information on latency.
Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp | 74 |
1 files changed, 41 insertions, 33 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp index 76bd5b2cc36..28e1ebb53b9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_schedule_instructions.cpp @@ -67,41 +67,11 @@ public: this->parent_count = 0; this->unblocked_time = 0; - int chans = 8; - int math_latency = 22; - - switch (inst->opcode) { - case SHADER_OPCODE_RCP: - this->latency = 1 * chans * math_latency; - break; - case SHADER_OPCODE_RSQ: - this->latency = 2 * chans * math_latency; - break; - case SHADER_OPCODE_INT_QUOTIENT: - case SHADER_OPCODE_SQRT: - case SHADER_OPCODE_LOG2: - /* full precision log. partial is 2. */ - this->latency = 3 * chans * math_latency; - break; - case SHADER_OPCODE_INT_REMAINDER: - case SHADER_OPCODE_EXP2: - /* full precision. partial is 3, same throughput. */ - this->latency = 4 * chans * math_latency; - break; - case SHADER_OPCODE_POW: - this->latency = 8 * chans * math_latency; - break; - case SHADER_OPCODE_SIN: - case SHADER_OPCODE_COS: - /* minimum latency, max is 12 rounds. */ - this->latency = 5 * chans * math_latency; - break; - default: - this->latency = 2; - break; - } + set_latency_gen4(); } + void set_latency_gen4(); + fs_inst *inst; schedule_node **children; int *child_latency; @@ -112,6 +82,44 @@ public: int latency; }; +void +schedule_node::set_latency_gen4() +{ + int chans = 8; + int math_latency = 22; + + switch (inst->opcode) { + case SHADER_OPCODE_RCP: + this->latency = 1 * chans * math_latency; + break; + case SHADER_OPCODE_RSQ: + this->latency = 2 * chans * math_latency; + break; + case SHADER_OPCODE_INT_QUOTIENT: + case SHADER_OPCODE_SQRT: + case SHADER_OPCODE_LOG2: + /* full precision log. partial is 2. */ + this->latency = 3 * chans * math_latency; + break; + case SHADER_OPCODE_INT_REMAINDER: + case SHADER_OPCODE_EXP2: + /* full precision. partial is 3, same throughput. */ + this->latency = 4 * chans * math_latency; + break; + case SHADER_OPCODE_POW: + this->latency = 8 * chans * math_latency; + break; + case SHADER_OPCODE_SIN: + case SHADER_OPCODE_COS: + /* minimum latency, max is 12 rounds. */ + this->latency = 5 * chans * math_latency; + break; + default: + this->latency = 2; + break; + } +} + class instruction_scheduler { public: instruction_scheduler(fs_visitor *v, void *mem_ctx, int grf_count, |