diff options
author | Kenneth Graunke <[email protected]> | 2016-09-08 23:48:53 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2016-10-05 19:21:35 -0700 |
commit | a85a8ecd32202b22e560bdf714b5715a168cc76e (patch) | |
tree | 277808d431d729aa20efeaa64dfd7ec7c71b5588 /src/mesa/drivers/dri | |
parent | 16d5536e55aed2aad0596e9385f1962b4ca5db2b (diff) |
i965: Eliminate brw->cs.prog_data pointer.
Just say no to:
- brw->cs.base.prog_data = &brw->cs.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_cs_prog_data as needed.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_compute.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_cs.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_cache.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_cs_state.c | 11 |
6 files changed, 18 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c index d1d39d30cbf..6e6e425deb1 100644 --- a/src/mesa/drivers/dri/i965/brw_compute.c +++ b/src/mesa/drivers/dri/i965/brw_compute.c @@ -115,7 +115,8 @@ prepare_indirect_gpgpu_walker(struct brw_context *brw) static void brw_emit_gpgpu_walker(struct brw_context *brw) { - const struct brw_cs_prog_data *prog_data = brw->cs.prog_data; + const struct brw_cs_prog_data *prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); const GLuint *num_groups = brw->compute.num_work_groups; uint32_t indirect_flag; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 198161f090a..c92bb9f8431 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1195,7 +1195,6 @@ struct brw_context struct { struct brw_stage_state base; - struct brw_cs_prog_data *prog_data; } cs; /* RS hardware binding table */ diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c index 4e746fe478f..e7dcf477b76 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.c +++ b/src/mesa/drivers/dri/i965/brw_cs.c @@ -180,7 +180,7 @@ brw_codegen_cs_prog(struct brw_context *brw, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &brw->cs.base.prog_offset, &brw->cs.prog_data); + &brw->cs.base.prog_offset, &brw->cs.base.prog_data); ralloc_free(mem_ctx); return true; @@ -227,7 +227,8 @@ brw_upload_cs_prog(struct brw_context *brw) if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG, &key, sizeof(key), - &brw->cs.base.prog_offset, &brw->cs.prog_data)) { + &brw->cs.base.prog_offset, + &brw->cs.base.prog_data)) { bool success = brw_codegen_cs_prog(brw, ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE], @@ -235,7 +236,6 @@ brw_upload_cs_prog(struct brw_context *brw) (void) success; assert(success); } - brw->cs.base.prog_data = &brw->cs.prog_data->base; } @@ -256,12 +256,12 @@ brw_cs_precompile(struct gl_context *ctx, brw_setup_tex_for_precompile(brw, &key.tex, prog); uint32_t old_prog_offset = brw->cs.base.prog_offset; - struct brw_cs_prog_data *old_prog_data = brw->cs.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->cs.base.prog_data; bool success = brw_codegen_cs_prog(brw, shader_prog, bcp, &key); brw->cs.base.prog_offset = old_prog_offset; - brw->cs.prog_data = old_prog_data; + brw->cs.base.prog_data = old_prog_data; return success; } diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index ed19d716514..e8e71ab229f 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -403,7 +403,6 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) brw->tes.base.prog_data = NULL; brw->gs.base.prog_data = NULL; brw->wm.base.prog_data = NULL; - brw->cs.prog_data = NULL; brw->cs.base.prog_data = NULL; intel_batchbuffer_flush(brw); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 11dc7f035b4..8d5d9a2040e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -1464,7 +1464,7 @@ brw_upload_cs_ubo_surfaces(struct brw_context *brw) /* BRW_NEW_CS_PROG_DATA */ brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + &brw->cs.base, brw->cs.base.prog_data); } const struct brw_tracked_state brw_cs_ubo_surfaces = { @@ -1542,7 +1542,7 @@ brw_upload_cs_abo_surfaces(struct brw_context *brw) if (prog) { /* BRW_NEW_CS_PROG_DATA */ brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + &brw->cs.base, brw->cs.base.prog_data); } } @@ -1568,7 +1568,7 @@ brw_upload_cs_image_surfaces(struct brw_context *brw) if (prog) { /* BRW_NEW_CS_PROG_DATA, BRW_NEW_IMAGE_UNITS, _NEW_TEXTURE */ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + &brw->cs.base, brw->cs.base.prog_data); } } @@ -1848,7 +1848,8 @@ brw_upload_cs_work_groups_surface(struct brw_context *brw) struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; /* BRW_NEW_CS_PROG_DATA */ - const struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; + const struct brw_cs_prog_data *cs_prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); if (prog && cs_prog_data->uses_num_work_groups) { const unsigned surf_idx = diff --git a/src/mesa/drivers/dri/i965/gen7_cs_state.c b/src/mesa/drivers/dri/i965/gen7_cs_state.c index 95b1d57922e..f0743fc5d38 100644 --- a/src/mesa/drivers/dri/i965/gen7_cs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_cs_state.c @@ -37,15 +37,15 @@ static void brw_upload_cs_state(struct brw_context *brw) { - if (!brw->cs.prog_data) + if (!brw->cs.base.prog_data) return; uint32_t offset; uint32_t *desc = (uint32_t*) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 64, &offset); struct brw_stage_state *stage_state = &brw->cs.base; - struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; - struct brw_stage_prog_data *prog_data = &cs_prog_data->base; + struct brw_stage_prog_data *prog_data = stage_state->prog_data; + struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); const struct gen_device_info *devinfo = &brw->screen->devinfo; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { @@ -285,7 +285,8 @@ gen7_upload_cs_push_constants(struct brw_context *brw) if (cp) { /* BRW_NEW_CS_PROG_DATA */ - struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; + struct brw_cs_prog_data *cs_prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE); brw_upload_cs_push_constants(brw, &cp->program.Base, cs_prog_data, @@ -319,7 +320,7 @@ brw_upload_cs_pull_constants(struct brw_context *brw) (struct brw_compute_program *) brw->compute_program; /* BRW_NEW_CS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->cs.prog_data->base; + const struct brw_stage_prog_data *prog_data = brw->cs.base.prog_data; _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE); /* _NEW_PROGRAM_CONSTANTS */ |