diff options
author | Matt Turner <[email protected]> | 2015-02-20 20:18:47 -0800 |
---|---|---|
committer | Matt Turner <[email protected]> | 2015-02-23 10:49:47 -0800 |
commit | bfcdb843830bba0190e00e35e3c5c18c4bdb5de1 (patch) | |
tree | d4e8eebb5d58b3b1ac6caa383bfcda258b19c6c1 /src/mesa/drivers/dri | |
parent | 52049f8fd83f2ef31c2a4d645cfb7d7b2ab518a6 (diff) |
mesa: Use assert() instead of ASSERT wrapper.
Acked-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_fbo.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_regions.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_fbo.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_texstate.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_dma.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_fbo.c | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_texstate.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/swrast/swrast.c | 2 |
10 files changed, 17 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c index ead1b17b69d..2a343856c52 100644 --- a/src/mesa/drivers/dri/i915/intel_fbo.c +++ b/src/mesa/drivers/dri/i915/intel_fbo.c @@ -83,7 +83,7 @@ intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) { struct intel_renderbuffer *irb = intel_renderbuffer(rb); - ASSERT(irb); + assert(irb); intel_miptree_release(&irb->mt); @@ -304,7 +304,7 @@ static GLboolean intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, GLenum internalFormat, GLuint width, GLuint height) { - ASSERT(rb->Name == 0); + assert(rb->Name == 0); rb->Width = width; rb->Height = height; rb->InternalFormat = internalFormat; diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c index ff27d7f81f0..5768357f193 100644 --- a/src/mesa/drivers/dri/i915/intel_regions.c +++ b/src/mesa/drivers/dri/i915/intel_regions.c @@ -266,7 +266,7 @@ intel_region_release(struct intel_region **region_handle) _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1); - ASSERT(region->refcount > 0); + assert(region->refcount > 0); region->refcount--; if (region->refcount == 0) { diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 174cea06cbb..63ed7adc0ee 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -74,7 +74,7 @@ intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) { struct intel_renderbuffer *irb = intel_renderbuffer(rb); - ASSERT(irb); + assert(irb); intel_miptree_release(&irb->mt); intel_miptree_release(&irb->singlesample_mt); @@ -415,7 +415,7 @@ static GLboolean intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, GLenum internalFormat, GLuint width, GLuint height) { - ASSERT(rb->Name == 0); + assert(rb->Name == 0); rb->Width = width; rb->Height = height; rb->InternalFormat = internalFormat; diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 930ead86ad1..832718714c3 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -1651,7 +1651,7 @@ static void r200LogicOpCode( struct gl_context *ctx, GLenum opcode ) r200ContextPtr rmesa = R200_CONTEXT(ctx); GLuint rop = (GLuint)opcode - GL_CLEAR; - ASSERT( rop < 16 ); + assert( rop < 16 ); R200_STATECHANGE( rmesa, msk ); rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = r200_rop_tab[rop]; diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 5f740968e64..43ecdb999db 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -1432,7 +1432,7 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t) } else if (t->base.Target == GL_TEXTURE_CUBE_MAP) { - ASSERT(log2Width == log2Height); + assert(log2Width == log2Height); t->pp_txformat |= ((log2Width << R200_TXFORMAT_F5_WIDTH_SHIFT) | (log2Height << R200_TXFORMAT_F5_HEIGHT_SHIFT) | /* don't think we need this bit, if it exists at all - fglrx does not set it */ diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index a2be3d684e0..5b98eff169f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -473,9 +473,9 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) rmesa->dma.flush = rcommon_flush_last_swtcl_prim; } - ASSERT( vsize == rmesa->swtcl.vertex_size * 4 ); - ASSERT( rmesa->dma.flush == rcommon_flush_last_swtcl_prim ); - ASSERT( rmesa->dma.current_used + + assert( vsize == rmesa->swtcl.vertex_size * 4 ); + assert( rmesa->dma.flush == rcommon_flush_last_swtcl_prim ); + assert( rmesa->dma.current_used + rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == rmesa->dma.current_vertexptr ); diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 5a6d9da771c..110b03020ca 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -61,7 +61,7 @@ radeon_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) "%s(rb %p, rrb %p) \n", __func__, rb, rrb); - ASSERT(rrb); + assert(rrb); if (rrb && rrb->bo) { radeon_bo_unref(rrb->bo); @@ -474,7 +474,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe "%s(%p, rb %p) \n", __func__, ctx, rb); - ASSERT(rb->Name != 0); + assert(rb->Name != 0); switch (internalFormat) { case GL_R3_G3_B2: case GL_RGB4: @@ -609,7 +609,7 @@ static GLboolean radeon_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, GLenum internalFormat, GLuint width, GLuint height) { - ASSERT(rb->Name == 0); + assert(rb->Name == 0); rb->Width = width; rb->Height = height; rb->InternalFormat = internalFormat; @@ -767,7 +767,7 @@ radeon_render_texture(struct gl_context * ctx, (void) fb; - ASSERT(newImage); + assert(newImage); radeon_image = (radeon_texture_image *)newImage; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 002fc86f9a4..e83a34db9c3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1434,7 +1434,7 @@ static void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode ) r100ContextPtr rmesa = R100_CONTEXT(ctx); GLuint rop = (GLuint)opcode - GL_CLEAR; - ASSERT( rop < 16 ); + assert( rop < 16 ); RADEON_STATECHANGE( rmesa, msk ); rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop]; diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index 4600d34ce82..0439f6d0c05 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -995,7 +995,7 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int t->tile_bits = 0; if (t->base.Target == GL_TEXTURE_CUBE_MAP) { - ASSERT(log2Width == log2Height); + assert(log2Width == log2Height); t->pp_txformat |= ((log2Width << RADEON_TXFORMAT_F5_WIDTH_SHIFT) | (log2Height << RADEON_TXFORMAT_F5_HEIGHT_SHIFT) | /* don't think we need this bit, if it exists at all - fglrx does not set it */ diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 8005f7d6964..a2a6c844d16 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -481,7 +481,7 @@ swrast_map_renderbuffer(struct gl_context *ctx, return; } - ASSERT(xrb->Base.Buffer); + assert(xrb->Base.Buffer); if (rb->AllocStorage == swrast_alloc_back_storage) { map += (rb->Height - 1) * stride; |