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authorRoland Scheidegger <[email protected]>2009-03-28 01:43:50 +0100
committerRoland Scheidegger <[email protected]>2009-03-28 02:06:49 +0100
commita693a2998c996f063edec8a83a4f6a175f39c471 (patch)
treec32982b0c8d56da2927a23c5a23e8e55b7c45995 /src/mesa/drivers/dri
parent02a579f2e7abc832dd46956048d1116f7dc3dd92 (diff)
i965: srgb texture fixes
i965 can either do SRGBA8_REV format or SARGB8 format, but not SRGBA8. Could add SRGBA8_REV support to mesa, but simply use SARGB8 for now. While here, also add true srgb luminance / luminance_alpha support - unfortunately the published docs fail to mention which asics support this, tested on g43 so assume this works on any g4x.
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c10
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_format.c19
3 files changed, 27 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 74dbba4fdd1..98fc909c2ad 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -367,9 +367,10 @@
#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
#define BRW_SURFACEFORMAT_I16_FLOAT 0x115
#define BRW_SURFACEFORMAT_L16_FLOAT 0x116
-#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
-#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
-#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
+#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
+#define BRW_SURFACEFORMAT_L8A8_UNORM_SRGB 0x118
+#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
+#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C
#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
@@ -386,6 +387,7 @@
#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
#define BRW_SURFACEFORMAT_R8_SSCALED 0x149
#define BRW_SURFACEFORMAT_R8_USCALED 0x14A
+#define BRW_SURFACEFORMAT_L8_UNORM_SRGB 0x14C
#define BRW_SURFACEFORMAT_R1_UINT 0x181
#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 66ce9289558..2f1f4c55f94 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -140,8 +140,14 @@ static GLuint translate_tex_format( GLuint mesa_format, GLenum internal_format,
case MESA_FORMAT_RGBA_DXT5:
return BRW_SURFACEFORMAT_BC3_UNORM;
- case MESA_FORMAT_SRGBA8:
- return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
+ case MESA_FORMAT_SARGB8:
+ return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+
+ case MESA_FORMAT_SLA8:
+ return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB;
+
+ case MESA_FORMAT_SL8:
+ return BRW_SURFACEFORMAT_L8_UNORM_SRGB;
case MESA_FORMAT_SRGB_DXT1:
return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index ce33cdc218b..3322a711307 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -1,5 +1,6 @@
#include "intel_context.h"
#include "intel_tex.h"
+#include "intel_chipset.h"
#include "main/texformat.h"
#include "main/enums.h"
@@ -160,15 +161,23 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
case GL_SRGB8_EXT:
case GL_SRGB_ALPHA_EXT:
case GL_SRGB8_ALPHA8_EXT:
- case GL_SLUMINANCE_EXT:
- case GL_SLUMINANCE8_EXT:
- case GL_SLUMINANCE_ALPHA_EXT:
- case GL_SLUMINANCE8_ALPHA8_EXT:
case GL_COMPRESSED_SRGB_EXT:
case GL_COMPRESSED_SRGB_ALPHA_EXT:
case GL_COMPRESSED_SLUMINANCE_EXT:
case GL_COMPRESSED_SLUMINANCE_ALPHA_EXT:
- return &_mesa_texformat_srgba8;
+ return &_mesa_texformat_sargb8;
+ case GL_SLUMINANCE_EXT:
+ case GL_SLUMINANCE8_EXT:
+ if (IS_G4X(intel->intelScreen->deviceID))
+ return &_mesa_texformat_sl8;
+ else
+ return &_mesa_texformat_sargb8;
+ case GL_SLUMINANCE_ALPHA_EXT:
+ case GL_SLUMINANCE8_ALPHA8_EXT:
+ if (IS_G4X(intel->intelScreen->deviceID))
+ return &_mesa_texformat_sla8;
+ else
+ return &_mesa_texformat_sargb8;
case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT:
case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT:
case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT: