diff options
| author | Alex Deucher <[email protected]> | 2010-03-08 10:04:02 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2010-03-08 11:49:53 -0500 |
| commit | d7ad1b8b0788536f6fcd261fbe0db7a10b84ac0a (patch) | |
| tree | c71b2ab3cec121a46b5c99a5fc16f0a4b304ccf9 /src/mesa/drivers/dri | |
| parent | c65235f97efe30eb9444f7c8f20cb8f0cc529d19 (diff) | |
radeon/r200/r600: reset bos when validating buffers during blit
Diffstat (limited to 'src/mesa/drivers/dri')
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_blit.c | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_blit.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_blit.c | 3 |
3 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index b56327dad5f..2c8b3aafe58 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -211,6 +211,9 @@ static GLboolean validate_buffers(struct r200_context *r200, struct radeon_bo *dst_bo) { int ret; + + radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs); + ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs, src_bo, RADEON_GEM_DOMAIN_VRAM, 0); if (ret) diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c index 9d17463cae1..fb848257613 100644 --- a/src/mesa/drivers/dri/r600/r600_blit.c +++ b/src/mesa/drivers/dri/r600/r600_blit.c @@ -1533,6 +1533,8 @@ static GLboolean validate_buffers(context_t *rmesa, { int ret; + radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs); + ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, src_bo, RADEON_GEM_DOMAIN_VRAM, 0); if (ret) diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c index e188a122d53..8c3c2e47667 100644 --- a/src/mesa/drivers/dri/radeon/radeon_blit.c +++ b/src/mesa/drivers/dri/radeon/radeon_blit.c @@ -204,6 +204,9 @@ static GLboolean validate_buffers(struct r100_context *r100, struct radeon_bo *dst_bo) { int ret; + + radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs); + ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, src_bo, RADEON_GEM_DOMAIN_VRAM, 0); if (ret) |