diff options
author | Jason Ekstrand <[email protected]> | 2016-02-09 14:51:28 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2016-02-10 16:33:50 -0800 |
commit | 8750299a420af76cebd3067f6f603eacde06ae06 (patch) | |
tree | 9668b5b42f3029de2472090f6e7d9f0e676b8164 /src/mesa/drivers/dri | |
parent | 70dff4a55e767de8b9ce10f055b94ebb1f6a9755 (diff) |
nir: Remove the const_offset from nir_tex_instr
When NIR was originally drafted, there was no easy way to determine if
something was constant or not. The result was that we had lots of
special-casing for constant values such as this. Now that load_const
instructions are SSA-only, it's really easy to find constants and this
isn't really needed anymore.
Reviewed-by: Connor Abbott <[email protected]>
Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 26 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 21 |
2 files changed, 22 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index ade5b46928d..1fc21e474a7 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -2951,7 +2951,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) instr->is_array; int lod_components = 0; - int UNUSED offset_components = 0; fs_reg coordinate, shadow_comparitor, lod, lod2, sample_index, mcs, tex_offset; @@ -2999,13 +2998,18 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) case nir_tex_src_ms_index: sample_index = retype(src, BRW_REGISTER_TYPE_UD); break; - case nir_tex_src_offset: - tex_offset = retype(src, BRW_REGISTER_TYPE_D); - if (instr->is_array) - offset_components = instr->coord_components - 1; - else - offset_components = instr->coord_components; + + case nir_tex_src_offset: { + nir_const_value *const_offset = + nir_src_as_const_value(instr->src[i].src); + if (const_offset) { + tex_offset = brw_imm_ud(brw_texture_offset(const_offset->i, 3)); + } else { + tex_offset = retype(src, BRW_REGISTER_TYPE_D); + } break; + } + case nir_tex_src_projector: unreachable("should be lowered"); @@ -3049,14 +3053,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) } } - for (unsigned i = 0; i < 3; i++) { - if (instr->const_offset[i] != 0) { - assert(offset_components == 0); - tex_offset = brw_imm_ud(brw_texture_offset(instr->const_offset, 3)); - break; - } - } - enum glsl_base_type dest_base_type = brw_glsl_base_type_for_nir_type (instr->dest_type); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index ca6a9def7ad..74ec4f0e87f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -1657,6 +1657,7 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) dst_reg dest = get_nir_dest(instr->dest, instr->dest_type); /* Load the texture operation sources */ + uint32_t constant_offset = 0; for (unsigned i = 0; i < instr->num_srcs; i++) { switch (instr->src[i].src_type) { case nir_tex_src_comparitor: @@ -1713,9 +1714,17 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) break; } - case nir_tex_src_offset: - offset_value = get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_D, 2); + case nir_tex_src_offset: { + nir_const_value *const_offset = + nir_src_as_const_value(instr->src[i].src); + if (const_offset) { + constant_offset = brw_texture_offset(const_offset->i, 3); + } else { + offset_value = + get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_D, 2); + } break; + } case nir_tex_src_texture_offset: { /* The highest texture which may be used by this operation is @@ -1771,14 +1780,6 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) } } - uint32_t constant_offset = 0; - for (unsigned i = 0; i < 3; i++) { - if (instr->const_offset[i] != 0) { - constant_offset = brw_texture_offset(instr->const_offset, 3); - break; - } - } - /* Stuff the channel select bits in the top of the texture offset */ if (instr->op == nir_texop_tg4) { if (instr->component == 1 && |