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authorJason Ekstrand <[email protected]>2017-06-14 22:27:20 -0700
committerKenneth Graunke <[email protected]>2017-10-12 19:58:40 -0700
commit45991479a3f83501652240a66424a7b64a93e4d7 (patch)
treea087664d3bba9cc3c4e10ec78f886413687ba365 /src/mesa/drivers/dri
parent2f1cdd71371009238e7dfbd94e466f34166b8d77 (diff)
i965/barrier: Do the correct flushes for texture updates
Texture uploads and downloads may go through the render pipe which may result in texturing from or rendering to the texture or the PBO. We need to flush accordingly. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_program.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 9ec2917c90e..3743fa9b5eb 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -268,8 +268,10 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
if (barriers & GL_TEXTURE_FETCH_BARRIER_BIT)
bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
- if (barriers & GL_TEXTURE_UPDATE_BARRIER_BIT)
- bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
+ if (barriers & (GL_TEXTURE_UPDATE_BARRIER_BIT |
+ GL_PIXEL_BUFFER_BARRIER_BIT))
+ bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
+ PIPE_CONTROL_RENDER_TARGET_FLUSH);
if (barriers & GL_FRAMEBUFFER_BARRIER_BIT)
bits |= (PIPE_CONTROL_DEPTH_CACHE_FLUSH |