diff options
author | Jordan Justen <[email protected]> | 2016-05-09 14:46:25 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2016-05-09 15:05:08 -0700 |
commit | e74812dbfefa2006d6de5c3edfe5c66f5ce24650 (patch) | |
tree | 268b1f2521c8bbff8021a684a1ddd1d04257c86b /src/mesa/drivers/dri | |
parent | 96d43f2d087e23ab692d43fc48fe1be30e923ae0 (diff) |
i965/hsw: Fix brw_store_data_imm*
For Gen6 through Haswell dword 1 is MBZ. In gen 8 it becomes part of
the 64-bit address.
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 77cdc0adfc2..f50b2b473c9 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -673,17 +673,18 @@ void brw_store_data_imm32(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, uint32_t imm) { - const int len = brw->gen >= 8 ? 4 : 3; assert(brw->gen >= 6); - BEGIN_BATCH(len); - OUT_BATCH(MI_STORE_DATA_IMM | (len - 2)); - if (len > 3) + BEGIN_BATCH(4); + OUT_BATCH(MI_STORE_DATA_IMM | (4 - 2)); + if (brw->gen >= 8) OUT_RELOC64(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, offset); - else + else { + OUT_BATCH(0); /* MBZ */ OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, offset); + } OUT_BATCH(imm); ADVANCE_BATCH(); } @@ -695,17 +696,18 @@ void brw_store_data_imm64(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, uint64_t imm) { - const int len = brw->gen >= 8 ? 5 : 4; assert(brw->gen >= 6); - BEGIN_BATCH(len); - OUT_BATCH(MI_STORE_DATA_IMM | (len - 2)); - if (len > 4) + BEGIN_BATCH(5); + OUT_BATCH(MI_STORE_DATA_IMM | (5 - 2)); + if (brw->gen >= 8) OUT_RELOC64(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, offset); - else + else { + OUT_BATCH(0); /* MBZ */ OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, offset); + } OUT_BATCH(imm & 0xffffffffu); OUT_BATCH(imm >> 32); ADVANCE_BATCH(); |