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authorKenneth Graunke <[email protected]>2017-10-12 20:59:22 -0700
committerKenneth Graunke <[email protected]>2017-10-19 11:10:00 -0700
commit0954ce1000cb646cda8bad3918cc9bbdcbdbf88b (patch)
tree4353db06001ef039e3cdb6b27f1e3297ed7a487a /src/mesa/drivers/dri
parent33bdbc1db47cffc9c8b79d7daee51fcdcb52837e (diff)
i965: Make intel_miptree_prepare_texture() take level/layer arguments.
This effectively exports intel_miptree_prepare_texture_slices() as intel_miptree_prepare_texture(). The hope is to avoid resolves for when using texture views that access a subset of the levels/layers. For now, we pass the same arguments to separate the mechanical change from the one that actually modifies our behavior. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by; Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c30
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h2
3 files changed, 13 insertions, 21 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 2721c722693..f9a8264f27f 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -403,6 +403,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw)
intel_disable_rb_aux_buffer(brw, tex_obj->mt, "for sampling");
intel_miptree_prepare_texture(brw, tex_obj->mt, view_format,
+ 0, INTEL_REMAINING_LEVELS,
+ 0, INTEL_REMAINING_LAYERS,
disable_aux);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b57290e8238..61b0a2dd49c 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2617,13 +2617,13 @@ isl_formats_are_fast_clear_compatible(enum isl_format a, enum isl_format b)
return isl_format_srgb_to_linear(a) == isl_format_srgb_to_linear(b);
}
-static void
-intel_miptree_prepare_texture_slices(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- enum isl_format view_format,
- uint32_t start_level, uint32_t num_levels,
- uint32_t start_layer, uint32_t num_layers,
- bool disable_aux)
+void
+intel_miptree_prepare_texture(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ enum isl_format view_format,
+ uint32_t start_level, uint32_t num_levels,
+ uint32_t start_layer, uint32_t num_layers,
+ bool disable_aux)
{
enum isl_aux_usage aux_usage = disable_aux ? ISL_AUX_USAGE_NONE :
intel_miptree_texture_aux_usage(brw, mt, view_format);
@@ -2642,18 +2642,6 @@ intel_miptree_prepare_texture_slices(struct brw_context *brw,
}
void
-intel_miptree_prepare_texture(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- enum isl_format view_format,
- bool disable_aux)
-{
- intel_miptree_prepare_texture_slices(brw, mt, view_format,
- 0, INTEL_REMAINING_LEVELS,
- 0, INTEL_REMAINING_LAYERS,
- disable_aux);
-}
-
-void
intel_miptree_prepare_image(struct brw_context *brw,
struct intel_mipmap_tree *mt)
{
@@ -2673,8 +2661,8 @@ intel_miptree_prepare_fb_fetch(struct brw_context *brw,
*/
assert(brw->screen->devinfo.gen < 9);
- intel_miptree_prepare_texture_slices(brw, mt, mt->surf.format, level, 1,
- start_layer, num_layers, false);
+ intel_miptree_prepare_texture(brw, mt, mt->surf.format, level, 1,
+ start_layer, num_layers, false);
}
enum isl_aux_usage
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 48b07e4df6d..6dd097ac6d0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -640,6 +640,8 @@ void
intel_miptree_prepare_texture(struct brw_context *brw,
struct intel_mipmap_tree *mt,
enum isl_format view_format,
+ uint32_t start_level, uint32_t num_levels,
+ uint32_t start_layer, uint32_t num_layers,
bool disable_aux);
void
intel_miptree_prepare_image(struct brw_context *brw,