diff options
author | Ben Widawsky <[email protected]> | 2015-05-14 09:28:37 -0700 |
---|---|---|
committer | Ben Widawsky <[email protected]> | 2015-06-12 18:09:49 -0700 |
commit | 935f1f60da71df07aa45a3da92fa764a1830e0fb (patch) | |
tree | 78be56fafc898522a2160f023c9e4f0025844052 /src/mesa/drivers/dri | |
parent | a2421623db9b900d2ab0026539e8f7f6294475ea (diff) |
i965/gen8+: Add aux buffer alignment assertions
This helped find the incorrect HALIGN values from the previous patches.
v2: Add PRM references for assertions (Chad)
v3: Remove duplicated part of commit message, assert num_samples > 1, instead of
num_samples > 0. (Chad)
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 672fc70a6f3..6b2463a2c63 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -178,6 +178,17 @@ gen8_emit_texture_surface_state(struct brw_context *brw, if (mt->mcs_mt) { aux_mt = mt->mcs_mt; aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + + /* + * From the BDW PRM, Volume 2d, page 260 (RENDER_SURFACE_STATE): + * "When MCS is enabled for non-MSRT, HALIGN_16 must be used" + * + * From the hardware spec for GEN9: + * "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, HALIGN + * 16 must be used." + */ + assert(brw->gen < 9 || mt->align_w == 16); + assert(brw->gen < 8 || mt->num_samples > 1 || mt->align_w == 16); } uint32_t *surf = allocate_surface_state(brw, surf_offset, surf_index); @@ -391,6 +402,17 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, if (mt->mcs_mt) { aux_mt = mt->mcs_mt; aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + + /* + * From the BDW PRM, Volume 2d, page 260 (RENDER_SURFACE_STATE): + * "When MCS is enabled for non-MSRT, HALIGN_16 must be used" + * + * From the hardware spec for GEN9: + * "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, HALIGN + * 16 must be used." + */ + assert(brw->gen < 9 || mt->align_w == 16); + assert(brw->gen < 8 || mt->num_samples > 1 || mt->align_w == 16); } uint32_t *surf = allocate_surface_state(brw, &offset, surf_index); |