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authorMarek Olšák <[email protected]>2012-11-11 15:22:32 +0100
committerMarek Olšák <[email protected]>2012-11-12 21:36:56 +0100
commit8111342e814304730bed34446ea816cbc17a5775 (patch)
tree90260b9415bd64076d679125fd8adfd75c787ea3 /src/mesa/drivers/dri/radeon
parent26097c4855b97ee6e362c19df11d51fb7fd42192 (diff)
mesa: add MaxNumLevels to gl_texture_image, remove MaxLog2
MaxLog2 led to bugs, because it didn't work well with 1D and 3D textures. NOTE: This is a candidate for the stable branches. v2: correct the comment at MaxNumlevels Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 668ef9f1993..b0c49baf2b3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -270,7 +270,7 @@ static void calculate_min_max_lod(struct gl_sampler_object *samp, struct gl_text
minLod = MIN2(minLod, tObj->MaxLevel);
maxLod = tObj->BaseLevel + (GLint)(samp->MaxLod + 0.5);
maxLod = MIN2(maxLod, tObj->MaxLevel);
- maxLod = MIN2(maxLod, tObj->Image[0][minLod]->MaxLog2 + minLod);
+ maxLod = MIN2(maxLod, tObj->Image[0][minLod]->MaxNumLevels - 1 + minLod);
maxLod = MAX2(maxLod, minLod); /* need at least one level */
}
break;
@@ -329,7 +329,7 @@ static GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct g
mtBaseLevel = &mt->levels[texObj->BaseLevel - mt->baseLevel];
firstImage = texObj->Image[0][texObj->BaseLevel];
- numLevels = MIN2(texObj->_MaxLevel - texObj->BaseLevel + 1, firstImage->MaxLog2 + 1);
+ numLevels = MIN2(texObj->_MaxLevel - texObj->BaseLevel + 1, firstImage->MaxNumLevels);
if (radeon_is_debug_enabled(RADEON_TEXTURE,RADEON_TRACE)) {
fprintf(stderr, "Checking if miptree %p matches texObj %p\n", mt, texObj);
@@ -378,7 +378,7 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t)
}
- numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, texImg->MaxLog2 + 1);
+ numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, texImg->MaxNumLevels);
t->mt = radeon_miptree_create(rmesa, t->base.Target,
texImg->TexFormat, texObj->BaseLevel,