diff options
author | Kenneth Graunke <[email protected]> | 2014-02-07 21:53:18 -0800 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2014-02-09 16:57:45 -0800 |
commit | a487ef87fe4aa8c4b8e5c0d888bfb18727c8e570 (patch) | |
tree | 1c3d5efe5be3b2f2bff9e91e1474d46e0efbde59 /src/mesa/drivers/dri/radeon | |
parent | b903be50b0195f3e48c82fcd28f37ece221f2dfb (diff) |
mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.
In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally
renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and
MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their
sense. The commit message was correct, but what sed commands actually
got run didn't match that.
This patch swaps the two enum names, reversing them. This should undo
the damage, but might break things if people have manually fixed a few
instances in the meantime...
Mark's commit also failed to mention renames:
s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g
s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g
but those seem okay.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_fbo.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_screen.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_texture.c | 4 |
3 files changed, 9 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 3d1bef3ac6d..537ab49637c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -310,7 +310,7 @@ radeon_map_renderbuffer(struct gl_context *ctx, } if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) { - if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) { + if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h, mode, out_map, out_stride); return; @@ -419,7 +419,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx, GLboolean ok; if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) { - if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) { + if (rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT) { radeon_unmap_renderbuffer_s8z24(ctx, rb); return; } @@ -507,7 +507,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe case GL_STENCIL_INDEX8_EXT: case GL_STENCIL_INDEX16_EXT: /* alloc a depth+stencil buffer */ - rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; + rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT; cpp = 4; break; case GL_DEPTH_COMPONENT16: @@ -517,12 +517,12 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT24: case GL_DEPTH_COMPONENT32: - rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT; + rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; cpp = 4; break; case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; + rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT; cpp = 4; break; default: diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index eb5df2ce16f..57e866ebb24 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -632,14 +632,14 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv, if (mesaVis->depthBits == 24) { if (mesaVis->stencilBits == 8) { struct radeon_renderbuffer *depthStencilRb = - radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); + radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base); _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base); depthStencilRb->has_surface = screen->depthHasSurface; } else { /* depth renderbuffer */ struct radeon_renderbuffer *depth = - radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv); + radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base); depth->has_surface = screen->depthHasSurface; } diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index acc4e8cf62f..5bf6541b9f6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -433,7 +433,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_DEPTH_COMPONENT32: case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - return MESA_FORMAT_Z24_UNORM_X8_UINT; + return MESA_FORMAT_Z24_UNORM_S8_UINT; /* EXT_texture_sRGB */ case GL_SRGB: @@ -513,7 +513,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format) switch (mesa_format) { case MESA_FORMAT_Z_UNORM16: - case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_Z24_UNORM_S8_UINT: return 1; default: return 0; |