diff options
author | Roland Scheidegger <[email protected]> | 2012-07-27 03:43:11 +0200 |
---|---|---|
committer | Roland Scheidegger <[email protected]> | 2012-08-01 14:58:23 +0200 |
commit | de694b6b10b7ce23a00cd7296a955f162704ee62 (patch) | |
tree | d21f7bb70b753491ab4fea0eb310ce304cd0dfc2 /src/mesa/drivers/dri/radeon | |
parent | 5b88a2a22daae4d09596804d8edc6b8796d05150 (diff) |
radeon/r200: fix bogus clears
There were several problems with these functions (which are a remnant
of dri1 hyperz mostly - should bring it back somehow someday).
First, it would always do a swrast clear if the buffer to clear was a fbo.
Second, for buffers we wouldn't handle the clear (I guess aux/accum?) we
would actually still have tried to clear that later even when we already
cleared it with swrast.
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_ioctl.c | 37 |
1 files changed, 11 insertions, 26 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index 22118a78404..c6c8b054351 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -381,8 +381,10 @@ void radeonEmitAOS( r100ContextPtr rmesa, static void radeonClear( struct gl_context *ctx, GLbitfield mask ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); - GLuint flags = 0; - GLuint orig_mask = mask; + GLuint hwmask, swmask; + GLuint hwbits = BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT | + BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL | + BUFFER_BIT_COLOR0; if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { rmesa->radeon.front_buffer_dirty = GL_TRUE; @@ -394,36 +396,19 @@ static void radeonClear( struct gl_context *ctx, GLbitfield mask ) radeon_firevertices(&rmesa->radeon); - if ( mask & BUFFER_BIT_FRONT_LEFT ) { - flags |= RADEON_FRONT; - mask &= ~BUFFER_BIT_FRONT_LEFT; - } - - if ( mask & BUFFER_BIT_BACK_LEFT ) { - flags |= RADEON_BACK; - mask &= ~BUFFER_BIT_BACK_LEFT; - } - - if ( mask & BUFFER_BIT_DEPTH ) { - flags |= RADEON_DEPTH; - mask &= ~BUFFER_BIT_DEPTH; - } - - if ( (mask & BUFFER_BIT_STENCIL) ) { - flags |= RADEON_STENCIL; - mask &= ~BUFFER_BIT_STENCIL; - } + hwmask = mask & hwbits; + swmask = mask & ~hwbits; - if ( mask ) { + if ( swmask ) { if (RADEON_DEBUG & RADEON_FALLBACKS) - fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, mask); - _swrast_Clear( ctx, mask ); + fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, swmask); + _swrast_Clear( ctx, swmask ); } - if ( !flags ) + if ( !hwmask ) return; - radeonUserClear(ctx, orig_mask); + radeonUserClear(ctx, hwmask); } void radeonInitIoctlFuncs( struct gl_context *ctx ) |