summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/radeon
diff options
context:
space:
mode:
authorIan Romanick <[email protected]>2018-01-03 11:45:58 -0800
committerIan Romanick <[email protected]>2018-01-26 11:21:46 +0800
commit0aaa27f29187ffb739c7ba2d789b82114f59f054 (patch)
tree9043ee0a749893d3676c354a5a9e391efa187260 /src/mesa/drivers/dri/radeon
parentcf0b26ec1250567fe0c5e9cc556806e64e843d19 (diff)
mesa: Pass the translated color logic op dd_function_table::LogicOpcode
And delete the resulting dead code. This has only been compile-tested. v2: sed --in-place -e 's/color_logic_ops/gl_logicop_mode/g' $(grep -lr color_logic_ops src/) suggested by Brian. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c27
1 files changed, 3 insertions, 24 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index d2ca812155f..a5c7be32230 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -1408,35 +1408,14 @@ static void radeonRenderMode( struct gl_context *ctx, GLenum mode )
FALLBACK( rmesa, RADEON_FALLBACK_RENDER_MODE, (mode != GL_RENDER) );
}
-
-static GLuint radeon_rop_tab[] = {
- RADEON_ROP_CLEAR,
- RADEON_ROP_AND,
- RADEON_ROP_AND_REVERSE,
- RADEON_ROP_COPY,
- RADEON_ROP_AND_INVERTED,
- RADEON_ROP_NOOP,
- RADEON_ROP_XOR,
- RADEON_ROP_OR,
- RADEON_ROP_NOR,
- RADEON_ROP_EQUIV,
- RADEON_ROP_INVERT,
- RADEON_ROP_OR_REVERSE,
- RADEON_ROP_COPY_INVERTED,
- RADEON_ROP_OR_INVERTED,
- RADEON_ROP_NAND,
- RADEON_ROP_SET,
-};
-
-static void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode )
+static void radeonLogicOpCode(struct gl_context *ctx, enum gl_logicop_mode opcode)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
- GLuint rop = (GLuint)opcode - GL_CLEAR;
- assert( rop < 16 );
+ assert((unsigned) opcode <= 15);
RADEON_STATECHANGE( rmesa, msk );
- rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop];
+ rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = opcode;
}
/* =============================================================