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authorBrian Paul <[email protected]>2006-10-18 20:02:42 +0000
committerBrian Paul <[email protected]>2006-10-18 20:02:42 +0000
commit446972bc2756cf9770a82f51aa0dc4f529c6cae5 (patch)
treedde17acb61b36206619a1cb617f3cb29df1c1107 /src/mesa/drivers/dri/radeon
parentccb64bbb2a32761efa076ebafa7ccdaf2d412b0e (diff)
Want to stop passing x/y/width/height to Clear() function.
The coordinates need to be computed after we've got the hw lock. Code updated to: 1. Ignore all/x/y/width/height/ params passed to Clear func. 2. Pass 0,0,0,0,0 to _swrast_Clear() until they're totally removed.
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index aee849e13bf..d9eec622f34 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -1021,8 +1021,8 @@ void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
*/
#define RADEON_MAX_CLEARS 256
-static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
- GLint cx, GLint cy, GLint cw, GLint ch )
+static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean allFoo,
+ GLint cxFoo, GLint cyFoo, GLint cwFoo, GLint chFoo )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
__DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
@@ -1031,10 +1031,10 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
GLuint flags = 0;
GLuint color_mask = 0;
GLint ret, i;
+ GLint cx, cy, cw, ch;
if ( RADEON_DEBUG & DEBUG_IOCTL ) {
- fprintf( stderr, "%s: all=%d cx=%d cy=%d cw=%d ch=%d\n",
- __FUNCTION__, all, cx, cy, cw, ch );
+ fprintf( stderr, "radeonClear\n");
}
{
@@ -1071,7 +1071,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
if ( mask ) {
if (RADEON_DEBUG & DEBUG_FALLBACKS)
fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, mask);
- _swrast_Clear( ctx, mask, all, cx, cy, cw, ch );
+ _swrast_Clear( ctx, mask, 0, 0, 0, 0, 0 );
}
if ( !flags )
@@ -1094,6 +1094,12 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
LOCK_HARDWARE( rmesa );
+ /* compute region after locking: */
+ cx = ctx->DrawBuffer->_Xmin;
+ cy = ctx->DrawBuffer->_Ymin;
+ cw = ctx->DrawBuffer->_Xmax - cx;
+ ch = ctx->DrawBuffer->_Ymax - cy;
+
/* Throttle the number of clear ioctls we do.
*/
while ( 1 ) {
@@ -1132,7 +1138,8 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
GLint n = 0;
- if ( !all ) {
+ if (cw != dPriv->w || ch != dPriv->h) {
+ /* clear subregion */
for ( ; i < nr ; i++ ) {
GLint x = box[i].x1;
GLint y = box[i].y1;
@@ -1154,6 +1161,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
n++;
}
} else {
+ /* clear whole buffer */
for ( ; i < nr ; i++ ) {
*b++ = box[i];
n++;