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authorBrian Paul <[email protected]>2012-01-16 10:54:41 -0700
committerBrian Paul <[email protected]>2012-01-24 14:12:10 -0700
commitbd3c10c0f0c60ab3421c2da2eab814edc2296cb0 (patch)
tree936f9ce4cafba10935227e75169bc6b7a8675cfc /src/mesa/drivers/dri/radeon
parentecb8594c184f5daa2f5a735e42ee24e7d110aa9f (diff)
swrast: s/Data/Map/ in swrast_texture_image
To indicate that it points to mapped texture memory.
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c12
2 files changed, 10 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 23af9aca6ce..ca5dadc5d31 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -440,7 +440,7 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_bo_unmap(image->mt->bo);
radeon_miptree_unreference(&image->mt);
- } else if (image->base.Data) {
+ } else if (image->base.Map) {
/* This condition should be removed, it's here to workaround
* a segfault when mapping textures during software fallbacks.
*/
@@ -456,11 +456,11 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
rows = (rows + blockHeight - 1) / blockHeight;
}
- copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
+ copy_rows(dest, dstlvl->rowstride, image->base.Map, srcrowstride,
rows, srcrowstride);
- _mesa_align_free(image->base.Data);
- image->base.Data = 0;
+ _mesa_align_free(image->base.Map);
+ image->base.Map = 0;
}
radeon_bo_unmap(mt->bo);
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 78fb1b5c7d1..ccb9956a8e6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -170,7 +170,7 @@ static void teximage_set_map_data(radeon_texture_image *image)
lvl = &image->mt->levels[image->base.Base.Level];
- image->base.Data = image->mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
+ image->base.Map = image->mt->bo->ptr + lvl->faces[image->base.Base.Face].offset;
image->base.RowStride = lvl->rowstride / _mesa_get_format_bytes(image->base.Base.TexFormat);
}
@@ -185,7 +185,7 @@ void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable)
__func__, image,
write_enable ? "true": "false");
if (image->mt) {
- assert(!image->base.Data);
+ assert(!image->base.Map);
radeon_bo_map(image->mt->bo, write_enable);
teximage_set_map_data(image);
@@ -199,9 +199,9 @@ void radeon_teximage_unmap(radeon_texture_image *image)
"%s(img %p)\n",
__func__, image);
if (image->mt) {
- assert(image->base.Data);
+ assert(image->base.Map);
- image->base.Data = 0;
+ image->base.Map = 0;
radeon_bo_unmap(image->mt->bo);
}
}
@@ -788,7 +788,7 @@ radeon_swrast_map_image(radeonContextPtr rmesa,
radeon_bo_map(mt->bo, 1);
- image->base.Data = mt->bo->ptr + lvl->faces[face].offset;
+ image->base.Map = mt->bo->ptr + lvl->faces[face].offset;
if (mt->target == GL_TEXTURE_3D) {
int i;
@@ -803,7 +803,7 @@ radeon_swrast_unmap_image(radeonContextPtr rmesa,
radeon_texture_image *image)
{
if (image && image->mt) {
- image->base.Data = NULL;
+ image->base.Map = NULL;
radeon_bo_unmap(image->mt->bo);
}
}