mesa: Change many Type P MESA_FORMATs to meet naming spec

Conversion of Type P formats as follows (w/related comment fixes):
    s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
    s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
    s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
    s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
    s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
    s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
    s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
    s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
    s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
    s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
    s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
    s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
    s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
    s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
    s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
    s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
    s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
    s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
    s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
    s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
    s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
    s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
    s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
    s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
    s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
    s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
    s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
    s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
    s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
    s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
    s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
    s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
    s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
    s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g

Conflicts:
	src/mesa/drivers/dri/i965/brw_surface_formats.c
	src/mesa/main/format_pack.c
	src/mesa/main/format_unpack.c
	src/mesa/main/formats.c
	src/mesa/main/texformat.c
	src/mesa/main/texstore.c

8 files changed, 56 insertions, 56 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index a5b78550e6b..8c6a0865f14 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -44,9 +44,9 @@ unsigned r100_check_blit(mesa_format mesa_format, uint32_t dst_pitch)
     switch (mesa_format) {
     case MESA_FORMAT_B8G8R8A8_UNORM:
     case MESA_FORMAT_B8G8R8X8_UNORM:
-    case MESA_FORMAT_RGB565:
-    case MESA_FORMAT_ARGB4444:
-    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_B5G6R5_UNORM:
+    case MESA_FORMAT_B4G4R4A4_UNORM:
+    case MESA_FORMAT_B5G5R5A1_UNORM:
     case MESA_FORMAT_A_UNORM8:
     case MESA_FORMAT_L_UNORM8:
     case MESA_FORMAT_I_UNORM8:
@@ -117,13 +117,13 @@ static void inline emit_tx_setup(struct r100_context *r100,
     case MESA_FORMAT_B8G8R8X8_UNORM:
 	    txformat |= RADEON_TXFORMAT_ARGB8888;
 	    break;
-    case MESA_FORMAT_RGB565:
+    case MESA_FORMAT_B5G6R5_UNORM:
 	    txformat |= RADEON_TXFORMAT_RGB565;
 	    break;
-    case MESA_FORMAT_ARGB4444:
+    case MESA_FORMAT_B4G4R4A4_UNORM:
 	    txformat |= RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP;
 	    break;
-    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_B5G5R5A1_UNORM:
 	    txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
 	    break;
     case MESA_FORMAT_A_UNORM8:
@@ -133,7 +133,7 @@ static void inline emit_tx_setup(struct r100_context *r100,
     case MESA_FORMAT_L_UNORM8:
             txformat |= RADEON_TXFORMAT_I8;
             break;
-    case MESA_FORMAT_AL88:
+    case MESA_FORMAT_L8A8_UNORM:
             txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP;
             break;
     default:
@@ -190,13 +190,13 @@ static inline void emit_cb_setup(struct r100_context *r100,
     case MESA_FORMAT_B8G8R8X8_UNORM:
 	    dst_format = RADEON_COLOR_FORMAT_ARGB8888;
 	    break;
-    case MESA_FORMAT_RGB565:
+    case MESA_FORMAT_B5G6R5_UNORM:
 	    dst_format = RADEON_COLOR_FORMAT_RGB565;
 	    break;
-    case MESA_FORMAT_ARGB4444:
+    case MESA_FORMAT_B4G4R4A4_UNORM:
 	    dst_format = RADEON_COLOR_FORMAT_ARGB4444;
 	    break;
-    case MESA_FORMAT_ARGB1555:
+    case MESA_FORMAT_B5G5R5A1_UNORM:
 	    dst_format = RADEON_COLOR_FORMAT_ARGB1555;
 	    break;
     case MESA_FORMAT_A_UNORM8:
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index f2496e68098..3d1bef3ac6d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -310,7 +310,7 @@ radeon_map_renderbuffer(struct gl_context *ctx,
    }
 
    if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) {
-       if (rb->Format == MESA_FORMAT_S8_Z24 || rb->Format == MESA_FORMAT_X8_Z24) {
+       if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
 	   radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h,
 					 mode, out_map, out_stride);
 	   return;
@@ -419,7 +419,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx,
    GLboolean ok;
 
    if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) {
-       if (rb->Format == MESA_FORMAT_S8_Z24 || rb->Format == MESA_FORMAT_X8_Z24) {
+       if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) {
 	   radeon_unmap_renderbuffer_s8z24(ctx, rb);
 	   return;
        }
@@ -507,7 +507,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* alloc a depth+stencil buffer */
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       cpp = 4;
       break;
    case GL_DEPTH_COMPONENT16:
@@ -517,12 +517,12 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe
    case GL_DEPTH_COMPONENT:
    case GL_DEPTH_COMPONENT24:
    case GL_DEPTH_COMPONENT32:
-      rb->Format = MESA_FORMAT_X8_Z24;
+      rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT;
       cpp = 4;
       break;
    case GL_DEPTH_STENCIL_EXT:
    case GL_DEPTH24_STENCIL8_EXT:
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       cpp = 4;
       break;
    default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index ee0f7782793..6998444fb66 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -45,9 +45,9 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
         case GL_RGB:
             switch (type) {
                 case GL_UNSIGNED_SHORT_5_6_5:
-                    return MESA_FORMAT_RGB565;
+                    return MESA_FORMAT_B5G6R5_UNORM;
                 case GL_UNSIGNED_SHORT_5_6_5_REV:
-                    return MESA_FORMAT_RGB565_REV;
+                    return MESA_FORMAT_R5G6B5_UNORM;
             }
             break;
         case GL_RGBA:
@@ -55,7 +55,7 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
                 case GL_FLOAT:
                     return MESA_FORMAT_RGBA_FLOAT32;
                 case GL_UNSIGNED_SHORT_5_5_5_1:
-                    return MESA_FORMAT_RGBA5551;
+                    return MESA_FORMAT_A1B5G5R5_UNORM;
                 case GL_UNSIGNED_INT_8_8_8_8:
                     return MESA_FORMAT_A8B8G8R8_UNORM;
                 case GL_UNSIGNED_BYTE:
@@ -66,13 +66,13 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
         case GL_BGRA:
             switch (type) {
                 case GL_UNSIGNED_SHORT_4_4_4_4:
-                    return MESA_FORMAT_ARGB4444_REV;
+                    return MESA_FORMAT_A4R4G4B4_UNORM;
                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
-                    return MESA_FORMAT_ARGB4444;
+                    return MESA_FORMAT_B4G4R4A4_UNORM;
                 case GL_UNSIGNED_SHORT_5_5_5_1:
-                    return MESA_FORMAT_ARGB1555_REV;
+                    return MESA_FORMAT_A1R5G5B5_UNORM;
                 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
-                    return MESA_FORMAT_ARGB1555;
+                    return MESA_FORMAT_B5G5R5A1_UNORM;
                 case GL_UNSIGNED_INT_8_8_8_8:
                     return MESA_FORMAT_A8R8G8B8_UNORM;
                 case GL_UNSIGNED_BYTE:
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 2c3186ec433..eb5df2ce16f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -214,7 +214,7 @@ radeon_create_image_from_name(__DRIscreen *screen,
 
    switch (format) {
    case __DRI_IMAGE_FORMAT_RGB565:
-      image->format = MESA_FORMAT_RGB565;
+      image->format = MESA_FORMAT_B5G6R5_UNORM;
       image->internal_format = GL_RGB;
       image->data_type = GL_UNSIGNED_BYTE;
       break;
@@ -314,7 +314,7 @@ radeon_create_image(__DRIscreen *screen,
 
    switch (format) {
    case __DRI_IMAGE_FORMAT_RGB565:
-      image->format = MESA_FORMAT_RGB565;
+      image->format = MESA_FORMAT_B5G6R5_UNORM;
       image->internal_format = GL_RGB;
       image->data_type = GL_UNSIGNED_BYTE;
       break;
@@ -611,7 +611,7 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
     _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 
     if (mesaVis->redBits == 5)
-        rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
+        rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM;
     else if (mesaVis->alphaBits == 0)
         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM;
     else
@@ -632,14 +632,14 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
     if (mesaVis->depthBits == 24) {
       if (mesaVis->stencilBits == 8) {
 	struct radeon_renderbuffer *depthStencilRb =
-           radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 	depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
 	/* depth renderbuffer */
 	struct radeon_renderbuffer *depth =
-           radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 	depth->has_surface = screen->depthHasSurface;
       }
@@ -709,7 +709,7 @@ static const
 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 {
    static const mesa_format formats[3] = {
-      MESA_FORMAT_RGB565,
+      MESA_FORMAT_B5G6R5_UNORM,
       MESA_FORMAT_B8G8R8X8_UNORM,
       MESA_FORMAT_B8G8R8A8_UNORM
    };
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index ee8880027d4..2dd19184905 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -335,13 +335,13 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
    if (rrb->cpp == 4)
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888;
    else switch (rrb->base.Base.Format) {
-   case MESA_FORMAT_RGB565:
+   case MESA_FORMAT_B5G6R5_UNORM:
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565;
 	break;
-   case MESA_FORMAT_ARGB4444:
+   case MESA_FORMAT_B4G4R4A4_UNORM:
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444;
 	break;
-   case MESA_FORMAT_ARGB1555:
+   case MESA_FORMAT_B5G5R5A1_UNORM:
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555;
 	break;
    default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index f8430cb95c0..e52730411c4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -108,8 +108,8 @@ do_copy_texsubimage(struct gl_context *ctx,
 
 	    switch (dst_bpp) {
 	    case 2:
-		    src_mesaformat = MESA_FORMAT_RGB565;
-		    dst_mesaformat = MESA_FORMAT_RGB565;
+		    src_mesaformat = MESA_FORMAT_B5G6R5_UNORM;
+		    dst_mesaformat = MESA_FORMAT_B5G6R5_UNORM;
 		    break;
 	    case 4:
 		    src_mesaformat = MESA_FORMAT_B8G8R8A8_UNORM;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index e79d8dfae17..66daccf0895 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -79,14 +79,14 @@ static const struct tx_table tx_table[] =
    [ MESA_FORMAT_B8G8R8A8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
    [ MESA_FORMAT_A8R8G8B8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
    [ MESA_FORMAT_BGR_UNORM8 ] = { RADEON_TXFORMAT_ARGB8888, 0 },
-   [ MESA_FORMAT_RGB565 ] = { RADEON_TXFORMAT_RGB565, 0 },
-   [ MESA_FORMAT_RGB565_REV ] = { RADEON_TXFORMAT_RGB565, 0 },
-   [ MESA_FORMAT_ARGB4444 ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
-   [ MESA_FORMAT_ARGB4444_REV ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
-   [ MESA_FORMAT_ARGB1555 ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
-   [ MESA_FORMAT_ARGB1555_REV ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
-   [ MESA_FORMAT_AL88 ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
-   [ MESA_FORMAT_AL88_REV ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_B5G6R5_UNORM ] = { RADEON_TXFORMAT_RGB565, 0 },
+   [ MESA_FORMAT_R5G6B5_UNORM ] = { RADEON_TXFORMAT_RGB565, 0 },
+   [ MESA_FORMAT_B4G4R4A4_UNORM ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_A4R4G4B4_UNORM ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_B5G5R5A1_UNORM ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_A1R5G5B5_UNORM ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_L8A8_UNORM ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+   [ MESA_FORMAT_A8L8_UNORM ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
    [ MESA_FORMAT_A_UNORM8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
    [ MESA_FORMAT_L_UNORM8 ] = { RADEON_TXFORMAT_L8, 0 },
    [ MESA_FORMAT_I_UNORM8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
@@ -659,9 +659,9 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
 		t->pp_txfilter |= tx_table[MESA_FORMAT_BGR_UNORM8].filter;
 		break;
 	case 2:
-		texFormat = MESA_FORMAT_RGB565;
-		t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format;
-		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
+		texFormat = MESA_FORMAT_B5G6R5_UNORM;
+		t->pp_txformat = tx_table[MESA_FORMAT_B5G6R5_UNORM].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_B5G6R5_UNORM].filter;
 		break;
 	}
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 40b17bb8269..8c717205052 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -433,7 +433,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
 	case GL_DEPTH_COMPONENT32:
 	case GL_DEPTH_STENCIL_EXT:
 	case GL_DEPTH24_STENCIL8_EXT:
-		return MESA_FORMAT_S8_Z24;
+		return MESA_FORMAT_Z24_UNORM_X8_UINT;
 
 	/* EXT_texture_sRGB */
 	case GL_SRGB:
@@ -442,7 +442,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
 	case GL_SRGB8_ALPHA8:
 	case GL_COMPRESSED_SRGB:
 	case GL_COMPRESSED_SRGB_ALPHA:
-		return MESA_FORMAT_SARGB8;
+		return MESA_FORMAT_B8G8R8A8_SRGB;
 
 	case GL_SLUMINANCE:
 	case GL_SLUMINANCE8:
@@ -452,7 +452,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
 	case GL_SLUMINANCE_ALPHA:
 	case GL_SLUMINANCE8_ALPHA8:
 	case GL_COMPRESSED_SLUMINANCE_ALPHA:
-		return MESA_FORMAT_SLA8;
+      return MESA_FORMAT_L8A8_SRGB;
 
 	case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT:
 		return MESA_FORMAT_SRGB_DXT1;
@@ -513,7 +513,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format)
 	switch (mesa_format)
 	{
 		case MESA_FORMAT_Z_UNORM16:
-		case MESA_FORMAT_S8_Z24:
+		case MESA_FORMAT_Z24_UNORM_X8_UINT:
 			return 1;
 		default:
 			return 0;
@@ -594,18 +594,18 @@ radeonInitTextureFormats(void)
    if (_mesa_little_endian()) {
       _radeon_texformat_rgba8888	= MESA_FORMAT_A8B8G8R8_UNORM;
       _radeon_texformat_argb8888	= MESA_FORMAT_B8G8R8A8_UNORM;
-      _radeon_texformat_rgb565		= MESA_FORMAT_RGB565;
-      _radeon_texformat_argb4444	= MESA_FORMAT_ARGB4444;
-      _radeon_texformat_argb1555	= MESA_FORMAT_ARGB1555;
-      _radeon_texformat_al88		= MESA_FORMAT_AL88;
+      _radeon_texformat_rgb565		= MESA_FORMAT_B5G6R5_UNORM;
+      _radeon_texformat_argb4444	= MESA_FORMAT_B4G4R4A4_UNORM;
+      _radeon_texformat_argb1555	= MESA_FORMAT_B5G5R5A1_UNORM;
+      _radeon_texformat_al88		= MESA_FORMAT_L8A8_UNORM;
    }
    else {
       _radeon_texformat_rgba8888	= MESA_FORMAT_R8G8B8A8_UNORM;
       _radeon_texformat_argb8888	= MESA_FORMAT_A8R8G8B8_UNORM;
-      _radeon_texformat_rgb565		= MESA_FORMAT_RGB565_REV;
-      _radeon_texformat_argb4444	= MESA_FORMAT_ARGB4444_REV;
-      _radeon_texformat_argb1555	= MESA_FORMAT_ARGB1555_REV;
-      _radeon_texformat_al88		= MESA_FORMAT_AL88_REV;
+      _radeon_texformat_rgb565		= MESA_FORMAT_R5G6B5_UNORM;
+      _radeon_texformat_argb4444	= MESA_FORMAT_A4R4G4B4_UNORM;
+      _radeon_texformat_argb1555	= MESA_FORMAT_A1R5G5B5_UNORM;
+      _radeon_texformat_al88		= MESA_FORMAT_A8L8_UNORM;
    }
 }