Merge remote branch 'main/master' into radeon-rewrite

Conflicts:
	src/mesa/drivers/dri/r300/r300_cmdbuf.c
	src/mesa/drivers/dri/r300/r300_state.c
	src/mesa/drivers/dri/r300/r300_swtcl.c
	src/mesa/drivers/dri/r300/radeon_ioctl.c
	src/mesa/drivers/dri/radeon/radeon_screen.c

4 files changed, 16 insertions, 16 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 5c34ca89fab..840233ff896 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -245,7 +245,7 @@ static uint32_t radeonGetLastFrame(radeonContextPtr radeon)
 {
 	drm_radeon_getparam_t gp;
 	int ret;
-	uint32_t frame;
+	uint32_t frame = 0;
 
 	gp.param = RADEON_PARAM_LAST_FRAME;
 	gp.value = (int *)&frame;
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 02101978ac4..1d4f008cbc7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -732,7 +732,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    unsigned char *RADEONMMIO = NULL;
    int i;
    int ret;
-   uint32_t temp;
+   uint32_t temp = 0;
 
    if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(RADEONDRIRec) does not match passed size from device driver\n");
@@ -1359,7 +1359,7 @@ radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
         radeon_bo_unref(rb->bo);
         rb->bo = NULL;
     }
-   _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
+    _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 }
 
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index b9adab18d49..0ece1acbeb2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -915,11 +915,11 @@ static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
     */
    else if ( (texUnit->TexGenEnabled & S_BIT) &&
 	     (texUnit->TexGenEnabled & T_BIT) &&
-	     (texUnit->GenModeS == texUnit->GenModeT) ) {
+	     (texUnit->GenS.Mode == texUnit->GenT.Mode) ) {
       if ( ((texUnit->TexGenEnabled & R_BIT) &&
-	    (texUnit->GenModeS != texUnit->GenModeR)) ||
+	    (texUnit->GenS.Mode != texUnit->GenR.Mode)) ||
 	   ((texUnit->TexGenEnabled & Q_BIT) &&
-	    (texUnit->GenModeS != texUnit->GenModeQ)) ) {
+	    (texUnit->GenS.Mode != texUnit->GenQ.Mode)) ) {
 	 /* Mixed modes, fallback:
 	  */
 	 if (RADEON_DEBUG & DEBUG_FALLBACKS)
@@ -943,23 +943,23 @@ static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
       rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_Q_BIT(unit);
    }
 
-   switch (texUnit->GenModeS) {
+   switch (texUnit->GenS.Mode) {
    case GL_OBJECT_LINEAR:
       rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_OBJ << inputshift;
       set_texgen_matrix( rmesa, unit,
-			 texUnit->ObjectPlaneS,
-			 texUnit->ObjectPlaneT,
-			 texUnit->ObjectPlaneR,
-			 texUnit->ObjectPlaneQ);
+			 texUnit->GenS.ObjectPlane,
+			 texUnit->GenT.ObjectPlane,
+			 texUnit->GenR.ObjectPlane,
+			 texUnit->GenQ.ObjectPlane);
       break;
 
    case GL_EYE_LINEAR:
       rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_EYE << inputshift;
       set_texgen_matrix( rmesa, unit,
-			 texUnit->EyePlaneS,
-			 texUnit->EyePlaneT,
-			 texUnit->EyePlaneR,
-			 texUnit->EyePlaneQ);
+			 texUnit->GenS.EyePlane,
+			 texUnit->GenT.EyePlane,
+			 texUnit->GenR.EyePlane,
+			 texUnit->GenQ.EyePlane);
       break;
 
    case GL_REFLECTION_MAP_NV:
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_reg.h b/src/mesa/drivers/dri/radeon/server/radeon_reg.h
index 0df634b84db..866807462a4 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_reg.h
+++ b/src/mesa/drivers/dri/radeon/server/radeon_reg.h
@@ -1500,7 +1500,7 @@
 #       define RADEON_ALPHA_ARG_C_T1_ALPHA       (6   << 8)
 #       define RADEON_ALPHA_ARG_C_T2_ALPHA       (7   << 8)
 #       define RADEON_ALPHA_ARG_C_T3_ALPHA       (8   << 8)
-#       define RADEON_DOT_ALPHA_DONT_REPLICATE   (1   << 9)
+#       define RADEON_DOT_ALPHA_DONT_REPLICATE   (1   << 12)
 #       define RADEON_ALPHA_ARG_MASK             0xf
 
 #define RADEON_PP_TFACTOR_0                 0x1c68