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authorDave Airlie <[email protected]>2009-07-15 12:03:34 +1000
committerDave Airlie <[email protected]>2009-07-15 14:23:13 +1000
commit94d2a809f9cabf3821be9b0d2b11b26151ed3084 (patch)
tree30dbe39522dc864ee72af60522b1b05a692f6a2a /src/mesa/drivers/dri/radeon
parent9b17f041d12cfe9a34df43da93fc16e275a5c751 (diff)
radeon: r300 fix span reading for macro tiled buffers.
this uses the correct formula for macro tiled buffers for readback
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 2530a82d596..2da931ea621 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -74,12 +74,13 @@ static GLubyte *radeon_ptr32(const struct radeon_renderbuffer * rrb,
offset += ((x & 31) >> 2) << 5;
offset += (x & 3) << 2;
} else {
- nmacroblkpl = rrb->pitch >> 6;
- offset += ((y >> 3) * nmacroblkpl) << 11;
- offset += (y & 7) << 8;
- offset += (x >> 6) << 11;
- offset += ((x & 63) >> 3) << 5;
- offset += (x & 7) << 2;
+ offset = ((y >> 3) * (rrb->pitch >> 8) + (x >> 6)) << 11;
+ offset += (((y >> 2) ^ (x >> 6)) & 0x1) << 10;
+ offset += (((y >> 3) ^ (x >> 5)) & 0x1) << 9;
+ offset += (((y >> 1) ^ (x >> 5)) & 0x1) << 8;
+ offset += (((y >> 2) ^ (x >> 4)) & 0x1) << 7;
+ offset += (y & 1) << 6;
+ offset += (x & 15) << 2;
}
} else {
nmicroblkpl = ((rrb->pitch + 31) & ~31) >> 5;