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authorMark Mueller <[email protected]>2014-01-20 19:08:54 -0800
committerMark Mueller <[email protected]>2014-01-27 14:30:50 -0800
commit50a01d2acafb2a937e62b24258e2e777c0cd1489 (patch)
treed1dfcc6ca5a577dac6a9ab7d2235434ecdb7d3ce /src/mesa/drivers/dri/radeon
parentef145ba4ded6aafb28e3bda02fb348e6b8bff12a (diff)
mesa: Change many Type A MESA_FORMATs to meet naming standard
Update comments. Conversion of the following Type A formats: s/MESA_FORMAT_RGB888\b/MESA_FORMAT_BGR_UNORM8/g s/MESA_FORMAT_BGR888\b/MESA_FORMAT_RGB_UNORM8/g s/MESA_FORMAT_A8\b/MESA_FORMAT_A_UNORM8/g s/MESA_FORMAT_A16\b/MESA_FORMAT_A_UNORM16/g s/MESA_FORMAT_L8\b/MESA_FORMAT_L_UNORM8/g s/MESA_FORMAT_L16\b/MESA_FORMAT_L_UNORM16/g s/MESA_FORMAT_I8\b/MESA_FORMAT_I_UNORM8/g s/MESA_FORMAT_I16\b/MESA_FORMAT_I_UNORM16/g s/MESA_FORMAT_R8\b/MESA_FORMAT_R_UNORM8/g s/MESA_FORMAT_R16\b/MESA_FORMAT_R_UNORM16/g s/MESA_FORMAT_Z16\b/MESA_FORMAT_Z_UNORM16/g s/MESA_FORMAT_Z32\b/MESA_FORMAT_Z_UNORM32/g s/MESA_FORMAT_S8\b/MESA_FORMAT_S_UINT8/g s/MESA_FORMAT_SRGB8\b/MESA_FORMAT_BGR_SRGB8/g s/MESA_FORMAT_RGBA_16\b/MESA_FORMAT_RGBA_UNORM16/g s/MESA_FORMAT_SL8\b/MESA_FORMAT_L_SRGB8/g s/MESA_FORMAT_Z32_FLOAT\b/MESA_FORMAT_Z_FLOAT32/g s/MESA_FORMAT_XBGR16161616_UNORM\b/MESA_FORMAT_RGBX_UNORM16/g s/MESA_FORMAT_XBGR16161616_SNORM\b/MESA_FORMAT_RGBX_SNORM16/g s/MESA_FORMAT_XBGR16161616_FLOAT\b/MESA_FORMAT_RGBX_FLOAT16/g s/MESA_FORMAT_XBGR16161616_UINT\b/MESA_FORMAT_RGBX_UINT16/g s/MESA_FORMAT_XBGR16161616_SINT\b/MESA_FORMAT_RGBX_SINT16/g s/MESA_FORMAT_XBGR32323232_FLOAT\b/MESA_FORMAT_RGBX_FLOAT32/g s/MESA_FORMAT_XBGR32323232_UINT\b/MESA_FORMAT_RGBX_UINT32/g s/MESA_FORMAT_XBGR32323232_SINT\b/MESA_FORMAT_RGBX_SINT32/g s/MESA_FORMAT_XBGR8888_UINT\b/MESA_FORMAT_RGBX_UINT8/g s/MESA_FORMAT_XBGR8888_SINT\b/MESA_FORMAT_RGBX_SINT8/g
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_blit.c18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex_copy.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texstate.c18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c10
6 files changed, 29 insertions, 29 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 5e291672f68..a5b78550e6b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -47,9 +47,9 @@ unsigned r100_check_blit(mesa_format mesa_format, uint32_t dst_pitch)
case MESA_FORMAT_RGB565:
case MESA_FORMAT_ARGB4444:
case MESA_FORMAT_ARGB1555:
- case MESA_FORMAT_A8:
- case MESA_FORMAT_L8:
- case MESA_FORMAT_I8:
+ case MESA_FORMAT_A_UNORM8:
+ case MESA_FORMAT_L_UNORM8:
+ case MESA_FORMAT_I_UNORM8:
break;
default:
return 0;
@@ -126,11 +126,11 @@ static void inline emit_tx_setup(struct r100_context *r100,
case MESA_FORMAT_ARGB1555:
txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
break;
- case MESA_FORMAT_A8:
- case MESA_FORMAT_I8:
+ case MESA_FORMAT_A_UNORM8:
+ case MESA_FORMAT_I_UNORM8:
txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
break;
- case MESA_FORMAT_L8:
+ case MESA_FORMAT_L_UNORM8:
txformat |= RADEON_TXFORMAT_I8;
break;
case MESA_FORMAT_AL88:
@@ -199,9 +199,9 @@ static inline void emit_cb_setup(struct r100_context *r100,
case MESA_FORMAT_ARGB1555:
dst_format = RADEON_COLOR_FORMAT_ARGB1555;
break;
- case MESA_FORMAT_A8:
- case MESA_FORMAT_L8:
- case MESA_FORMAT_I8:
+ case MESA_FORMAT_A_UNORM8:
+ case MESA_FORMAT_L_UNORM8:
+ case MESA_FORMAT_I_UNORM8:
dst_format = RADEON_COLOR_FORMAT_RGB8;
break;
default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 7a0ce47e141..f2496e68098 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -315,7 +315,7 @@ radeon_map_renderbuffer(struct gl_context *ctx,
mode, out_map, out_stride);
return;
}
- if (rb->Format == MESA_FORMAT_Z16) {
+ if (rb->Format == MESA_FORMAT_Z_UNORM16) {
radeon_map_renderbuffer_z16(ctx, rb, x, y, w, h,
mode, out_map, out_stride);
return;
@@ -423,7 +423,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx,
radeon_unmap_renderbuffer_s8z24(ctx, rb);
return;
}
- if (rb->Format == MESA_FORMAT_Z16) {
+ if (rb->Format == MESA_FORMAT_Z_UNORM16) {
radeon_unmap_renderbuffer_z16(ctx, rb);
return;
}
@@ -511,7 +511,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe
cpp = 4;
break;
case GL_DEPTH_COMPONENT16:
- rb->Format = MESA_FORMAT_Z16;
+ rb->Format = MESA_FORMAT_Z_UNORM16;
cpp = 2;
break;
case GL_DEPTH_COMPONENT:
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 3dcdcba00d3..2c3186ec433 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -646,7 +646,7 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
} else if (mesaVis->depthBits == 16) {
/* just 16-bit depth buffer, no hw stencil */
struct radeon_renderbuffer *depth =
- radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
+ radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv);
_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
depth->has_surface = screen->depthHasSurface;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 9e7ecca0f68..f8430cb95c0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -116,8 +116,8 @@ do_copy_texsubimage(struct gl_context *ctx,
dst_mesaformat = MESA_FORMAT_B8G8R8A8_UNORM;
break;
case 1:
- src_mesaformat = MESA_FORMAT_A8;
- dst_mesaformat = MESA_FORMAT_A8;
+ src_mesaformat = MESA_FORMAT_A_UNORM8;
+ dst_mesaformat = MESA_FORMAT_A_UNORM8;
break;
default:
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 51c36e9ee84..e79d8dfae17 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -78,7 +78,7 @@ static const struct tx_table tx_table[] =
[ MESA_FORMAT_R8G8B8A8_UNORM ] = { RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
[ MESA_FORMAT_B8G8R8A8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
[ MESA_FORMAT_A8R8G8B8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
- [ MESA_FORMAT_RGB888 ] = { RADEON_TXFORMAT_ARGB8888, 0 },
+ [ MESA_FORMAT_BGR_UNORM8 ] = { RADEON_TXFORMAT_ARGB8888, 0 },
[ MESA_FORMAT_RGB565 ] = { RADEON_TXFORMAT_RGB565, 0 },
[ MESA_FORMAT_RGB565_REV ] = { RADEON_TXFORMAT_RGB565, 0 },
[ MESA_FORMAT_ARGB4444 ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
@@ -87,9 +87,9 @@ static const struct tx_table tx_table[] =
[ MESA_FORMAT_ARGB1555_REV ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
[ MESA_FORMAT_AL88 ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
[ MESA_FORMAT_AL88_REV ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
- [ MESA_FORMAT_A8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
- [ MESA_FORMAT_L8 ] = { RADEON_TXFORMAT_L8, 0 },
- [ MESA_FORMAT_I8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+ [ MESA_FORMAT_A_UNORM8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
+ [ MESA_FORMAT_L_UNORM8 ] = { RADEON_TXFORMAT_L8, 0 },
+ [ MESA_FORMAT_I_UNORM8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
[ MESA_FORMAT_YCBCR ] = { RADEON_TXFORMAT_YCBCR, RADEON_YUV_TO_RGB },
[ MESA_FORMAT_YCBCR_REV ] = { RADEON_TXFORMAT_YCBCR_REV, RADEON_YUV_TO_RGB },
[ MESA_FORMAT_RGB_FXT1 ] = { 0xffffffff, 0 },
@@ -643,8 +643,8 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
switch (rb->cpp) {
case 4:
if (texture_format == __DRI_TEXTURE_FORMAT_RGB) {
- t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format;
- texFormat = MESA_FORMAT_RGB888;
+ t->pp_txformat = tx_table[MESA_FORMAT_BGR_UNORM8].format;
+ texFormat = MESA_FORMAT_BGR_UNORM8;
}
else {
t->pp_txformat = tx_table[MESA_FORMAT_B8G8R8A8_UNORM].format;
@@ -654,9 +654,9 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
break;
case 3:
default:
- texFormat = MESA_FORMAT_RGB888;
- t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format;
- t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter;
+ texFormat = MESA_FORMAT_BGR_UNORM8;
+ t->pp_txformat = tx_table[MESA_FORMAT_BGR_UNORM8].format;
+ t->pp_txfilter |= tx_table[MESA_FORMAT_BGR_UNORM8].filter;
break;
case 2:
texFormat = MESA_FORMAT_RGB565;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 15ab677ce39..40b17bb8269 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -349,7 +349,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
in wrong rgb values (same as alpha value instead of 0). */
return _radeon_texformat_al88;
#else
- return MESA_FORMAT_A8;
+ return MESA_FORMAT_A_UNORM8;
#endif
case 1:
case GL_LUMINANCE:
@@ -358,7 +358,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case GL_COMPRESSED_LUMINANCE:
- return MESA_FORMAT_L8;
+ return MESA_FORMAT_L_UNORM8;
case 2:
case GL_LUMINANCE_ALPHA:
@@ -377,7 +377,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_COMPRESSED_INTENSITY:
- return MESA_FORMAT_I8;
+ return MESA_FORMAT_I_UNORM8;
case GL_YCBCR_MESA:
if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
@@ -447,7 +447,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx,
case GL_SLUMINANCE:
case GL_SLUMINANCE8:
case GL_COMPRESSED_SLUMINANCE:
- return MESA_FORMAT_SL8;
+ return MESA_FORMAT_L_SRGB8;
case GL_SLUMINANCE_ALPHA:
case GL_SLUMINANCE8_ALPHA8:
@@ -512,7 +512,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format)
switch (mesa_format)
{
- case MESA_FORMAT_Z16:
+ case MESA_FORMAT_Z_UNORM16:
case MESA_FORMAT_S8_Z24:
return 1;
default: